[mirror_ubuntu-bionic-kernel.git] / arch / mips / kernel / ptrace32.c

/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 1992 Ross Biro
 * Copyright (C) Linus Torvalds
 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
 * Copyright (C) 1996 David S. Miller
 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
 * Copyright (C) 1999 MIPS Technologies, Inc.
 * Copyright (C) 2000 Ulf Carlsson
 *
 * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
 * binaries.
 */
#include <linux/compiler.h>
#include <linux/compat.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/sched/task_stack.h>
#include <linux/mm.h>
#include <linux/errno.h>
#include <linux/ptrace.h>
#include <linux/smp.h>
#include <linux/security.h>

#include <asm/cpu.h>
#include <asm/dsp.h>
#include <asm/fpu.h>
#include <asm/mipsregs.h>
#include <asm/mipsmtregs.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/reg.h>
#include <asm/syscall.h>
#include <linux/uaccess.h>
#include <asm/bootinfo.h>

/*
 * Tracing a 32-bit process with a 64-bit strace and vice versa will not
 * work.  I don't know how to fix this.
 */
long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
			compat_ulong_t caddr, compat_ulong_t cdata)
{
	int addr = caddr;
	int data = cdata;
	int ret;

	switch (request) {

	/*
	 * Read 4 bytes of the other process' storage
	 *  data is a pointer specifying where the user wants the
	 *	4 bytes copied into
	 *  addr is a pointer in the user's storage that contains an 8 byte
	 *	address in the other process of the 4 bytes that is to be read
	 * (this is run in a 32-bit process looking at a 64-bit process)
	 * when I and D space are separate, these will need to be fixed.
	 */
	case PTRACE_PEEKTEXT_3264:
	case PTRACE_PEEKDATA_3264: {
		u32 tmp;
		int copied;
		u32 __user * addrOthers;

		ret = -EIO;

		/* Get the addr in the other process that we want to read */
		if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0)
			break;

		copied = ptrace_access_vm(child, (u64)addrOthers, &tmp,
				sizeof(tmp), FOLL_FORCE);
		if (copied != sizeof(tmp))
			break;
		ret = put_user(tmp, (u32 __user *) (unsigned long) data);
		break;
	}

	/* Read the word at location addr in the USER area. */
	case PTRACE_PEEKUSR: {
		struct pt_regs *regs;
		union fpureg *fregs;
		unsigned int tmp;

		regs = task_pt_regs(child);
		ret = 0;  /* Default return value. */

		switch (addr) {
		case 0 ... 31:
			tmp = regs->regs[addr];
			break;
		case FPR_BASE ... FPR_BASE + 31:
			if (!tsk_used_math(child)) {
				/* FP not yet used */
				tmp = -1;
				break;
			}
			fregs = get_fpu_regs(child);
			if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
				/*
				 * The odd registers are actually the high
				 * order bits of the values stored in the even
				 * registers - unless we're using r2k_switch.S.
				 */
				tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
						addr & 1);
				break;
			}
			tmp = get_fpr64(&fregs[addr - FPR_BASE], 0);
			break;
		case PC:
			tmp = regs->cp0_epc;
			break;
		case CAUSE:
			tmp = regs->cp0_cause;
			break;
		case BADVADDR:
			tmp = regs->cp0_badvaddr;
			break;
		case MMHI:
			tmp = regs->hi;
			break;
		case MMLO:
			tmp = regs->lo;
			break;
		case FPC_CSR:
			tmp = child->thread.fpu.fcr31;
			break;
		case FPC_EIR:
			/* implementation / version register */
			tmp = boot_cpu_data.fpu_id;
			break;
		case DSP_BASE ... DSP_BASE + 5: {
			dspreg_t *dregs;

			if (!cpu_has_dsp) {
				tmp = 0;
				ret = -EIO;
				goto out;
			}
			dregs = __get_dsp_regs(child);
			tmp = dregs[addr - DSP_BASE];
			break;
		}
		case DSP_CONTROL:
			if (!cpu_has_dsp) {
				tmp = 0;
				ret = -EIO;
				goto out;
			}
			tmp = child->thread.dsp.dspcontrol;
			break;
		default:
			tmp = 0;
			ret = -EIO;
			goto out;
		}
		ret = put_user(tmp, (unsigned __user *) (unsigned long) data);
		break;
	}

	/*
	 * Write 4 bytes into the other process' storage
	 *  data is the 4 bytes that the user wants written
	 *  addr is a pointer in the user's storage that contains an
	 *	8 byte address in the other process where the 4 bytes
	 *	that is to be written
	 * (this is run in a 32-bit process looking at a 64-bit process)
	 * when I and D space are separate, these will need to be fixed.
	 */
	case PTRACE_POKETEXT_3264:
	case PTRACE_POKEDATA_3264: {
		u32 __user * addrOthers;

		/* Get the addr in the other process that we want to write into */
		ret = -EIO;
		if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0)
			break;
		ret = 0;
		if (ptrace_access_vm(child, (u64)addrOthers, &data,
					sizeof(data),
					FOLL_FORCE | FOLL_WRITE) == sizeof(data))
			break;
		ret = -EIO;
		break;
	}

	case PTRACE_POKEUSR: {
		struct pt_regs *regs;
		ret = 0;
		regs = task_pt_regs(child);

		switch (addr) {
		case 0 ... 31:
			regs->regs[addr] = data;
			/* System call number may have been changed */
			if (addr == 2)
				mips_syscall_update_nr(child, regs);
			else if (addr == 4 &&
				 mips_syscall_is_indirect(child, regs))
				mips_syscall_update_nr(child, regs);
			break;
		case FPR_BASE ... FPR_BASE + 31: {
			union fpureg *fregs = get_fpu_regs(child);

			if (!tsk_used_math(child)) {
				/* FP not yet used  */
				memset(&child->thread.fpu, ~0,
				       sizeof(child->thread.fpu));
				child->thread.fpu.fcr31 = 0;
			}
			if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
				/*
				 * The odd registers are actually the high
				 * order bits of the values stored in the even
				 * registers - unless we're using r2k_switch.S.
				 */
				set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
					  addr & 1, data);
				break;
			}
			set_fpr64(&fregs[addr - FPR_BASE], 0, data);
			break;
		}
		case PC:
			regs->cp0_epc = data;
			break;
		case MMHI:
			regs->hi = data;
			break;
		case MMLO:
			regs->lo = data;
			break;
		case FPC_CSR:
			child->thread.fpu.fcr31 = data;
			break;
		case DSP_BASE ... DSP_BASE + 5: {
			dspreg_t *dregs;

			if (!cpu_has_dsp) {
				ret = -EIO;
				break;
			}

			dregs = __get_dsp_regs(child);
			dregs[addr - DSP_BASE] = data;
			break;
		}
		case DSP_CONTROL:
			if (!cpu_has_dsp) {
				ret = -EIO;
				break;
			}
			child->thread.dsp.dspcontrol = data;
			break;
		default:
			/* The rest are not allowed. */
			ret = -EIO;
			break;
		}
		break;
		}

	case PTRACE_GETREGS:
		ret = ptrace_getregs(child,
				(struct user_pt_regs __user *) (__u64) data);
		break;

	case PTRACE_SETREGS:
		ret = ptrace_setregs(child,
				(struct user_pt_regs __user *) (__u64) data);
		break;

	case PTRACE_GETFPREGS:
		ret = ptrace_getfpregs(child, (__u32 __user *) (__u64) data);
		break;

	case PTRACE_SETFPREGS:
		ret = ptrace_setfpregs(child, (__u32 __user *) (__u64) data);
		break;

	case PTRACE_GET_THREAD_AREA:
		ret = put_user(task_thread_info(child)->tp_value,
				(unsigned int __user *) (unsigned long) data);
		break;

	case PTRACE_GET_THREAD_AREA_3264:
		ret = put_user(task_thread_info(child)->tp_value,
				(unsigned long __user *) (unsigned long) data);
		break;

	case PTRACE_GET_WATCH_REGS:
		ret = ptrace_get_watch_regs(child,
			(struct pt_watch_regs __user *) (unsigned long) addr);
		break;

	case PTRACE_SET_WATCH_REGS:
		ret = ptrace_set_watch_regs(child,
			(struct pt_watch_regs __user *) (unsigned long) addr);
		break;

	default:
		ret = compat_ptrace_request(child, request, addr, data);
		break;
	}
out:
	return ret;
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This file is subject to the terms and conditions of the GNU General Public
	3	* License. See the file "COPYING" in the main directory of this archive
	4	* for more details.
	5	*
	6	* Copyright (C) 1992 Ross Biro
	7	* Copyright (C) Linus Torvalds
	8	* Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
	9	* Copyright (C) 1996 David S. Miller
	10	* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
	11	* Copyright (C) 1999 MIPS Technologies, Inc.
	12	* Copyright (C) 2000 Ulf Carlsson
	13	*
	14	* At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
	15	* binaries.
	16	*/
	17	#include <linux/compiler.h>
5d9a76cd	18	#include <linux/compat.h>
1da177e4 LT	19	#include <linux/kernel.h>
1da177e4 LT	20	#include <linux/sched.h>
68db0cf1	21	#include <linux/sched/task_stack.h>
1da177e4 LT	22	#include <linux/mm.h>
	23	#include <linux/errno.h>
	24	#include <linux/ptrace.h>
	25	#include <linux/smp.h>
1da177e4 LT	26	#include <linux/security.h>
	27
	28	#include <asm/cpu.h>
e50c0a8f	29	#include <asm/dsp.h>
1da177e4 LT	30	#include <asm/fpu.h>
1da177e4 LT	31	#include <asm/mipsregs.h>
101b3531	32	#include <asm/mipsmtregs.h>
1da177e4 LT	33	#include <asm/pgtable.h>
1da177e4 LT	34	#include <asm/page.h>
60be939c	35	#include <asm/reg.h>
de8cd0dc	36	#include <asm/syscall.h>
7c0f6ba6	37	#include <linux/uaccess.h>
1da177e4 LT	38	#include <asm/bootinfo.h>
	39
	40	/*
	41	* Tracing a 32-bit process with a 64-bit strace and vice versa will not
	42	* work. I don't know how to fix this.
	43	*/
5d9a76cd TB	44	long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
5d9a76cd TB	45	compat_ulong_t caddr, compat_ulong_t cdata)
1da177e4	46	{
5d9a76cd TB	47	int addr = caddr;
5d9a76cd TB	48	int data = cdata;
1da177e4 LT	49	int ret;
1da177e4 LT	50
1da177e4	51	switch (request) {
1da177e4	52
ea3d710f DJ	53	/*
	54	* Read 4 bytes of the other process' storage
	55	* data is a pointer specifying where the user wants the
	56	* 4 bytes copied into
	57	* addr is a pointer in the user's storage that contains an 8 byte
	58	* address in the other process of the 4 bytes that is to be read
	59	* (this is run in a 32-bit process looking at a 64-bit process)
	60	* when I and D space are separate, these will need to be fixed.
	61	*/
	62	case PTRACE_PEEKTEXT_3264:
	63	case PTRACE_PEEKDATA_3264: {
	64	u32 tmp;
	65	int copied;
	66	u32 __user * addrOthers;
	67
	68	ret = -EIO;
	69
	70	/* Get the addr in the other process that we want to read */
	71	if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0)
	72	break;
	73
84d77d3f	74	copied = ptrace_access_vm(child, (u64)addrOthers, &tmp,
f307ab6d	75	sizeof(tmp), FOLL_FORCE);
ea3d710f DJ	76	if (copied != sizeof(tmp))
	77	break;
	78	ret = put_user(tmp, (u32 __user *) (unsigned long) data);
	79	break;
	80	}
	81
1da177e4 LT	82	/* Read the word at location addr in the USER area. */
	83	case PTRACE_PEEKUSR: {
	84	struct pt_regs *regs;
bbd426f5	85	union fpureg *fregs;
1da177e4 LT	86	unsigned int tmp;
1da177e4 LT	87
40bc9c67	88	regs = task_pt_regs(child);
1da177e4 LT	89	ret = 0; /* Default return value. */
	90
	91	switch (addr) {
	92	case 0 ... 31:
	93	tmp = regs->regs[addr];
	94	break;
	95	case FPR_BASE ... FPR_BASE + 31:
597ce172 PB	96	if (!tsk_used_math(child)) {
	97	/* FP not yet used */
	98	tmp = -1;
	99	break;
	100	}
	101	fregs = get_fpu_regs(child);
2fd95acc	102	if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
1da177e4 LT	103	/*
	104	* The odd registers are actually the high
	105	* order bits of the values stored in the even
	106	* registers - unless we're using r2k_switch.S.
	107	*/
bbd426f5 PB	108	tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
bbd426f5 PB	109	addr & 1);
597ce172	110	break;
1da177e4	111	}
631edc92	112	tmp = get_fpr64(&fregs[addr - FPR_BASE], 0);
1da177e4 LT	113	break;
	114	case PC:
	115	tmp = regs->cp0_epc;
	116	break;
	117	case CAUSE:
	118	tmp = regs->cp0_cause;
	119	break;
	120	case BADVADDR:
	121	tmp = regs->cp0_badvaddr;
	122	break;
	123	case MMHI:
	124	tmp = regs->hi;
	125	break;
	126	case MMLO:
	127	tmp = regs->lo;
	128	break;
	129	case FPC_CSR:
eae89076	130	tmp = child->thread.fpu.fcr31;
1da177e4	131	break;
3351047f PB	132	case FPC_EIR:
3351047f PB	133	/* implementation / version register */
656ff9be	134	tmp = boot_cpu_data.fpu_id;
1da177e4	135	break;
3055acb0 AN	136	case DSP_BASE ... DSP_BASE + 5: {
	137	dspreg_t *dregs;
	138
e50c0a8f RB	139	if (!cpu_has_dsp) {
	140	tmp = 0;
	141	ret = -EIO;
5d9a76cd	142	goto out;
e50c0a8f	143	}
3055acb0	144	dregs = __get_dsp_regs(child);
b18ebb44	145	tmp = dregs[addr - DSP_BASE];
e50c0a8f	146	break;
3055acb0	147	}
e50c0a8f RB	148	case DSP_CONTROL:
	149	if (!cpu_has_dsp) {
	150	tmp = 0;
	151	ret = -EIO;
5d9a76cd	152	goto out;
e50c0a8f RB	153	}
	154	tmp = child->thread.dsp.dspcontrol;
	155	break;
1da177e4 LT	156	default:
	157	tmp = 0;
	158	ret = -EIO;
5d9a76cd	159	goto out;
1da177e4	160	}
3055acb0	161	ret = put_user(tmp, (unsigned __user *) (unsigned long) data);
1da177e4 LT	162	break;
	163	}
	164
ea3d710f DJ	165	/*
	166	* Write 4 bytes into the other process' storage
	167	* data is the 4 bytes that the user wants written
	168	* addr is a pointer in the user's storage that contains an
	169	* 8 byte address in the other process where the 4 bytes
	170	* that is to be written
	171	* (this is run in a 32-bit process looking at a 64-bit process)
	172	* when I and D space are separate, these will need to be fixed.
	173	*/
	174	case PTRACE_POKETEXT_3264:
	175	case PTRACE_POKEDATA_3264: {
	176	u32 __user * addrOthers;
	177
	178	/* Get the addr in the other process that we want to write into */
	179	ret = -EIO;
	180	if (get_user(addrOthers, (u32 __user * __user *) (unsigned long) addr) != 0)
	181	break;
	182	ret = 0;
84d77d3f	183	if (ptrace_access_vm(child, (u64)addrOthers, &data,
f307ab6d LS	184	sizeof(data),
f307ab6d LS	185	FOLL_FORCE \| FOLL_WRITE) == sizeof(data))
ea3d710f DJ	186	break;
	187	ret = -EIO;
	188	break;
	189	}
	190
1da177e4 LT	191	case PTRACE_POKEUSR: {
	192	struct pt_regs *regs;
	193	ret = 0;
40bc9c67	194	regs = task_pt_regs(child);
1da177e4 LT	195
	196	switch (addr) {
	197	case 0 ... 31:
	198	regs->regs[addr] = data;
de8cd0dc JH	199	/* System call number may have been changed */
	200	if (addr == 2)
	201	mips_syscall_update_nr(child, regs);
	202	else if (addr == 4 &&
	203	mips_syscall_is_indirect(child, regs))
	204	mips_syscall_update_nr(child, regs);
1da177e4 LT	205	break;
1da177e4 LT	206	case FPR_BASE ... FPR_BASE + 31: {
bbd426f5	207	union fpureg *fregs = get_fpu_regs(child);
1da177e4 LT	208
	209	if (!tsk_used_math(child)) {
	210	/* FP not yet used */
eae89076 AN	211	memset(&child->thread.fpu, ~0,
	212	sizeof(child->thread.fpu));
	213	child->thread.fpu.fcr31 = 0;
1da177e4	214	}
2fd95acc	215	if (test_tsk_thread_flag(child, TIF_32BIT_FPREGS)) {
597ce172 PB	216	/*
	217	* The odd registers are actually the high
	218	* order bits of the values stored in the even
	219	* registers - unless we're using r2k_switch.S.
	220	*/
bbd426f5 PB	221	set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
bbd426f5 PB	222	addr & 1, data);
597ce172	223	break;
1da177e4	224	}
bbd426f5	225	set_fpr64(&fregs[addr - FPR_BASE], 0, data);
1da177e4 LT	226	break;
	227	}
	228	case PC:
	229	regs->cp0_epc = data;
	230	break;
	231	case MMHI:
	232	regs->hi = data;
	233	break;
	234	case MMLO:
	235	regs->lo = data;
	236	break;
	237	case FPC_CSR:
eae89076	238	child->thread.fpu.fcr31 = data;
1da177e4	239	break;
3055acb0 AN	240	case DSP_BASE ... DSP_BASE + 5: {
	241	dspreg_t *dregs;
	242
e50c0a8f RB	243	if (!cpu_has_dsp) {
	244	ret = -EIO;
	245	break;
	246	}
	247
3055acb0	248	dregs = __get_dsp_regs(child);
e50c0a8f RB	249	dregs[addr - DSP_BASE] = data;
e50c0a8f RB	250	break;
3055acb0	251	}
e50c0a8f RB	252	case DSP_CONTROL:
	253	if (!cpu_has_dsp) {
	254	ret = -EIO;
	255	break;
	256	}
	257	child->thread.dsp.dspcontrol = data;
	258	break;
1da177e4 LT	259	default:
	260	/* The rest are not allowed. */
	261	ret = -EIO;
	262	break;
	263	}
	264	break;
	265	}
	266
ea3d710f	267	case PTRACE_GETREGS:
a79ebea6 AS	268	ret = ptrace_getregs(child,
a79ebea6 AS	269	(struct user_pt_regs __user *) (__u64) data);
ea3d710f DJ	270	break;
	271
	272	case PTRACE_SETREGS:
a79ebea6 AS	273	ret = ptrace_setregs(child,
a79ebea6 AS	274	(struct user_pt_regs __user *) (__u64) data);
ea3d710f DJ	275	break;
	276
	277	case PTRACE_GETFPREGS:
49a89efb	278	ret = ptrace_getfpregs(child, (__u32 __user *) (__u64) data);
ea3d710f DJ	279	break;
	280
	281	case PTRACE_SETFPREGS:
49a89efb	282	ret = ptrace_setfpregs(child, (__u32 __user *) (__u64) data);
ea3d710f DJ	283	break;
ea3d710f DJ	284
3c37026d	285	case PTRACE_GET_THREAD_AREA:
dc8f6029	286	ret = put_user(task_thread_info(child)->tp_value,
3c37026d RB	287	(unsigned int __user *) (unsigned long) data);
	288	break;
	289
ea3d710f	290	case PTRACE_GET_THREAD_AREA_3264:
dc8f6029	291	ret = put_user(task_thread_info(child)->tp_value,
ea3d710f DJ	292	(unsigned long __user *) (unsigned long) data);
	293	break;
	294
0926bf95 DD	295	case PTRACE_GET_WATCH_REGS:
	296	ret = ptrace_get_watch_regs(child,
	297	(struct pt_watch_regs __user *) (unsigned long) addr);
	298	break;
	299
	300	case PTRACE_SET_WATCH_REGS:
	301	ret = ptrace_set_watch_regs(child,
	302	(struct pt_watch_regs __user *) (unsigned long) addr);
	303	break;
	304
1da177e4	305	default:
797c3f32	306	ret = compat_ptrace_request(child, request, addr, data);
1da177e4 LT	307	break;
1da177e4 LT	308	}
1da177e4	309	out:
1da177e4 LT	310	return ret;
1da177e4 LT	311	}