]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * This program is free software; you can redistribute it and/or | |
3 | * modify it under the terms of the GNU General Public License | |
4 | * as published by the Free Software Foundation; either version 2 | |
5 | * of the License, or (at your option) any later version. | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU General Public License for more details. | |
11 | * | |
12 | * You should have received a copy of the GNU General Public License | |
13 | * along with this program; if not, write to the Free Software | |
14 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
15 | * | |
16 | * Copyright (C) 2000, 2001 Kanoj Sarcar | |
17 | * Copyright (C) 2000, 2001 Ralf Baechle | |
18 | * Copyright (C) 2000, 2001 Silicon Graphics, Inc. | |
19 | * Copyright (C) 2000, 2001, 2003 Broadcom Corporation | |
20 | */ | |
21 | #include <linux/cache.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/spinlock.h> | |
26 | #include <linux/threads.h> | |
27 | #include <linux/module.h> | |
28 | #include <linux/time.h> | |
29 | #include <linux/timex.h> | |
30 | #include <linux/sched.h> | |
31 | #include <linux/cpumask.h> | |
1e35aaba | 32 | #include <linux/cpu.h> |
4e950f6f | 33 | #include <linux/err.h> |
1da177e4 LT |
34 | |
35 | #include <asm/atomic.h> | |
36 | #include <asm/cpu.h> | |
37 | #include <asm/processor.h> | |
38 | #include <asm/system.h> | |
39 | #include <asm/mmu_context.h> | |
40 | #include <asm/smp.h> | |
41 | ||
41c594ab RB |
42 | #ifdef CONFIG_MIPS_MT_SMTC |
43 | #include <asm/mipsmtregs.h> | |
44 | #endif /* CONFIG_MIPS_MT_SMTC */ | |
45 | ||
1da177e4 LT |
46 | cpumask_t phys_cpu_present_map; /* Bitmask of available CPUs */ |
47 | volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */ | |
48 | cpumask_t cpu_online_map; /* Bitmask of currently online CPUs */ | |
49 | int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ | |
50 | int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ | |
51 | ||
52 | EXPORT_SYMBOL(phys_cpu_present_map); | |
53 | EXPORT_SYMBOL(cpu_online_map); | |
54 | ||
1da177e4 | 55 | extern void __init calibrate_delay(void); |
b3f6df9f | 56 | extern void cpu_idle(void); |
1da177e4 LT |
57 | |
58 | /* | |
59 | * First C code run on the secondary CPUs after being started up by | |
60 | * the master. | |
61 | */ | |
4ebd5233 | 62 | asmlinkage __cpuinit void start_secondary(void) |
1da177e4 | 63 | { |
5bfb5d69 | 64 | unsigned int cpu; |
1da177e4 | 65 | |
41c594ab RB |
66 | #ifdef CONFIG_MIPS_MT_SMTC |
67 | /* Only do cpu_probe for first TC of CPU */ | |
68 | if ((read_c0_tcbind() & TCBIND_CURTC) == 0) | |
69 | #endif /* CONFIG_MIPS_MT_SMTC */ | |
1da177e4 LT |
70 | cpu_probe(); |
71 | cpu_report(); | |
72 | per_cpu_trap_init(); | |
73 | prom_init_secondary(); | |
74 | ||
75 | /* | |
76 | * XXX parity protection should be folded in here when it's converted | |
77 | * to an option instead of something based on .cputype | |
78 | */ | |
79 | ||
80 | calibrate_delay(); | |
5bfb5d69 NP |
81 | preempt_disable(); |
82 | cpu = smp_processor_id(); | |
1da177e4 LT |
83 | cpu_data[cpu].udelay_val = loops_per_jiffy; |
84 | ||
85 | prom_smp_finish(); | |
86 | ||
87 | cpu_set(cpu, cpu_callin_map); | |
88 | ||
89 | cpu_idle(); | |
90 | } | |
91 | ||
92 | DEFINE_SPINLOCK(smp_call_lock); | |
93 | ||
94 | struct call_data_struct *call_data; | |
95 | ||
96 | /* | |
97 | * Run a function on all other CPUs. | |
98 | * <func> The function to run. This must be fast and non-blocking. | |
99 | * <info> An arbitrary pointer to pass to the function. | |
100 | * <retry> If true, keep retrying until ready. | |
101 | * <wait> If true, wait until function has completed on other CPUs. | |
102 | * [RETURNS] 0 on success, else a negative status code. | |
103 | * | |
104 | * Does not return until remote CPUs are nearly ready to execute <func> | |
105 | * or are or have executed. | |
106 | * | |
107 | * You must not call this function with disabled interrupts or from a | |
57f0060b RB |
108 | * hardware interrupt handler or from a bottom half handler: |
109 | * | |
110 | * CPU A CPU B | |
111 | * Disable interrupts | |
112 | * smp_call_function() | |
113 | * Take call_lock | |
114 | * Send IPIs | |
115 | * Wait for all cpus to acknowledge IPI | |
116 | * CPU A has not responded, spin waiting | |
117 | * for cpu A to respond, holding call_lock | |
118 | * smp_call_function() | |
119 | * Spin waiting for call_lock | |
120 | * Deadlock Deadlock | |
1da177e4 LT |
121 | */ |
122 | int smp_call_function (void (*func) (void *info), void *info, int retry, | |
123 | int wait) | |
124 | { | |
125 | struct call_data_struct data; | |
126 | int i, cpus = num_online_cpus() - 1; | |
127 | int cpu = smp_processor_id(); | |
128 | ||
ae1b3d51 RB |
129 | /* |
130 | * Can die spectacularly if this CPU isn't yet marked online | |
131 | */ | |
132 | BUG_ON(!cpu_online(cpu)); | |
133 | ||
1da177e4 LT |
134 | if (!cpus) |
135 | return 0; | |
136 | ||
137 | /* Can deadlock when called with interrupts disabled */ | |
138 | WARN_ON(irqs_disabled()); | |
139 | ||
140 | data.func = func; | |
141 | data.info = info; | |
142 | atomic_set(&data.started, 0); | |
143 | data.wait = wait; | |
144 | if (wait) | |
145 | atomic_set(&data.finished, 0); | |
146 | ||
147 | spin_lock(&smp_call_lock); | |
148 | call_data = &data; | |
0004a9df | 149 | smp_mb(); |
1da177e4 LT |
150 | |
151 | /* Send a message to all other CPUs and wait for them to respond */ | |
394e3902 AM |
152 | for_each_online_cpu(i) |
153 | if (i != cpu) | |
1da177e4 LT |
154 | core_send_ipi(i, SMP_CALL_FUNCTION); |
155 | ||
156 | /* Wait for response */ | |
157 | /* FIXME: lock-up detection, backtrace on lock-up */ | |
158 | while (atomic_read(&data.started) != cpus) | |
159 | barrier(); | |
160 | ||
161 | if (wait) | |
162 | while (atomic_read(&data.finished) != cpus) | |
163 | barrier(); | |
41c594ab | 164 | call_data = NULL; |
1da177e4 LT |
165 | spin_unlock(&smp_call_lock); |
166 | ||
167 | return 0; | |
168 | } | |
169 | ||
41c594ab | 170 | |
1da177e4 LT |
171 | void smp_call_function_interrupt(void) |
172 | { | |
173 | void (*func) (void *info) = call_data->func; | |
174 | void *info = call_data->info; | |
175 | int wait = call_data->wait; | |
176 | ||
177 | /* | |
178 | * Notify initiating CPU that I've grabbed the data and am | |
179 | * about to execute the function. | |
180 | */ | |
0004a9df | 181 | smp_mb(); |
1da177e4 LT |
182 | atomic_inc(&call_data->started); |
183 | ||
184 | /* | |
185 | * At this point the info structure may be out of scope unless wait==1. | |
186 | */ | |
187 | irq_enter(); | |
188 | (*func)(info); | |
189 | irq_exit(); | |
190 | ||
191 | if (wait) { | |
0004a9df | 192 | smp_mb(); |
1da177e4 LT |
193 | atomic_inc(&call_data->finished); |
194 | } | |
195 | } | |
196 | ||
197 | static void stop_this_cpu(void *dummy) | |
198 | { | |
199 | /* | |
200 | * Remove this CPU: | |
201 | */ | |
202 | cpu_clear(smp_processor_id(), cpu_online_map); | |
203 | local_irq_enable(); /* May need to service _machine_restart IPI */ | |
204 | for (;;); /* Wait if available. */ | |
205 | } | |
206 | ||
207 | void smp_send_stop(void) | |
208 | { | |
209 | smp_call_function(stop_this_cpu, NULL, 1, 0); | |
210 | } | |
211 | ||
212 | void __init smp_cpus_done(unsigned int max_cpus) | |
213 | { | |
214 | prom_cpus_done(); | |
215 | } | |
216 | ||
217 | /* called from main before smp_init() */ | |
218 | void __init smp_prepare_cpus(unsigned int max_cpus) | |
219 | { | |
1da177e4 LT |
220 | init_new_context(current, &init_mm); |
221 | current_thread_info()->cpu = 0; | |
9b6695a8 | 222 | plat_prepare_cpus(max_cpus); |
320e6aba RB |
223 | #ifndef CONFIG_HOTPLUG_CPU |
224 | cpu_present_map = cpu_possible_map; | |
225 | #endif | |
1da177e4 LT |
226 | } |
227 | ||
228 | /* preload SMP state for boot cpu */ | |
229 | void __devinit smp_prepare_boot_cpu(void) | |
230 | { | |
231 | /* | |
232 | * This assumes that bootup is always handled by the processor | |
233 | * with the logic and physical number 0. | |
234 | */ | |
235 | __cpu_number_map[0] = 0; | |
236 | __cpu_logical_map[0] = 0; | |
237 | cpu_set(0, phys_cpu_present_map); | |
238 | cpu_set(0, cpu_online_map); | |
239 | cpu_set(0, cpu_callin_map); | |
240 | } | |
241 | ||
242 | /* | |
b727a602 RB |
243 | * Called once for each "cpu_possible(cpu)". Needs to spin up the cpu |
244 | * and keep control until "cpu_online(cpu)" is set. Note: cpu is | |
245 | * physical, not logical. | |
1da177e4 | 246 | */ |
b282b6f8 | 247 | int __cpuinit __cpu_up(unsigned int cpu) |
1da177e4 LT |
248 | { |
249 | struct task_struct *idle; | |
250 | ||
251 | /* | |
b727a602 | 252 | * Processor goes to start_secondary(), sets online flag |
1da177e4 LT |
253 | * The following code is purely to make sure |
254 | * Linux can schedule processes on this slave. | |
255 | */ | |
256 | idle = fork_idle(cpu); | |
257 | if (IS_ERR(idle)) | |
b727a602 | 258 | panic(KERN_ERR "Fork failed for CPU %d", cpu); |
1da177e4 LT |
259 | |
260 | prom_boot_secondary(cpu, idle); | |
261 | ||
b727a602 RB |
262 | /* |
263 | * Trust is futile. We should really have timeouts ... | |
264 | */ | |
1da177e4 LT |
265 | while (!cpu_isset(cpu, cpu_callin_map)) |
266 | udelay(100); | |
267 | ||
268 | cpu_set(cpu, cpu_online_map); | |
269 | ||
270 | return 0; | |
271 | } | |
272 | ||
1da177e4 LT |
273 | /* Not really SMP stuff ... */ |
274 | int setup_profiling_timer(unsigned int multiplier) | |
275 | { | |
276 | return 0; | |
277 | } | |
278 | ||
279 | static void flush_tlb_all_ipi(void *info) | |
280 | { | |
281 | local_flush_tlb_all(); | |
282 | } | |
283 | ||
284 | void flush_tlb_all(void) | |
285 | { | |
9a244b95 | 286 | on_each_cpu(flush_tlb_all_ipi, NULL, 1, 1); |
1da177e4 LT |
287 | } |
288 | ||
289 | static void flush_tlb_mm_ipi(void *mm) | |
290 | { | |
291 | local_flush_tlb_mm((struct mm_struct *)mm); | |
292 | } | |
293 | ||
25969354 RB |
294 | /* |
295 | * Special Variant of smp_call_function for use by TLB functions: | |
296 | * | |
297 | * o No return value | |
298 | * o collapses to normal function call on UP kernels | |
299 | * o collapses to normal function call on systems with a single shared | |
300 | * primary cache. | |
301 | * o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core. | |
302 | */ | |
303 | static inline void smp_on_other_tlbs(void (*func) (void *info), void *info) | |
304 | { | |
305 | #ifndef CONFIG_MIPS_MT_SMTC | |
306 | smp_call_function(func, info, 1, 1); | |
307 | #endif | |
308 | } | |
309 | ||
310 | static inline void smp_on_each_tlb(void (*func) (void *info), void *info) | |
311 | { | |
312 | preempt_disable(); | |
313 | ||
314 | smp_on_other_tlbs(func, info); | |
315 | func(info); | |
316 | ||
317 | preempt_enable(); | |
318 | } | |
319 | ||
1da177e4 LT |
320 | /* |
321 | * The following tlb flush calls are invoked when old translations are | |
322 | * being torn down, or pte attributes are changing. For single threaded | |
323 | * address spaces, a new context is obtained on the current cpu, and tlb | |
324 | * context on other cpus are invalidated to force a new context allocation | |
325 | * at switch_mm time, should the mm ever be used on other cpus. For | |
326 | * multithreaded address spaces, intercpu interrupts have to be sent. | |
327 | * Another case where intercpu interrupts are required is when the target | |
328 | * mm might be active on another cpu (eg debuggers doing the flushes on | |
329 | * behalf of debugees, kswapd stealing pages from another process etc). | |
330 | * Kanoj 07/00. | |
331 | */ | |
332 | ||
333 | void flush_tlb_mm(struct mm_struct *mm) | |
334 | { | |
335 | preempt_disable(); | |
336 | ||
337 | if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) { | |
25969354 | 338 | smp_on_other_tlbs(flush_tlb_mm_ipi, (void *)mm); |
1da177e4 LT |
339 | } else { |
340 | int i; | |
341 | for (i = 0; i < num_online_cpus(); i++) | |
342 | if (smp_processor_id() != i) | |
343 | cpu_context(i, mm) = 0; | |
344 | } | |
345 | local_flush_tlb_mm(mm); | |
346 | ||
347 | preempt_enable(); | |
348 | } | |
349 | ||
350 | struct flush_tlb_data { | |
351 | struct vm_area_struct *vma; | |
352 | unsigned long addr1; | |
353 | unsigned long addr2; | |
354 | }; | |
355 | ||
356 | static void flush_tlb_range_ipi(void *info) | |
357 | { | |
358 | struct flush_tlb_data *fd = (struct flush_tlb_data *)info; | |
359 | ||
360 | local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2); | |
361 | } | |
362 | ||
363 | void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) | |
364 | { | |
365 | struct mm_struct *mm = vma->vm_mm; | |
366 | ||
367 | preempt_disable(); | |
368 | if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) { | |
369 | struct flush_tlb_data fd; | |
370 | ||
371 | fd.vma = vma; | |
372 | fd.addr1 = start; | |
373 | fd.addr2 = end; | |
25969354 | 374 | smp_on_other_tlbs(flush_tlb_range_ipi, (void *)&fd); |
1da177e4 LT |
375 | } else { |
376 | int i; | |
377 | for (i = 0; i < num_online_cpus(); i++) | |
378 | if (smp_processor_id() != i) | |
379 | cpu_context(i, mm) = 0; | |
380 | } | |
381 | local_flush_tlb_range(vma, start, end); | |
382 | preempt_enable(); | |
383 | } | |
384 | ||
385 | static void flush_tlb_kernel_range_ipi(void *info) | |
386 | { | |
387 | struct flush_tlb_data *fd = (struct flush_tlb_data *)info; | |
388 | ||
389 | local_flush_tlb_kernel_range(fd->addr1, fd->addr2); | |
390 | } | |
391 | ||
392 | void flush_tlb_kernel_range(unsigned long start, unsigned long end) | |
393 | { | |
394 | struct flush_tlb_data fd; | |
395 | ||
396 | fd.addr1 = start; | |
397 | fd.addr2 = end; | |
398 | on_each_cpu(flush_tlb_kernel_range_ipi, (void *)&fd, 1, 1); | |
399 | } | |
400 | ||
401 | static void flush_tlb_page_ipi(void *info) | |
402 | { | |
403 | struct flush_tlb_data *fd = (struct flush_tlb_data *)info; | |
404 | ||
405 | local_flush_tlb_page(fd->vma, fd->addr1); | |
406 | } | |
407 | ||
408 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) | |
409 | { | |
410 | preempt_disable(); | |
411 | if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) { | |
412 | struct flush_tlb_data fd; | |
413 | ||
414 | fd.vma = vma; | |
415 | fd.addr1 = page; | |
25969354 | 416 | smp_on_other_tlbs(flush_tlb_page_ipi, (void *)&fd); |
1da177e4 LT |
417 | } else { |
418 | int i; | |
419 | for (i = 0; i < num_online_cpus(); i++) | |
420 | if (smp_processor_id() != i) | |
421 | cpu_context(i, vma->vm_mm) = 0; | |
422 | } | |
423 | local_flush_tlb_page(vma, page); | |
424 | preempt_enable(); | |
425 | } | |
426 | ||
427 | static void flush_tlb_one_ipi(void *info) | |
428 | { | |
429 | unsigned long vaddr = (unsigned long) info; | |
430 | ||
431 | local_flush_tlb_one(vaddr); | |
432 | } | |
433 | ||
434 | void flush_tlb_one(unsigned long vaddr) | |
435 | { | |
25969354 | 436 | smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr); |
1da177e4 LT |
437 | } |
438 | ||
439 | EXPORT_SYMBOL(flush_tlb_page); | |
440 | EXPORT_SYMBOL(flush_tlb_one); |