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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1995, 1996, 1997, 2000, 2001, 05 by Ralf Baechle | |
7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | |
8 | * Copyright (C) 2001 MIPS Technologies, Inc. | |
9 | */ | |
a9415644 | 10 | #include <linux/capability.h> |
1da177e4 LT |
11 | #include <linux/errno.h> |
12 | #include <linux/linkage.h> | |
4e950f6f | 13 | #include <linux/fs.h> |
1da177e4 | 14 | #include <linux/smp.h> |
1da177e4 | 15 | #include <linux/ptrace.h> |
1da177e4 LT |
16 | #include <linux/string.h> |
17 | #include <linux/syscalls.h> | |
18 | #include <linux/file.h> | |
1da177e4 LT |
19 | #include <linux/utsname.h> |
20 | #include <linux/unistd.h> | |
21 | #include <linux/sem.h> | |
22 | #include <linux/msg.h> | |
23 | #include <linux/shm.h> | |
24 | #include <linux/compiler.h> | |
cba4fbbf | 25 | #include <linux/ipc.h> |
f1e39a4a | 26 | #include <linux/uaccess.h> |
5a0e3ad6 | 27 | #include <linux/slab.h> |
652b14aa | 28 | #include <linux/elf.h> |
68db0cf1 | 29 | #include <linux/sched/task_stack.h> |
1da177e4 | 30 | |
f1e39a4a | 31 | #include <asm/asm.h> |
1da177e4 LT |
32 | #include <asm/branch.h> |
33 | #include <asm/cachectl.h> | |
34 | #include <asm/cacheflush.h> | |
048eb582 | 35 | #include <asm/asm-offsets.h> |
1da177e4 LT |
36 | #include <asm/signal.h> |
37 | #include <asm/sim.h> | |
38 | #include <asm/shmparam.h> | |
39 | #include <asm/sysmips.h> | |
b81947c6 | 40 | #include <asm/switch_to.h> |
1da177e4 | 41 | |
8213bbf9 RB |
42 | /* |
43 | * For historic reasons the pipe(2) syscall on MIPS has an unusual calling | |
70342287 | 44 | * convention. It returns results in registers $v0 / $v1 which means there |
8213bbf9 | 45 | * is no need for it to do verify the validity of a userspace pointer |
70342287 | 46 | * argument. Historically that used to be expensive in Linux. These days |
8213bbf9 RB |
47 | * the performance advantage is negligible. |
48 | */ | |
974fdb3c | 49 | asmlinkage int sysm_pipe(void) |
1da177e4 LT |
50 | { |
51 | int fd[2]; | |
974fdb3c AV |
52 | int error = do_pipe_flags(fd, 0); |
53 | if (error) | |
54 | return error; | |
55 | current_pt_regs()->regs[3] = fd[1]; | |
56 | return fd[0]; | |
1da177e4 LT |
57 | } |
58 | ||
dbda6ac0 RB |
59 | SYSCALL_DEFINE6(mips_mmap, unsigned long, addr, unsigned long, len, |
60 | unsigned long, prot, unsigned long, flags, unsigned long, | |
61 | fd, off_t, offset) | |
1da177e4 | 62 | { |
1da177e4 | 63 | if (offset & ~PAGE_MASK) |
c9d3fdf3 ME |
64 | return -EINVAL; |
65 | return sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); | |
1da177e4 LT |
66 | } |
67 | ||
dbda6ac0 RB |
68 | SYSCALL_DEFINE6(mips_mmap2, unsigned long, addr, unsigned long, len, |
69 | unsigned long, prot, unsigned long, flags, unsigned long, fd, | |
70 | unsigned long, pgoff) | |
1da177e4 | 71 | { |
947df17c PA |
72 | if (pgoff & (~PAGE_MASK >> 12)) |
73 | return -EINVAL; | |
74 | ||
f8b72560 | 75 | return sys_mmap_pgoff(addr, len, prot, flags, fd, pgoff >> (PAGE_SHIFT-12)); |
1da177e4 LT |
76 | } |
77 | ||
78 | save_static_function(sys_fork); | |
1da177e4 | 79 | save_static_function(sys_clone); |
1da177e4 | 80 | |
dbda6ac0 | 81 | SYSCALL_DEFINE1(set_thread_area, unsigned long, addr) |
3c37026d | 82 | { |
dc8f6029 | 83 | struct thread_info *ti = task_thread_info(current); |
3c37026d RB |
84 | |
85 | ti->tp_value = addr; | |
a3692020 RB |
86 | if (cpu_has_userlocal) |
87 | write_c0_userlocal(addr); | |
06be375b RB |
88 | |
89 | return 0; | |
3c37026d RB |
90 | } |
91 | ||
12890d0f | 92 | static inline int mips_atomic_set(unsigned long addr, unsigned long new) |
1da177e4 | 93 | { |
f1e39a4a | 94 | unsigned long old, tmp; |
12890d0f | 95 | struct pt_regs *regs; |
f1e39a4a RB |
96 | unsigned int err; |
97 | ||
98 | if (unlikely(addr & 3)) | |
99 | return -EINVAL; | |
100 | ||
101 | if (unlikely(!access_ok(VERIFY_WRITE, addr, 4))) | |
102 | return -EINVAL; | |
103 | ||
104 | if (cpu_has_llsc && R10000_LLSC_WAR) { | |
105 | __asm__ __volatile__ ( | |
a809d460 | 106 | " .set arch=r4000 \n" |
f1e39a4a RB |
107 | " li %[err], 0 \n" |
108 | "1: ll %[old], (%[addr]) \n" | |
109 | " move %[tmp], %[new] \n" | |
110 | "2: sc %[tmp], (%[addr]) \n" | |
111 | " beqzl %[tmp], 1b \n" | |
112 | "3: \n" | |
0e525e48 | 113 | " .insn \n" |
f1e39a4a RB |
114 | " .section .fixup,\"ax\" \n" |
115 | "4: li %[err], %[efault] \n" | |
116 | " j 3b \n" | |
117 | " .previous \n" | |
118 | " .section __ex_table,\"a\" \n" | |
119 | " "STR(PTR)" 1b, 4b \n" | |
120 | " "STR(PTR)" 2b, 4b \n" | |
121 | " .previous \n" | |
a91be9ee | 122 | " .set mips0 \n" |
f1e39a4a RB |
123 | : [old] "=&r" (old), |
124 | [err] "=&r" (err), | |
125 | [tmp] "=&r" (tmp) | |
126 | : [addr] "r" (addr), | |
127 | [new] "r" (new), | |
128 | [efault] "i" (-EFAULT) | |
129 | : "memory"); | |
130 | } else if (cpu_has_llsc) { | |
131 | __asm__ __volatile__ ( | |
fee313d4 | 132 | " .set "MIPS_ISA_ARCH_LEVEL" \n" |
f1e39a4a RB |
133 | " li %[err], 0 \n" |
134 | "1: ll %[old], (%[addr]) \n" | |
135 | " move %[tmp], %[new] \n" | |
136 | "2: sc %[tmp], (%[addr]) \n" | |
137 | " bnez %[tmp], 4f \n" | |
138 | "3: \n" | |
0e525e48 | 139 | " .insn \n" |
f1e39a4a RB |
140 | " .subsection 2 \n" |
141 | "4: b 1b \n" | |
142 | " .previous \n" | |
143 | " \n" | |
144 | " .section .fixup,\"ax\" \n" | |
145 | "5: li %[err], %[efault] \n" | |
146 | " j 3b \n" | |
147 | " .previous \n" | |
148 | " .section __ex_table,\"a\" \n" | |
149 | " "STR(PTR)" 1b, 5b \n" | |
150 | " "STR(PTR)" 2b, 5b \n" | |
151 | " .previous \n" | |
a91be9ee | 152 | " .set mips0 \n" |
f1e39a4a RB |
153 | : [old] "=&r" (old), |
154 | [err] "=&r" (err), | |
155 | [tmp] "=&r" (tmp) | |
156 | : [addr] "r" (addr), | |
157 | [new] "r" (new), | |
158 | [efault] "i" (-EFAULT) | |
159 | : "memory"); | |
160 | } else { | |
161 | do { | |
162 | preempt_disable(); | |
163 | ll_bit = 1; | |
164 | ll_task = current; | |
165 | preempt_enable(); | |
166 | ||
167 | err = __get_user(old, (unsigned int *) addr); | |
168 | err |= __put_user(new, (unsigned int *) addr); | |
169 | if (err) | |
170 | break; | |
171 | rmb(); | |
172 | } while (!ll_bit); | |
173 | } | |
174 | ||
175 | if (unlikely(err)) | |
176 | return err; | |
177 | ||
12890d0f | 178 | regs = current_pt_regs(); |
f1e39a4a RB |
179 | regs->regs[2] = old; |
180 | regs->regs[7] = 0; /* No error */ | |
181 | ||
182 | /* | |
183 | * Don't let your children do this ... | |
184 | */ | |
185 | __asm__ __volatile__( | |
186 | " move $29, %0 \n" | |
187 | " j syscall_exit \n" | |
188 | : /* no outputs */ | |
189 | : "r" (regs)); | |
190 | ||
191 | /* unreached. Honestly. */ | |
f2ace931 | 192 | unreachable(); |
f1e39a4a RB |
193 | } |
194 | ||
12890d0f | 195 | SYSCALL_DEFINE3(sysmips, long, cmd, long, arg1, long, arg2) |
f1e39a4a | 196 | { |
293c5bd1 | 197 | switch (cmd) { |
1da177e4 | 198 | case MIPS_ATOMIC_SET: |
12890d0f | 199 | return mips_atomic_set(arg1, arg2); |
1da177e4 LT |
200 | |
201 | case MIPS_FIXADE: | |
293c5bd1 RB |
202 | if (arg1 & ~3) |
203 | return -EINVAL; | |
204 | ||
205 | if (arg1 & 1) | |
206 | set_thread_flag(TIF_FIXADE); | |
207 | else | |
208 | clear_thread_flag(TIF_FIXADE); | |
209 | if (arg1 & 2) | |
210 | set_thread_flag(TIF_LOGADE); | |
211 | else | |
e56293b1 | 212 | clear_thread_flag(TIF_LOGADE); |
293c5bd1 | 213 | |
1da177e4 LT |
214 | return 0; |
215 | ||
216 | case FLUSH_CACHE: | |
217 | __flush_cache_all(); | |
218 | return 0; | |
1da177e4 LT |
219 | } |
220 | ||
221 | return -EINVAL; | |
222 | } | |
223 | ||
1da177e4 LT |
224 | /* |
225 | * No implemented yet ... | |
226 | */ | |
dbda6ac0 | 227 | SYSCALL_DEFINE3(cachectl, char *, addr, int, nbytes, int, op) |
1da177e4 LT |
228 | { |
229 | return -ENOSYS; | |
230 | } | |
231 | ||
232 | /* | |
233 | * If we ever come here the user sp is bad. Zap the process right away. | |
234 | * Due to the bad stack signaling wouldn't work. | |
235 | */ | |
236 | asmlinkage void bad_stack(void) | |
237 | { | |
238 | do_exit(SIGSEGV); | |
239 | } |