[mirror_ubuntu-jammy-kernel.git] / arch / mips / lantiq / clk.c

/*
 *  This program is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU General Public License version 2 as published
 *  by the Free Software Foundation.
 *
 * Copyright (C) 2010 Thomas Langer <thomas.langer@lantiq.com>
 * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
 */
#include <linux/io.h>
#include <linux/export.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/err.h>
#include <linux/list.h>

#include <asm/time.h>
#include <asm/irq.h>
#include <asm/div64.h>

#include <lantiq_soc.h>

#include "clk.h"
#include "prom.h"

/* lantiq socs have 3 static clocks */
static struct clk cpu_clk_generic[3];

void clkdev_add_static(unsigned long cpu, unsigned long fpi, unsigned long io)
{
	cpu_clk_generic[0].rate = cpu;
	cpu_clk_generic[1].rate = fpi;
	cpu_clk_generic[2].rate = io;
}

struct clk *clk_get_cpu(void)
{
	return &cpu_clk_generic[0];
}

struct clk *clk_get_fpi(void)
{
	return &cpu_clk_generic[1];
}
EXPORT_SYMBOL_GPL(clk_get_fpi);

struct clk *clk_get_io(void)
{
	return &cpu_clk_generic[2];
}

static inline int clk_good(struct clk *clk)
{
	return clk && !IS_ERR(clk);
}

unsigned long clk_get_rate(struct clk *clk)
{
	if (unlikely(!clk_good(clk)))
		return 0;

	if (clk->rate != 0)
		return clk->rate;

	if (clk->get_rate != NULL)
		return clk->get_rate();

	return 0;
}
EXPORT_SYMBOL(clk_get_rate);

int clk_set_rate(struct clk *clk, unsigned long rate)
{
	if (unlikely(!clk_good(clk)))
		return 0;
	if (clk->rates && *clk->rates) {
		unsigned long *r = clk->rates;

		while (*r && (*r != rate))
			r++;
		if (!*r) {
			pr_err("clk %s.%s: trying to set invalid rate %ld\n",
				clk->cl.dev_id, clk->cl.con_id, rate);
			return -1;
		}
	}
	clk->rate = rate;
	return 0;
}
EXPORT_SYMBOL(clk_set_rate);

int clk_enable(struct clk *clk)
{
	if (unlikely(!clk_good(clk)))
		return -1;

	if (clk->enable)
		return clk->enable(clk);

	return -1;
}
EXPORT_SYMBOL(clk_enable);

void clk_disable(struct clk *clk)
{
	if (unlikely(!clk_good(clk)))
		return;

	if (clk->disable)
		clk->disable(clk);
}
EXPORT_SYMBOL(clk_disable);

int clk_activate(struct clk *clk)
{
	if (unlikely(!clk_good(clk)))
		return -1;

	if (clk->activate)
		return clk->activate(clk);

	return -1;
}
EXPORT_SYMBOL(clk_activate);

void clk_deactivate(struct clk *clk)
{
	if (unlikely(!clk_good(clk)))
		return;

	if (clk->deactivate)
		clk->deactivate(clk);
}
EXPORT_SYMBOL(clk_deactivate);

struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
{
	return NULL;
}

static inline u32 get_counter_resolution(void)
{
	u32 res;

	__asm__ __volatile__(
		".set   push\n"
		".set   mips32r2\n"
		"rdhwr  %0, $3\n"
		".set pop\n"
		: "=&r" (res)
		: /* no input */
		: "memory");

	return res;
}

void __init plat_time_init(void)
{
	struct clk *clk;

	ltq_soc_init();

	clk = clk_get_cpu();
	mips_hpt_frequency = clk_get_rate(clk) / get_counter_resolution();
	write_c0_compare(read_c0_count());
	pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
	clk_put(clk);
}
Commit	Line	Data
171bb2f1 JC	1	/*
	2	* This program is free software; you can redistribute it and/or modify it
	3	* under the terms of the GNU General Public License version 2 as published
	4	* by the Free Software Foundation.
	5	*
	6	* Copyright (C) 2010 Thomas Langer <thomas.langer@lantiq.com>
	7	* Copyright (C) 2010 John Crispin <blogic@openwrt.org>
	8	*/
	9	#include <linux/io.h>
4af92e7a	10	#include <linux/export.h>
171bb2f1 JC	11	#include <linux/init.h>
	12	#include <linux/kernel.h>
	13	#include <linux/types.h>
	14	#include <linux/clk.h>
287e3f3f	15	#include <linux/clkdev.h>
171bb2f1 JC	16	#include <linux/err.h>
	17	#include <linux/list.h>
	18
	19	#include <asm/time.h>
	20	#include <asm/irq.h>
	21	#include <asm/div64.h>
	22
	23	#include <lantiq_soc.h>
	24
	25	#include "clk.h"
287e3f3f	26	#include "prom.h"
171bb2f1	27
287e3f3f JC	28	/* lantiq socs have 3 static clocks */
287e3f3f JC	29	static struct clk cpu_clk_generic[3];
171bb2f1	30
287e3f3f JC	31	void clkdev_add_static(unsigned long cpu, unsigned long fpi, unsigned long io)
	32	{
	33	cpu_clk_generic[0].rate = cpu;
	34	cpu_clk_generic[1].rate = fpi;
	35	cpu_clk_generic[2].rate = io;
	36	}
171bb2f1	37
287e3f3f JC	38	struct clk *clk_get_cpu(void)
	39	{
	40	return &cpu_clk_generic[0];
	41	}
	42
	43	struct clk *clk_get_fpi(void)
	44	{
	45	return &cpu_clk_generic[1];
	46	}
	47	EXPORT_SYMBOL_GPL(clk_get_fpi);
	48
	49	struct clk *clk_get_io(void)
171bb2f1	50	{
287e3f3f	51	return &cpu_clk_generic[2];
171bb2f1 JC	52	}
	53
	54	static inline int clk_good(struct clk *clk)
	55	{
	56	return clk && !IS_ERR(clk);
	57	}
	58
	59	unsigned long clk_get_rate(struct clk *clk)
	60	{
	61	if (unlikely(!clk_good(clk)))
	62	return 0;
	63
	64	if (clk->rate != 0)
	65	return clk->rate;
	66
	67	if (clk->get_rate != NULL)
	68	return clk->get_rate();
	69
	70	return 0;
	71	}
	72	EXPORT_SYMBOL(clk_get_rate);
	73
287e3f3f	74	int clk_set_rate(struct clk *clk, unsigned long rate)
171bb2f1	75	{
287e3f3f JC	76	if (unlikely(!clk_good(clk)))
	77	return 0;
	78	if (clk->rates && *clk->rates) {
	79	unsigned long *r = clk->rates;
	80
	81	while (r && (r != rate))
	82	r++;
	83	if (!*r) {
	84	pr_err("clk %s.%s: trying to set invalid rate %ld\n",
	85	clk->cl.dev_id, clk->cl.con_id, rate);
	86	return -1;
	87	}
	88	}
	89	clk->rate = rate;
	90	return 0;
171bb2f1	91	}
287e3f3f	92	EXPORT_SYMBOL(clk_set_rate);
171bb2f1	93
744120aa JC	94	int clk_enable(struct clk *clk)
744120aa JC	95	{
287e3f3f JC	96	if (unlikely(!clk_good(clk)))
	97	return -1;
	98
	99	if (clk->enable)
	100	return clk->enable(clk);
	101
	102	return -1;
744120aa JC	103	}
	104	EXPORT_SYMBOL(clk_enable);
	105
	106	void clk_disable(struct clk *clk)
	107	{
287e3f3f JC	108	if (unlikely(!clk_good(clk)))
	109	return;
	110
	111	if (clk->disable)
	112	clk->disable(clk);
744120aa JC	113	}
	114	EXPORT_SYMBOL(clk_disable);
	115
287e3f3f JC	116	int clk_activate(struct clk *clk)
	117	{
	118	if (unlikely(!clk_good(clk)))
	119	return -1;
	120
	121	if (clk->activate)
	122	return clk->activate(clk);
	123
	124	return -1;
	125	}
	126	EXPORT_SYMBOL(clk_activate);
	127
	128	void clk_deactivate(struct clk *clk)
	129	{
	130	if (unlikely(!clk_good(clk)))
	131	return;
	132
	133	if (clk->deactivate)
	134	clk->deactivate(clk);
	135	}
	136	EXPORT_SYMBOL(clk_deactivate);
	137
b902d9a9 JC	138	struct clk of_clk_get_from_provider(struct of_phandle_args clkspec)
	139	{
	140	return NULL;
	141	}
	142
287e3f3f	143	static inline u32 get_counter_resolution(void)
171bb2f1 JC	144	{
	145	u32 res;
	146
	147	__asm__ __volatile__(
	148	".set push\n"
	149	".set mips32r2\n"
	150	"rdhwr %0, $3\n"
	151	".set pop\n"
	152	: "=&r" (res)
	153	: /* no input */
	154	: "memory");
	155
	156	return res;
	157	}
	158
	159	void __init plat_time_init(void)
	160	{
	161	struct clk *clk;
	162
287e3f3f	163	ltq_soc_init();
171bb2f1	164
287e3f3f JC	165	clk = clk_get_cpu();
287e3f3f JC	166	mips_hpt_frequency = clk_get_rate(clk) / get_counter_resolution();
171bb2f1	167	write_c0_compare(read_c0_count());
287e3f3f	168	pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000);
171bb2f1 JC	169	clk_put(clk);
171bb2f1 JC	170	}