[mirror_ubuntu-artful-kernel.git] / arch / mips / loongson64 / common / env.c

/*
 * Based on Ocelot Linux port, which is
 * Copyright 2001 MontaVista Software Inc.
 * Author: jsun@mvista.com or jsun@junsun.net
 *
 * Copyright 2003 ICT CAS
 * Author: Michael Guo <guoyi@ict.ac.cn>
 *
 * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
 * Author: Fuxin Zhang, zhangfx@lemote.com
 *
 * Copyright (C) 2009 Lemote Inc.
 * Author: Wu Zhangjin, wuzhangjin@gmail.com
 *
 * This program is free software; you can redistribute	it and/or modify it
 * under  the terms of	the GNU General	 Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */
#include <linux/export.h>
#include <asm/bootinfo.h>
#include <loongson.h>
#include <boot_param.h>
#include <workarounds.h>

u32 cpu_clock_freq;
EXPORT_SYMBOL(cpu_clock_freq);
struct efi_memory_map_loongson *loongson_memmap;
struct loongson_system_configuration loongson_sysconf;

u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180};
u64 loongson_chiptemp[MAX_PACKAGES];
u64 loongson_freqctrl[MAX_PACKAGES];

unsigned long long smp_group[4];

#define parse_even_earlier(res, option, p)				\
do {									\
	unsigned int tmp __maybe_unused;				\
									\
	if (strncmp(option, (char *)p, strlen(option)) == 0)		\
		tmp = kstrtou32((char *)p + strlen(option"="), 10, &res); \
} while (0)

void __init prom_init_env(void)
{
	/* pmon passes arguments in 32bit pointers */
	unsigned int processor_id;

#ifndef CONFIG_LEFI_FIRMWARE_INTERFACE
	int *_prom_envp;
	long l;

	/* firmware arguments are initialized in head.S */
	_prom_envp = (int *)fw_arg2;

	l = (long)*_prom_envp;
	while (l != 0) {
		parse_even_earlier(cpu_clock_freq, "cpuclock", l);
		parse_even_earlier(memsize, "memsize", l);
		parse_even_earlier(highmemsize, "highmemsize", l);
		_prom_envp++;
		l = (long)*_prom_envp;
	}
	if (memsize == 0)
		memsize = 256;

	loongson_sysconf.nr_uarts = 1;

	pr_info("memsize=%u, highmemsize=%u\n", memsize, highmemsize);
#else
	struct boot_params *boot_p;
	struct loongson_params *loongson_p;
	struct system_loongson *esys;
	struct efi_cpuinfo_loongson *ecpu;
	struct irq_source_routing_table *eirq_source;

	/* firmware arguments are initialized in head.S */
	boot_p = (struct boot_params *)fw_arg2;
	loongson_p = &(boot_p->efi.smbios.lp);

	esys = (struct system_loongson *)
		((u64)loongson_p + loongson_p->system_offset);
	ecpu = (struct efi_cpuinfo_loongson *)
		((u64)loongson_p + loongson_p->cpu_offset);
	eirq_source = (struct irq_source_routing_table *)
		((u64)loongson_p + loongson_p->irq_offset);
	loongson_memmap = (struct efi_memory_map_loongson *)
		((u64)loongson_p + loongson_p->memory_offset);

	cpu_clock_freq = ecpu->cpu_clock_freq;
	loongson_sysconf.cputype = ecpu->cputype;
	if (ecpu->cputype == Loongson_3A) {
		loongson_sysconf.cores_per_node = 4;
		loongson_sysconf.cores_per_package = 4;
		smp_group[0] = 0x900000003ff01000;
		smp_group[1] = 0x900010003ff01000;
		smp_group[2] = 0x900020003ff01000;
		smp_group[3] = 0x900030003ff01000;
		loongson_chipcfg[0] = 0x900000001fe00180;
		loongson_chipcfg[1] = 0x900010001fe00180;
		loongson_chipcfg[2] = 0x900020001fe00180;
		loongson_chipcfg[3] = 0x900030001fe00180;
		loongson_chiptemp[0] = 0x900000001fe0019c;
		loongson_chiptemp[1] = 0x900010001fe0019c;
		loongson_chiptemp[2] = 0x900020001fe0019c;
		loongson_chiptemp[3] = 0x900030001fe0019c;
		loongson_freqctrl[0] = 0x900000001fe001d0;
		loongson_freqctrl[1] = 0x900010001fe001d0;
		loongson_freqctrl[2] = 0x900020001fe001d0;
		loongson_freqctrl[3] = 0x900030001fe001d0;
		loongson_sysconf.ht_control_base = 0x90000EFDFB000000;
		loongson_sysconf.workarounds = WORKAROUND_CPUFREQ;
	} else if (ecpu->cputype == Loongson_3B) {
		loongson_sysconf.cores_per_node = 4; /* One chip has 2 nodes */
		loongson_sysconf.cores_per_package = 8;
		smp_group[0] = 0x900000003ff01000;
		smp_group[1] = 0x900010003ff05000;
		smp_group[2] = 0x900020003ff09000;
		smp_group[3] = 0x900030003ff0d000;
		loongson_chipcfg[0] = 0x900000001fe00180;
		loongson_chipcfg[1] = 0x900020001fe00180;
		loongson_chipcfg[2] = 0x900040001fe00180;
		loongson_chipcfg[3] = 0x900060001fe00180;
		loongson_chiptemp[0] = 0x900000001fe0019c;
		loongson_chiptemp[1] = 0x900020001fe0019c;
		loongson_chiptemp[2] = 0x900040001fe0019c;
		loongson_chiptemp[3] = 0x900060001fe0019c;
		loongson_freqctrl[0] = 0x900000001fe001d0;
		loongson_freqctrl[1] = 0x900020001fe001d0;
		loongson_freqctrl[2] = 0x900040001fe001d0;
		loongson_freqctrl[3] = 0x900060001fe001d0;
		loongson_sysconf.ht_control_base = 0x90001EFDFB000000;
		loongson_sysconf.workarounds = WORKAROUND_CPUHOTPLUG;
	} else {
		loongson_sysconf.cores_per_node = 1;
		loongson_sysconf.cores_per_package = 1;
		loongson_chipcfg[0] = 0x900000001fe00180;
	}

	loongson_sysconf.nr_cpus = ecpu->nr_cpus;
	loongson_sysconf.boot_cpu_id = ecpu->cpu_startup_core_id;
	loongson_sysconf.reserved_cpus_mask = ecpu->reserved_cores_mask;
	if (ecpu->nr_cpus > NR_CPUS || ecpu->nr_cpus == 0)
		loongson_sysconf.nr_cpus = NR_CPUS;
	loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus +
		loongson_sysconf.cores_per_node - 1) /
		loongson_sysconf.cores_per_node;

	loongson_sysconf.pci_mem_start_addr = eirq_source->pci_mem_start_addr;
	loongson_sysconf.pci_mem_end_addr = eirq_source->pci_mem_end_addr;
	loongson_sysconf.pci_io_base = eirq_source->pci_io_start_addr;
	loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits;
	if (loongson_sysconf.dma_mask_bits < 32 ||
		loongson_sysconf.dma_mask_bits > 64)
		loongson_sysconf.dma_mask_bits = 32;

	loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm;
	loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown;
	loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend;

	loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios;
	pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n",
		loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr,
		loongson_sysconf.vgabios_addr);

	memset(loongson_sysconf.ecname, 0, 32);
	if (esys->has_ec)
		memcpy(loongson_sysconf.ecname, esys->ec_name, 32);
	loongson_sysconf.workarounds |= esys->workarounds;

	loongson_sysconf.nr_uarts = esys->nr_uarts;
	if (esys->nr_uarts < 1 || esys->nr_uarts > MAX_UARTS)
		loongson_sysconf.nr_uarts = 1;
	memcpy(loongson_sysconf.uarts, esys->uarts,
		sizeof(struct uart_device) * loongson_sysconf.nr_uarts);

	loongson_sysconf.nr_sensors = esys->nr_sensors;
	if (loongson_sysconf.nr_sensors > MAX_SENSORS)
		loongson_sysconf.nr_sensors = 0;
	if (loongson_sysconf.nr_sensors)
		memcpy(loongson_sysconf.sensors, esys->sensors,
			sizeof(struct sensor_device) * loongson_sysconf.nr_sensors);
#endif
	if (cpu_clock_freq == 0) {
		processor_id = (&current_cpu_data)->processor_id;
		switch (processor_id & PRID_REV_MASK) {
		case PRID_REV_LOONGSON2E:
			cpu_clock_freq = 533080000;
			break;
		case PRID_REV_LOONGSON2F:
			cpu_clock_freq = 797000000;
			break;
		case PRID_REV_LOONGSON3A_R1:
		case PRID_REV_LOONGSON3A_R2:
			cpu_clock_freq = 900000000;
			break;
		case PRID_REV_LOONGSON3B_R1:
		case PRID_REV_LOONGSON3B_R2:
			cpu_clock_freq = 1000000000;
			break;
		default:
			cpu_clock_freq = 100000000;
			break;
		}
	}
	pr_info("CpuClock = %u\n", cpu_clock_freq);
}
Commit	Line	Data
bd92aa01 WZ	1	/*
	2	* Based on Ocelot Linux port, which is
	3	* Copyright 2001 MontaVista Software Inc.
	4	* Author: jsun@mvista.com or jsun@junsun.net
	5	*
	6	* Copyright 2003 ICT CAS
	7	* Author: Michael Guo <guoyi@ict.ac.cn>
	8	*
0bb383a2	9	* Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
bd92aa01 WZ	10	* Author: Fuxin Zhang, zhangfx@lemote.com
bd92aa01 WZ	11	*
f7a904df WZ	12	* Copyright (C) 2009 Lemote Inc.
f7a904df WZ	13	* Author: Wu Zhangjin, wuzhangjin@gmail.com
bd92aa01	14	*
70342287 RB	15	* This program is free software; you can redistribute it and/or modify it
70342287 RB	16	* under the terms of the GNU General Public License as published by the
bd92aa01 WZ	17	* Free Software Foundation; either version 2 of the License, or (at your
	18	* option) any later version.
	19	*/
26dd3e4f	20	#include <linux/export.h>
bd92aa01	21	#include <asm/bootinfo.h>
5e983ff6	22	#include <loongson.h>
1a08f152	23	#include <boot_param.h>
3adeb256	24	#include <workarounds.h>
5e983ff6	25
1a08f152	26	u32 cpu_clock_freq;
f8ede0f7	27	EXPORT_SYMBOL(cpu_clock_freq);
1a08f152 HC	28	struct efi_memory_map_loongson *loongson_memmap;
1a08f152 HC	29	struct loongson_system_configuration loongson_sysconf;
bd92aa01	30
140e39c1	31	u64 loongson_chipcfg[MAX_PACKAGES] = {0xffffffffbfc00180};
64f09aa9	32	u64 loongson_chiptemp[MAX_PACKAGES];
e7841be5 HC	33	u64 loongson_freqctrl[MAX_PACKAGES];
	34
	35	unsigned long long smp_group[4];
140e39c1	36
bd92aa01 WZ	37	#define parse_even_earlier(res, option, p) \
bd92aa01 WZ	38	do { \
c87444af RB	39	unsigned int tmp __maybe_unused; \
c87444af RB	40	\
bd92aa01	41	if (strncmp(option, (char *)p, strlen(option)) == 0) \
1a08f152	42	tmp = kstrtou32((char *)p + strlen(option"="), 10, &res); \
bd92aa01 WZ	43	} while (0)
	44
	45	void __init prom_init_env(void)
	46	{
eb11df47	47	/* pmon passes arguments in 32bit pointers */
eb11df47	48	unsigned int processor_id;
1a08f152 HC	49
	50	#ifndef CONFIG_LEFI_FIRMWARE_INTERFACE
	51	int *_prom_envp;
bd92aa01 WZ	52	long l;
	53
	54	/* firmware arguments are initialized in head.S */
	55	_prom_envp = (int *)fw_arg2;
	56
	57	l = (long)*_prom_envp;
	58	while (l != 0) {
bd92aa01 WZ	59	parse_even_earlier(cpu_clock_freq, "cpuclock", l);
	60	parse_even_earlier(memsize, "memsize", l);
	61	parse_even_earlier(highmemsize, "highmemsize", l);
	62	_prom_envp++;
	63	l = (long)*_prom_envp;
	64	}
	65	if (memsize == 0)
	66	memsize = 256;
fc2ca674 GR	67
	68	loongson_sysconf.nr_uarts = 1;
	69
1a08f152 HC	70	pr_info("memsize=%u, highmemsize=%u\n", memsize, highmemsize);
	71	#else
	72	struct boot_params *boot_p;
	73	struct loongson_params *loongson_p;
3adeb256	74	struct system_loongson *esys;
1a08f152 HC	75	struct efi_cpuinfo_loongson *ecpu;
	76	struct irq_source_routing_table *eirq_source;
	77
	78	/* firmware arguments are initialized in head.S */
	79	boot_p = (struct boot_params *)fw_arg2;
	80	loongson_p = &(boot_p->efi.smbios.lp);
	81
3adeb256 HC	82	esys = (struct system_loongson *)
3adeb256 HC	83	((u64)loongson_p + loongson_p->system_offset);
1a08f152 HC	84	ecpu = (struct efi_cpuinfo_loongson *)
	85	((u64)loongson_p + loongson_p->cpu_offset);
	86	eirq_source = (struct irq_source_routing_table *)
	87	((u64)loongson_p + loongson_p->irq_offset);
	88	loongson_memmap = (struct efi_memory_map_loongson *)
	89	((u64)loongson_p + loongson_p->memory_offset);
	90
	91	cpu_clock_freq = ecpu->cpu_clock_freq;
	92	loongson_sysconf.cputype = ecpu->cputype;
140e39c1	93	if (ecpu->cputype == Loongson_3A) {
c4617318 HC	94	loongson_sysconf.cores_per_node = 4;
c4617318 HC	95	loongson_sysconf.cores_per_package = 4;
e7841be5 HC	96	smp_group[0] = 0x900000003ff01000;
	97	smp_group[1] = 0x900010003ff01000;
	98	smp_group[2] = 0x900020003ff01000;
	99	smp_group[3] = 0x900030003ff01000;
140e39c1 HC	100	loongson_chipcfg[0] = 0x900000001fe00180;
	101	loongson_chipcfg[1] = 0x900010001fe00180;
	102	loongson_chipcfg[2] = 0x900020001fe00180;
	103	loongson_chipcfg[3] = 0x900030001fe00180;
64f09aa9 HC	104	loongson_chiptemp[0] = 0x900000001fe0019c;
	105	loongson_chiptemp[1] = 0x900010001fe0019c;
	106	loongson_chiptemp[2] = 0x900020001fe0019c;
	107	loongson_chiptemp[3] = 0x900030001fe0019c;
b2edcfc8 HC	108	loongson_freqctrl[0] = 0x900000001fe001d0;
	109	loongson_freqctrl[1] = 0x900010001fe001d0;
	110	loongson_freqctrl[2] = 0x900020001fe001d0;
	111	loongson_freqctrl[3] = 0x900030001fe001d0;
e7841be5	112	loongson_sysconf.ht_control_base = 0x90000EFDFB000000;
3adeb256	113	loongson_sysconf.workarounds = WORKAROUND_CPUFREQ;
e7841be5 HC	114	} else if (ecpu->cputype == Loongson_3B) {
	115	loongson_sysconf.cores_per_node = 4; /* One chip has 2 nodes */
	116	loongson_sysconf.cores_per_package = 8;
	117	smp_group[0] = 0x900000003ff01000;
	118	smp_group[1] = 0x900010003ff05000;
	119	smp_group[2] = 0x900020003ff09000;
	120	smp_group[3] = 0x900030003ff0d000;
	121	loongson_chipcfg[0] = 0x900000001fe00180;
	122	loongson_chipcfg[1] = 0x900020001fe00180;
	123	loongson_chipcfg[2] = 0x900040001fe00180;
	124	loongson_chipcfg[3] = 0x900060001fe00180;
64f09aa9 HC	125	loongson_chiptemp[0] = 0x900000001fe0019c;
	126	loongson_chiptemp[1] = 0x900020001fe0019c;
	127	loongson_chiptemp[2] = 0x900040001fe0019c;
	128	loongson_chiptemp[3] = 0x900060001fe0019c;
e7841be5 HC	129	loongson_freqctrl[0] = 0x900000001fe001d0;
	130	loongson_freqctrl[1] = 0x900020001fe001d0;
	131	loongson_freqctrl[2] = 0x900040001fe001d0;
	132	loongson_freqctrl[3] = 0x900060001fe001d0;
	133	loongson_sysconf.ht_control_base = 0x90001EFDFB000000;
3adeb256	134	loongson_sysconf.workarounds = WORKAROUND_CPUHOTPLUG;
140e39c1	135	} else {
c4617318 HC	136	loongson_sysconf.cores_per_node = 1;
c4617318 HC	137	loongson_sysconf.cores_per_package = 1;
140e39c1 HC	138	loongson_chipcfg[0] = 0x900000001fe00180;
	139	}
	140
1a08f152	141	loongson_sysconf.nr_cpus = ecpu->nr_cpus;
ec0f8d3f HC	142	loongson_sysconf.boot_cpu_id = ecpu->cpu_startup_core_id;
ec0f8d3f HC	143	loongson_sysconf.reserved_cpus_mask = ecpu->reserved_cores_mask;
1a08f152 HC	144	if (ecpu->nr_cpus > NR_CPUS \|\| ecpu->nr_cpus == 0)
1a08f152 HC	145	loongson_sysconf.nr_cpus = NR_CPUS;
c4617318 HC	146	loongson_sysconf.nr_nodes = (loongson_sysconf.nr_cpus +
	147	loongson_sysconf.cores_per_node - 1) /
	148	loongson_sysconf.cores_per_node;
1a08f152 HC	149
	150	loongson_sysconf.pci_mem_start_addr = eirq_source->pci_mem_start_addr;
	151	loongson_sysconf.pci_mem_end_addr = eirq_source->pci_mem_end_addr;
	152	loongson_sysconf.pci_io_base = eirq_source->pci_io_start_addr;
	153	loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits;
	154	if (loongson_sysconf.dma_mask_bits < 32 \|\|
	155	loongson_sysconf.dma_mask_bits > 64)
	156	loongson_sysconf.dma_mask_bits = 32;
	157
	158	loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm;
	159	loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown;
	160	loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend;
	161
1a08f152 HC	162	loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios;
	163	pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n",
	164	loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr,
	165	loongson_sysconf.vgabios_addr);
3adeb256 HC	166
	167	memset(loongson_sysconf.ecname, 0, 32);
	168	if (esys->has_ec)
	169	memcpy(loongson_sysconf.ecname, esys->ec_name, 32);
	170	loongson_sysconf.workarounds \|= esys->workarounds;
	171
	172	loongson_sysconf.nr_uarts = esys->nr_uarts;
	173	if (esys->nr_uarts < 1 \|\| esys->nr_uarts > MAX_UARTS)
	174	loongson_sysconf.nr_uarts = 1;
	175	memcpy(loongson_sysconf.uarts, esys->uarts,
	176	sizeof(struct uart_device) * loongson_sysconf.nr_uarts);
	177
	178	loongson_sysconf.nr_sensors = esys->nr_sensors;
	179	if (loongson_sysconf.nr_sensors > MAX_SENSORS)
	180	loongson_sysconf.nr_sensors = 0;
	181	if (loongson_sysconf.nr_sensors)
	182	memcpy(loongson_sysconf.sensors, esys->sensors,
	183	sizeof(struct sensor_device) * loongson_sysconf.nr_sensors);
1a08f152	184	#endif
eb11df47 WZ	185	if (cpu_clock_freq == 0) {
	186	processor_id = (&current_cpu_data)->processor_id;
	187	switch (processor_id & PRID_REV_MASK) {
	188	case PRID_REV_LOONGSON2E:
	189	cpu_clock_freq = 533080000;
	190	break;
	191	case PRID_REV_LOONGSON2F:
	192	cpu_clock_freq = 797000000;
	193	break;
b2edcfc8 HC	194	case PRID_REV_LOONGSON3A_R1:
b2edcfc8 HC	195	case PRID_REV_LOONGSON3A_R2:
1a08f152 HC	196	cpu_clock_freq = 900000000;
1a08f152 HC	197	break;
e7841be5 HC	198	case PRID_REV_LOONGSON3B_R1:
	199	case PRID_REV_LOONGSON3B_R2:
	200	cpu_clock_freq = 1000000000;
	201	break;
eb11df47 WZ	202	default:
	203	cpu_clock_freq = 100000000;
	204	break;
	205	}
	206	}
1a08f152	207	pr_info("CpuClock = %u\n", cpu_clock_freq);
bd92aa01	208	}