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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1994 - 2000 Ralf Baechle | |
7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | |
8 | * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com | |
9 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. | |
10 | */ | |
b868868a | 11 | #include <linux/bug.h> |
1da177e4 LT |
12 | #include <linux/init.h> |
13 | #include <linux/module.h> | |
14 | #include <linux/signal.h> | |
15 | #include <linux/sched.h> | |
631330f5 | 16 | #include <linux/smp.h> |
1da177e4 LT |
17 | #include <linux/kernel.h> |
18 | #include <linux/errno.h> | |
19 | #include <linux/string.h> | |
20 | #include <linux/types.h> | |
21 | #include <linux/pagemap.h> | |
22 | #include <linux/ptrace.h> | |
23 | #include <linux/mman.h> | |
24 | #include <linux/mm.h> | |
25 | #include <linux/bootmem.h> | |
26 | #include <linux/highmem.h> | |
27 | #include <linux/swap.h> | |
3d503753 | 28 | #include <linux/proc_fs.h> |
22a9835c | 29 | #include <linux/pfn.h> |
0f334a3e | 30 | #include <linux/hardirq.h> |
1da177e4 | 31 | |
9975e77d | 32 | #include <asm/asm-offsets.h> |
1da177e4 LT |
33 | #include <asm/bootinfo.h> |
34 | #include <asm/cachectl.h> | |
35 | #include <asm/cpu.h> | |
36 | #include <asm/dma.h> | |
f8829cae | 37 | #include <asm/kmap_types.h> |
1da177e4 LT |
38 | #include <asm/mmu_context.h> |
39 | #include <asm/sections.h> | |
40 | #include <asm/pgtable.h> | |
41 | #include <asm/pgalloc.h> | |
42 | #include <asm/tlb.h> | |
f8829cae RB |
43 | #include <asm/fixmap.h> |
44 | ||
45 | /* Atomicity and interruptability */ | |
46 | #ifdef CONFIG_MIPS_MT_SMTC | |
47 | ||
48 | #include <asm/mipsmtregs.h> | |
49 | ||
50 | #define ENTER_CRITICAL(flags) \ | |
51 | { \ | |
52 | unsigned int mvpflags; \ | |
53 | local_irq_save(flags);\ | |
54 | mvpflags = dvpe() | |
55 | #define EXIT_CRITICAL(flags) \ | |
56 | evpe(mvpflags); \ | |
57 | local_irq_restore(flags); \ | |
58 | } | |
59 | #else | |
60 | ||
61 | #define ENTER_CRITICAL(flags) local_irq_save(flags) | |
62 | #define EXIT_CRITICAL(flags) local_irq_restore(flags) | |
63 | ||
64 | #endif /* CONFIG_MIPS_MT_SMTC */ | |
1da177e4 LT |
65 | |
66 | DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); | |
67 | ||
1da177e4 LT |
68 | /* |
69 | * We have up to 8 empty zeroed pages so we can map one of the right colour | |
70 | * when needed. This is necessary only on R4000 / R4400 SC and MC versions | |
71 | * where we have to avoid VCED / VECI exceptions for good performance at | |
72 | * any price. Since page is never written to after the initialization we | |
73 | * don't have to care about aliases on other CPUs. | |
74 | */ | |
75 | unsigned long empty_zero_page, zero_page_mask; | |
497d2adc | 76 | EXPORT_SYMBOL_GPL(empty_zero_page); |
1da177e4 LT |
77 | |
78 | /* | |
79 | * Not static inline because used by IP27 special magic initialization code | |
80 | */ | |
81 | unsigned long setup_zero_pages(void) | |
82 | { | |
8dfcc9ba NP |
83 | unsigned int order; |
84 | unsigned long size; | |
1da177e4 LT |
85 | struct page *page; |
86 | ||
87 | if (cpu_has_vce) | |
88 | order = 3; | |
89 | else | |
90 | order = 0; | |
91 | ||
92 | empty_zero_page = __get_free_pages(GFP_KERNEL | __GFP_ZERO, order); | |
93 | if (!empty_zero_page) | |
94 | panic("Oh boy, that early out of memory?"); | |
95 | ||
99e3b942 | 96 | page = virt_to_page((void *)empty_zero_page); |
8dfcc9ba | 97 | split_page(page, order); |
99e3b942 | 98 | while (page < virt_to_page((void *)(empty_zero_page + (PAGE_SIZE << order)))) { |
68352e6e | 99 | SetPageReserved(page); |
1da177e4 LT |
100 | page++; |
101 | } | |
102 | ||
103 | size = PAGE_SIZE << order; | |
104 | zero_page_mask = (size - 1) & PAGE_MASK; | |
105 | ||
106 | return 1UL << order; | |
107 | } | |
108 | ||
f8829cae RB |
109 | #ifdef CONFIG_MIPS_MT_SMTC |
110 | static pte_t *kmap_coherent_pte; | |
111 | static void __init kmap_coherent_init(void) | |
112 | { | |
113 | unsigned long vaddr; | |
114 | ||
115 | /* cache the first coherent kmap pte */ | |
116 | vaddr = __fix_to_virt(FIX_CMAP_BEGIN); | |
117 | kmap_coherent_pte = kmap_get_fixmap_pte(vaddr); | |
118 | } | |
119 | #else | |
120 | static inline void kmap_coherent_init(void) {} | |
121 | #endif | |
122 | ||
7575a49f | 123 | void *kmap_coherent(struct page *page, unsigned long addr) |
f8829cae RB |
124 | { |
125 | enum fixed_addresses idx; | |
126 | unsigned long vaddr, flags, entrylo; | |
127 | unsigned long old_ctx; | |
128 | pte_t pte; | |
129 | int tlbidx; | |
130 | ||
b868868a RB |
131 | BUG_ON(Page_dcache_dirty(page)); |
132 | ||
f8829cae RB |
133 | inc_preempt_count(); |
134 | idx = (addr >> PAGE_SHIFT) & (FIX_N_COLOURS - 1); | |
135 | #ifdef CONFIG_MIPS_MT_SMTC | |
0f334a3e KC |
136 | idx += FIX_N_COLOURS * smp_processor_id() + |
137 | (in_interrupt() ? (FIX_N_COLOURS * NR_CPUS) : 0); | |
138 | #else | |
139 | idx += in_interrupt() ? FIX_N_COLOURS : 0; | |
f8829cae RB |
140 | #endif |
141 | vaddr = __fix_to_virt(FIX_CMAP_END - idx); | |
142 | pte = mk_pte(page, PAGE_KERNEL); | |
962f480e | 143 | #if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32) |
f8829cae RB |
144 | entrylo = pte.pte_high; |
145 | #else | |
146 | entrylo = pte_val(pte) >> 6; | |
147 | #endif | |
148 | ||
149 | ENTER_CRITICAL(flags); | |
150 | old_ctx = read_c0_entryhi(); | |
151 | write_c0_entryhi(vaddr & (PAGE_MASK << 1)); | |
152 | write_c0_entrylo0(entrylo); | |
153 | write_c0_entrylo1(entrylo); | |
154 | #ifdef CONFIG_MIPS_MT_SMTC | |
155 | set_pte(kmap_coherent_pte - (FIX_CMAP_END - idx), pte); | |
156 | /* preload TLB instead of local_flush_tlb_one() */ | |
157 | mtc0_tlbw_hazard(); | |
158 | tlb_probe(); | |
159 | tlb_probe_hazard(); | |
160 | tlbidx = read_c0_index(); | |
161 | mtc0_tlbw_hazard(); | |
162 | if (tlbidx < 0) | |
163 | tlb_write_random(); | |
164 | else | |
165 | tlb_write_indexed(); | |
166 | #else | |
167 | tlbidx = read_c0_wired(); | |
168 | write_c0_wired(tlbidx + 1); | |
169 | write_c0_index(tlbidx); | |
170 | mtc0_tlbw_hazard(); | |
171 | tlb_write_indexed(); | |
172 | #endif | |
173 | tlbw_use_hazard(); | |
174 | write_c0_entryhi(old_ctx); | |
175 | EXIT_CRITICAL(flags); | |
176 | ||
177 | return (void*) vaddr; | |
178 | } | |
179 | ||
180 | #define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1))) | |
181 | ||
eacb9d61 | 182 | void kunmap_coherent(void) |
f8829cae RB |
183 | { |
184 | #ifndef CONFIG_MIPS_MT_SMTC | |
185 | unsigned int wired; | |
186 | unsigned long flags, old_ctx; | |
187 | ||
188 | ENTER_CRITICAL(flags); | |
189 | old_ctx = read_c0_entryhi(); | |
190 | wired = read_c0_wired() - 1; | |
191 | write_c0_wired(wired); | |
192 | write_c0_index(wired); | |
193 | write_c0_entryhi(UNIQUE_ENTRYHI(wired)); | |
194 | write_c0_entrylo0(0); | |
195 | write_c0_entrylo1(0); | |
196 | mtc0_tlbw_hazard(); | |
197 | tlb_write_indexed(); | |
198 | tlbw_use_hazard(); | |
199 | write_c0_entryhi(old_ctx); | |
200 | EXIT_CRITICAL(flags); | |
201 | #endif | |
202 | dec_preempt_count(); | |
203 | preempt_check_resched(); | |
204 | } | |
205 | ||
bcd02280 AN |
206 | void copy_user_highpage(struct page *to, struct page *from, |
207 | unsigned long vaddr, struct vm_area_struct *vma) | |
208 | { | |
209 | void *vfrom, *vto; | |
210 | ||
211 | vto = kmap_atomic(to, KM_USER1); | |
9a74b3eb RB |
212 | if (cpu_has_dc_aliases && |
213 | page_mapped(from) && !Page_dcache_dirty(from)) { | |
bcd02280 AN |
214 | vfrom = kmap_coherent(from, vaddr); |
215 | copy_page(vto, vfrom); | |
eacb9d61 | 216 | kunmap_coherent(); |
bcd02280 AN |
217 | } else { |
218 | vfrom = kmap_atomic(from, KM_USER0); | |
219 | copy_page(vto, vfrom); | |
220 | kunmap_atomic(vfrom, KM_USER0); | |
221 | } | |
39b8d525 | 222 | if ((!cpu_has_ic_fills_f_dc) || |
bcd02280 AN |
223 | pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) |
224 | flush_data_cache_page((unsigned long)vto); | |
225 | kunmap_atomic(vto, KM_USER1); | |
226 | /* Make sure this page is cleared on other CPU's too before using it */ | |
227 | smp_wmb(); | |
228 | } | |
229 | ||
f8829cae RB |
230 | void copy_to_user_page(struct vm_area_struct *vma, |
231 | struct page *page, unsigned long vaddr, void *dst, const void *src, | |
232 | unsigned long len) | |
233 | { | |
9a74b3eb RB |
234 | if (cpu_has_dc_aliases && |
235 | page_mapped(page) && !Page_dcache_dirty(page)) { | |
f8829cae RB |
236 | void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); |
237 | memcpy(vto, src, len); | |
eacb9d61 | 238 | kunmap_coherent(); |
985c30ef | 239 | } else { |
f8829cae | 240 | memcpy(dst, src, len); |
985c30ef RB |
241 | if (cpu_has_dc_aliases) |
242 | SetPageDcacheDirty(page); | |
243 | } | |
f8829cae RB |
244 | if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc) |
245 | flush_cache_page(vma, vaddr, page_to_pfn(page)); | |
246 | } | |
247 | ||
f8829cae RB |
248 | void copy_from_user_page(struct vm_area_struct *vma, |
249 | struct page *page, unsigned long vaddr, void *dst, const void *src, | |
250 | unsigned long len) | |
251 | { | |
9a74b3eb RB |
252 | if (cpu_has_dc_aliases && |
253 | page_mapped(page) && !Page_dcache_dirty(page)) { | |
985c30ef | 254 | void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); |
f8829cae | 255 | memcpy(dst, vfrom, len); |
eacb9d61 | 256 | kunmap_coherent(); |
985c30ef | 257 | } else { |
f8829cae | 258 | memcpy(dst, src, len); |
985c30ef RB |
259 | if (cpu_has_dc_aliases) |
260 | SetPageDcacheDirty(page); | |
261 | } | |
f8829cae RB |
262 | } |
263 | ||
84fd089a | 264 | void __init fixrange_init(unsigned long start, unsigned long end, |
1da177e4 LT |
265 | pgd_t *pgd_base) |
266 | { | |
f8829cae | 267 | #if defined(CONFIG_HIGHMEM) || defined(CONFIG_MIPS_MT_SMTC) |
1da177e4 | 268 | pgd_t *pgd; |
c6e8b587 | 269 | pud_t *pud; |
1da177e4 LT |
270 | pmd_t *pmd; |
271 | pte_t *pte; | |
c6e8b587 | 272 | int i, j, k; |
1da177e4 LT |
273 | unsigned long vaddr; |
274 | ||
275 | vaddr = start; | |
276 | i = __pgd_offset(vaddr); | |
c6e8b587 RB |
277 | j = __pud_offset(vaddr); |
278 | k = __pmd_offset(vaddr); | |
1da177e4 LT |
279 | pgd = pgd_base + i; |
280 | ||
281 | for ( ; (i < PTRS_PER_PGD) && (vaddr != end); pgd++, i++) { | |
c6e8b587 RB |
282 | pud = (pud_t *)pgd; |
283 | for ( ; (j < PTRS_PER_PUD) && (vaddr != end); pud++, j++) { | |
284 | pmd = (pmd_t *)pud; | |
285 | for (; (k < PTRS_PER_PMD) && (vaddr != end); pmd++, k++) { | |
286 | if (pmd_none(*pmd)) { | |
287 | pte = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); | |
f8829cae | 288 | set_pmd(pmd, __pmd((unsigned long)pte)); |
b72b7092 | 289 | BUG_ON(pte != pte_offset_kernel(pmd, 0)); |
c6e8b587 RB |
290 | } |
291 | vaddr += PMD_SIZE; | |
1da177e4 | 292 | } |
c6e8b587 | 293 | k = 0; |
1da177e4 LT |
294 | } |
295 | j = 0; | |
296 | } | |
f8829cae | 297 | #endif |
1da177e4 | 298 | } |
1da177e4 | 299 | |
b4819b59 | 300 | #ifndef CONFIG_NEED_MULTIPLE_NODES |
565200a1 AN |
301 | static int __init page_is_ram(unsigned long pagenr) |
302 | { | |
303 | int i; | |
304 | ||
305 | for (i = 0; i < boot_mem_map.nr_map; i++) { | |
306 | unsigned long addr, end; | |
307 | ||
308 | if (boot_mem_map.map[i].type != BOOT_MEM_RAM) | |
309 | /* not usable memory */ | |
310 | continue; | |
311 | ||
312 | addr = PFN_UP(boot_mem_map.map[i].addr); | |
313 | end = PFN_DOWN(boot_mem_map.map[i].addr + | |
314 | boot_mem_map.map[i].size); | |
315 | ||
316 | if (pagenr >= addr && pagenr < end) | |
317 | return 1; | |
318 | } | |
319 | ||
320 | return 0; | |
321 | } | |
322 | ||
1da177e4 LT |
323 | void __init paging_init(void) |
324 | { | |
cce335ae RB |
325 | unsigned long max_zone_pfns[MAX_NR_ZONES]; |
326 | unsigned long lastpfn; | |
1da177e4 LT |
327 | |
328 | pagetable_init(); | |
329 | ||
330 | #ifdef CONFIG_HIGHMEM | |
331 | kmap_init(); | |
332 | #endif | |
f8829cae | 333 | kmap_coherent_init(); |
1da177e4 | 334 | |
05502339 | 335 | #ifdef CONFIG_ZONE_DMA |
cce335ae | 336 | max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN; |
1da177e4 | 337 | #endif |
cce335ae RB |
338 | #ifdef CONFIG_ZONE_DMA32 |
339 | max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN; | |
340 | #endif | |
341 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; | |
342 | lastpfn = max_low_pfn; | |
1da177e4 | 343 | #ifdef CONFIG_HIGHMEM |
cce335ae RB |
344 | max_zone_pfns[ZONE_HIGHMEM] = highend_pfn; |
345 | lastpfn = highend_pfn; | |
cbb8fc07 | 346 | |
cce335ae | 347 | if (cpu_has_dc_aliases && max_low_pfn != highend_pfn) { |
cbb8fc07 | 348 | printk(KERN_WARNING "This processor doesn't support highmem." |
cce335ae RB |
349 | " %ldk highmem ignored\n", |
350 | (highend_pfn - max_low_pfn) << (PAGE_SHIFT - 10)); | |
351 | max_zone_pfns[ZONE_HIGHMEM] = max_low_pfn; | |
352 | lastpfn = max_low_pfn; | |
cbb8fc07 | 353 | } |
1da177e4 LT |
354 | #endif |
355 | ||
cce335ae | 356 | free_area_init_nodes(max_zone_pfns); |
1da177e4 LT |
357 | } |
358 | ||
3d503753 DJ |
359 | #ifdef CONFIG_64BIT |
360 | static struct kcore_list kcore_kseg0; | |
361 | #endif | |
362 | ||
1da177e4 LT |
363 | void __init mem_init(void) |
364 | { | |
365 | unsigned long codesize, reservedpages, datasize, initsize; | |
366 | unsigned long tmp, ram; | |
367 | ||
368 | #ifdef CONFIG_HIGHMEM | |
369 | #ifdef CONFIG_DISCONTIGMEM | |
370 | #error "CONFIG_HIGHMEM and CONFIG_DISCONTIGMEM dont work together yet" | |
371 | #endif | |
565200a1 | 372 | max_mapnr = highend_pfn; |
1da177e4 | 373 | #else |
565200a1 | 374 | max_mapnr = max_low_pfn; |
1da177e4 LT |
375 | #endif |
376 | high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT); | |
377 | ||
378 | totalram_pages += free_all_bootmem(); | |
379 | totalram_pages -= setup_zero_pages(); /* Setup zeroed pages. */ | |
380 | ||
381 | reservedpages = ram = 0; | |
382 | for (tmp = 0; tmp < max_low_pfn; tmp++) | |
383 | if (page_is_ram(tmp)) { | |
384 | ram++; | |
b1c231f5 | 385 | if (PageReserved(pfn_to_page(tmp))) |
1da177e4 LT |
386 | reservedpages++; |
387 | } | |
565200a1 | 388 | num_physpages = ram; |
1da177e4 LT |
389 | |
390 | #ifdef CONFIG_HIGHMEM | |
391 | for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) { | |
a8049c53 | 392 | struct page *page = pfn_to_page(tmp); |
1da177e4 LT |
393 | |
394 | if (!page_is_ram(tmp)) { | |
395 | SetPageReserved(page); | |
396 | continue; | |
397 | } | |
398 | ClearPageReserved(page); | |
7835e98b | 399 | init_page_count(page); |
1da177e4 LT |
400 | __free_page(page); |
401 | totalhigh_pages++; | |
402 | } | |
403 | totalram_pages += totalhigh_pages; | |
565200a1 | 404 | num_physpages += totalhigh_pages; |
1da177e4 LT |
405 | #endif |
406 | ||
407 | codesize = (unsigned long) &_etext - (unsigned long) &_text; | |
408 | datasize = (unsigned long) &_edata - (unsigned long) &_etext; | |
409 | initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; | |
410 | ||
3d503753 DJ |
411 | #ifdef CONFIG_64BIT |
412 | if ((unsigned long) &_text > (unsigned long) CKSEG0) | |
413 | /* The -4 is a hack so that user tools don't have to handle | |
414 | the overflow. */ | |
c30bb2a2 KH |
415 | kclist_add(&kcore_kseg0, (void *) CKSEG0, |
416 | 0x80000000 - 4, KCORE_TEXT); | |
3d503753 | 417 | #endif |
3d503753 | 418 | |
1da177e4 LT |
419 | printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, " |
420 | "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n", | |
cc013a88 | 421 | nr_free_pages() << (PAGE_SHIFT-10), |
1da177e4 LT |
422 | ram << (PAGE_SHIFT-10), |
423 | codesize >> 10, | |
424 | reservedpages << (PAGE_SHIFT-10), | |
425 | datasize >> 10, | |
426 | initsize >> 10, | |
427 | (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))); | |
428 | } | |
b4819b59 | 429 | #endif /* !CONFIG_NEED_MULTIPLE_NODES */ |
1da177e4 | 430 | |
c44e8d5e | 431 | void free_init_pages(const char *what, unsigned long begin, unsigned long end) |
6fd11a21 | 432 | { |
acd86b86 | 433 | unsigned long pfn; |
6fd11a21 | 434 | |
acd86b86 FBH |
435 | for (pfn = PFN_UP(begin); pfn < PFN_DOWN(end); pfn++) { |
436 | struct page *page = pfn_to_page(pfn); | |
437 | void *addr = phys_to_virt(PFN_PHYS(pfn)); | |
438 | ||
439 | ClearPageReserved(page); | |
440 | init_page_count(page); | |
441 | memset(addr, POISON_FREE_INITMEM, PAGE_SIZE); | |
442 | __free_page(page); | |
6fd11a21 RB |
443 | totalram_pages++; |
444 | } | |
445 | printk(KERN_INFO "Freeing %s: %ldk freed\n", what, (end - begin) >> 10); | |
446 | } | |
447 | ||
1da177e4 LT |
448 | #ifdef CONFIG_BLK_DEV_INITRD |
449 | void free_initrd_mem(unsigned long start, unsigned long end) | |
450 | { | |
acd86b86 FBH |
451 | free_init_pages("initrd memory", |
452 | virt_to_phys((void *)start), | |
453 | virt_to_phys((void *)end)); | |
1da177e4 LT |
454 | } |
455 | #endif | |
456 | ||
fb4bb133 | 457 | void __init_refok free_initmem(void) |
1da177e4 | 458 | { |
c44e8d5e | 459 | prom_free_prom_memory(); |
acd86b86 FBH |
460 | free_init_pages("unused kernel memory", |
461 | __pa_symbol(&__init_begin), | |
462 | __pa_symbol(&__init_end)); | |
1da177e4 | 463 | } |
69a6c312 | 464 | |
82622284 | 465 | #ifndef CONFIG_MIPS_PGD_C0_CONTEXT |
69a6c312 | 466 | unsigned long pgd_current[NR_CPUS]; |
82622284 | 467 | #endif |
69a6c312 AN |
468 | /* |
469 | * On 64-bit we've got three-level pagetables with a slightly | |
470 | * different layout ... | |
471 | */ | |
472 | #define __page_aligned(order) __attribute__((__aligned__(PAGE_SIZE<<order))) | |
9975e77d RB |
473 | |
474 | /* | |
475 | * gcc 3.3 and older have trouble determining that PTRS_PER_PGD and PGD_ORDER | |
476 | * are constants. So we use the variants from asm-offset.h until that gcc | |
477 | * will officially be retired. | |
478 | */ | |
479 | pgd_t swapper_pg_dir[_PTRS_PER_PGD] __page_aligned(_PGD_ORDER); | |
69a6c312 | 480 | #ifdef CONFIG_64BIT |
69a6c312 AN |
481 | pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned(PMD_ORDER); |
482 | #endif | |
483 | pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER); |