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c6610de3 MC |
1 | /* |
2 | * Just-In-Time compiler for BPF filters on MIPS | |
3 | * | |
4 | * Copyright (c) 2014 Imagination Technologies Ltd. | |
5 | * Author: Markos Chandras <markos.chandras@imgtec.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License as published by the | |
9 | * Free Software Foundation; version 2 of the License. | |
10 | */ | |
11 | ||
12 | #include <linux/bitops.h> | |
13 | #include <linux/compiler.h> | |
14 | #include <linux/errno.h> | |
15 | #include <linux/filter.h> | |
16 | #include <linux/if_vlan.h> | |
17 | #include <linux/kconfig.h> | |
18 | #include <linux/moduleloader.h> | |
19 | #include <linux/netdevice.h> | |
20 | #include <linux/string.h> | |
21 | #include <linux/slab.h> | |
22 | #include <linux/types.h> | |
5e0c5610 | 23 | #include <asm/asm.h> |
c6610de3 MC |
24 | #include <asm/bitops.h> |
25 | #include <asm/cacheflush.h> | |
26 | #include <asm/cpu-features.h> | |
27 | #include <asm/uasm.h> | |
28 | ||
29 | #include "bpf_jit.h" | |
30 | ||
31 | /* ABI | |
266a88e2 MC |
32 | * r_skb_hl SKB header length |
33 | * r_data SKB data pointer | |
34 | * r_off Offset | |
beaf70b8 MC |
35 | * r_A BPF register A |
36 | * r_X BPF register X | |
37 | * r_skb *skb | |
38 | * r_M *scratch memory | |
266a88e2 | 39 | * r_skb_len SKB length |
c6610de3 MC |
40 | * |
41 | * On entry (*bpf_func)(*skb, *filter) | |
42 | * a0 = MIPS_R_A0 = skb; | |
43 | * a1 = MIPS_R_A1 = filter; | |
44 | * | |
45 | * Stack | |
46 | * ... | |
47 | * M[15] | |
48 | * M[14] | |
49 | * M[13] | |
50 | * ... | |
51 | * M[0] <-- r_M | |
52 | * saved reg k-1 | |
53 | * saved reg k-2 | |
54 | * ... | |
55 | * saved reg 0 <-- r_sp | |
56 | * <no argument area> | |
57 | * | |
58 | * Packet layout | |
59 | * | |
60 | * <--------------------- len ------------------------> | |
61 | * <--skb-len(r_skb_hl)-->< ----- skb->data_len ------> | |
62 | * ---------------------------------------------------- | |
63 | * | skb->data | | |
64 | * ---------------------------------------------------- | |
65 | */ | |
66 | ||
c6610de3 MC |
67 | #define ptr typeof(unsigned long) |
68 | ||
c6610de3 MC |
69 | #define SCRATCH_OFF(k) (4 * (k)) |
70 | ||
71 | /* JIT flags */ | |
72 | #define SEEN_CALL (1 << BPF_MEMWORDS) | |
73 | #define SEEN_SREG_SFT (BPF_MEMWORDS + 1) | |
74 | #define SEEN_SREG_BASE (1 << SEEN_SREG_SFT) | |
75 | #define SEEN_SREG(x) (SEEN_SREG_BASE << (x)) | |
c6610de3 MC |
76 | #define SEEN_OFF SEEN_SREG(2) |
77 | #define SEEN_A SEEN_SREG(3) | |
78 | #define SEEN_X SEEN_SREG(4) | |
79 | #define SEEN_SKB SEEN_SREG(5) | |
80 | #define SEEN_MEM SEEN_SREG(6) | |
266a88e2 MC |
81 | /* SEEN_SK_DATA also implies skb_hl an skb_len */ |
82 | #define SEEN_SKB_DATA (SEEN_SREG(7) | SEEN_SREG(1) | SEEN_SREG(0)) | |
c6610de3 MC |
83 | |
84 | /* Arguments used by JIT */ | |
85 | #define ARGS_USED_BY_JIT 2 /* only applicable to 64-bit */ | |
86 | ||
c6610de3 MC |
87 | #define SBIT(x) (1 << (x)) /* Signed version of BIT() */ |
88 | ||
89 | /** | |
90 | * struct jit_ctx - JIT context | |
91 | * @skf: The sk_filter | |
92 | * @prologue_bytes: Number of bytes for prologue | |
93 | * @idx: Instruction index | |
94 | * @flags: JIT flags | |
95 | * @offsets: Instruction offsets | |
96 | * @target: Memory location for the compiled filter | |
97 | */ | |
98 | struct jit_ctx { | |
7ae457c1 | 99 | const struct bpf_prog *skf; |
c6610de3 MC |
100 | unsigned int prologue_bytes; |
101 | u32 idx; | |
102 | u32 flags; | |
103 | u32 *offsets; | |
104 | u32 *target; | |
105 | }; | |
106 | ||
107 | ||
108 | static inline int optimize_div(u32 *k) | |
109 | { | |
110 | /* power of 2 divides can be implemented with right shift */ | |
111 | if (!(*k & (*k-1))) { | |
112 | *k = ilog2(*k); | |
113 | return 1; | |
114 | } | |
115 | ||
116 | return 0; | |
117 | } | |
118 | ||
95782bf4 MC |
119 | static inline void emit_jit_reg_move(ptr dst, ptr src, struct jit_ctx *ctx); |
120 | ||
c6610de3 MC |
121 | /* Simply emit the instruction if the JIT memory space has been allocated */ |
122 | #define emit_instr(ctx, func, ...) \ | |
123 | do { \ | |
124 | if ((ctx)->target != NULL) { \ | |
125 | u32 *p = &(ctx)->target[ctx->idx]; \ | |
126 | uasm_i_##func(&p, ##__VA_ARGS__); \ | |
127 | } \ | |
128 | (ctx)->idx++; \ | |
129 | } while (0) | |
130 | ||
39bcb796 MC |
131 | /* |
132 | * Similar to emit_instr but it must be used when we need to emit | |
133 | * 32-bit or 64-bit instructions | |
134 | */ | |
135 | #define emit_long_instr(ctx, func, ...) \ | |
136 | do { \ | |
137 | if ((ctx)->target != NULL) { \ | |
138 | u32 *p = &(ctx)->target[ctx->idx]; \ | |
139 | UASM_i_##func(&p, ##__VA_ARGS__); \ | |
140 | } \ | |
141 | (ctx)->idx++; \ | |
142 | } while (0) | |
143 | ||
c6610de3 MC |
144 | /* Determine if immediate is within the 16-bit signed range */ |
145 | static inline bool is_range16(s32 imm) | |
146 | { | |
10c4d614 | 147 | return !(imm >= SBIT(15) || imm < -SBIT(15)); |
c6610de3 MC |
148 | } |
149 | ||
150 | static inline void emit_addu(unsigned int dst, unsigned int src1, | |
151 | unsigned int src2, struct jit_ctx *ctx) | |
152 | { | |
153 | emit_instr(ctx, addu, dst, src1, src2); | |
154 | } | |
155 | ||
156 | static inline void emit_nop(struct jit_ctx *ctx) | |
157 | { | |
158 | emit_instr(ctx, nop); | |
159 | } | |
160 | ||
161 | /* Load a u32 immediate to a register */ | |
162 | static inline void emit_load_imm(unsigned int dst, u32 imm, struct jit_ctx *ctx) | |
163 | { | |
164 | if (ctx->target != NULL) { | |
165 | /* addiu can only handle s16 */ | |
10c4d614 | 166 | if (!is_range16(imm)) { |
c6610de3 MC |
167 | u32 *p = &ctx->target[ctx->idx]; |
168 | uasm_i_lui(&p, r_tmp_imm, (s32)imm >> 16); | |
169 | p = &ctx->target[ctx->idx + 1]; | |
170 | uasm_i_ori(&p, dst, r_tmp_imm, imm & 0xffff); | |
171 | } else { | |
172 | u32 *p = &ctx->target[ctx->idx]; | |
173 | uasm_i_addiu(&p, dst, r_zero, imm); | |
174 | } | |
175 | } | |
176 | ctx->idx++; | |
177 | ||
10c4d614 | 178 | if (!is_range16(imm)) |
c6610de3 MC |
179 | ctx->idx++; |
180 | } | |
181 | ||
182 | static inline void emit_or(unsigned int dst, unsigned int src1, | |
183 | unsigned int src2, struct jit_ctx *ctx) | |
184 | { | |
185 | emit_instr(ctx, or, dst, src1, src2); | |
186 | } | |
187 | ||
188 | static inline void emit_ori(unsigned int dst, unsigned src, u32 imm, | |
189 | struct jit_ctx *ctx) | |
190 | { | |
191 | if (imm >= BIT(16)) { | |
192 | emit_load_imm(r_tmp, imm, ctx); | |
193 | emit_or(dst, src, r_tmp, ctx); | |
194 | } else { | |
195 | emit_instr(ctx, ori, dst, src, imm); | |
196 | } | |
197 | } | |
198 | ||
c6610de3 MC |
199 | static inline void emit_daddiu(unsigned int dst, unsigned int src, |
200 | int imm, struct jit_ctx *ctx) | |
201 | { | |
202 | /* | |
203 | * Only used for stack, so the imm is relatively small | |
204 | * and it fits in 15-bits | |
205 | */ | |
206 | emit_instr(ctx, daddiu, dst, src, imm); | |
207 | } | |
208 | ||
209 | static inline void emit_addiu(unsigned int dst, unsigned int src, | |
210 | u32 imm, struct jit_ctx *ctx) | |
211 | { | |
10c4d614 | 212 | if (!is_range16(imm)) { |
c6610de3 MC |
213 | emit_load_imm(r_tmp, imm, ctx); |
214 | emit_addu(dst, r_tmp, src, ctx); | |
215 | } else { | |
216 | emit_instr(ctx, addiu, dst, src, imm); | |
217 | } | |
218 | } | |
219 | ||
220 | static inline void emit_and(unsigned int dst, unsigned int src1, | |
221 | unsigned int src2, struct jit_ctx *ctx) | |
222 | { | |
223 | emit_instr(ctx, and, dst, src1, src2); | |
224 | } | |
225 | ||
226 | static inline void emit_andi(unsigned int dst, unsigned int src, | |
227 | u32 imm, struct jit_ctx *ctx) | |
228 | { | |
229 | /* If imm does not fit in u16 then load it to register */ | |
230 | if (imm >= BIT(16)) { | |
231 | emit_load_imm(r_tmp, imm, ctx); | |
232 | emit_and(dst, src, r_tmp, ctx); | |
233 | } else { | |
234 | emit_instr(ctx, andi, dst, src, imm); | |
235 | } | |
236 | } | |
237 | ||
238 | static inline void emit_xor(unsigned int dst, unsigned int src1, | |
239 | unsigned int src2, struct jit_ctx *ctx) | |
240 | { | |
241 | emit_instr(ctx, xor, dst, src1, src2); | |
242 | } | |
243 | ||
244 | static inline void emit_xori(ptr dst, ptr src, u32 imm, struct jit_ctx *ctx) | |
245 | { | |
246 | /* If imm does not fit in u16 then load it to register */ | |
247 | if (imm >= BIT(16)) { | |
248 | emit_load_imm(r_tmp, imm, ctx); | |
249 | emit_xor(dst, src, r_tmp, ctx); | |
250 | } else { | |
251 | emit_instr(ctx, xori, dst, src, imm); | |
252 | } | |
253 | } | |
254 | ||
255 | static inline void emit_stack_offset(int offset, struct jit_ctx *ctx) | |
256 | { | |
39bcb796 | 257 | emit_long_instr(ctx, ADDIU, r_sp, r_sp, offset); |
c6610de3 MC |
258 | } |
259 | ||
260 | static inline void emit_subu(unsigned int dst, unsigned int src1, | |
261 | unsigned int src2, struct jit_ctx *ctx) | |
262 | { | |
263 | emit_instr(ctx, subu, dst, src1, src2); | |
264 | } | |
265 | ||
266 | static inline void emit_neg(unsigned int reg, struct jit_ctx *ctx) | |
267 | { | |
268 | emit_subu(reg, r_zero, reg, ctx); | |
269 | } | |
270 | ||
271 | static inline void emit_sllv(unsigned int dst, unsigned int src, | |
272 | unsigned int sa, struct jit_ctx *ctx) | |
273 | { | |
274 | emit_instr(ctx, sllv, dst, src, sa); | |
275 | } | |
276 | ||
277 | static inline void emit_sll(unsigned int dst, unsigned int src, | |
278 | unsigned int sa, struct jit_ctx *ctx) | |
279 | { | |
280 | /* sa is 5-bits long */ | |
95782bf4 MC |
281 | if (sa >= BIT(5)) |
282 | /* Shifting >= 32 results in zero */ | |
283 | emit_jit_reg_move(dst, r_zero, ctx); | |
284 | else | |
285 | emit_instr(ctx, sll, dst, src, sa); | |
c6610de3 MC |
286 | } |
287 | ||
288 | static inline void emit_srlv(unsigned int dst, unsigned int src, | |
289 | unsigned int sa, struct jit_ctx *ctx) | |
290 | { | |
291 | emit_instr(ctx, srlv, dst, src, sa); | |
292 | } | |
293 | ||
294 | static inline void emit_srl(unsigned int dst, unsigned int src, | |
295 | unsigned int sa, struct jit_ctx *ctx) | |
296 | { | |
297 | /* sa is 5-bits long */ | |
95782bf4 MC |
298 | if (sa >= BIT(5)) |
299 | /* Shifting >= 32 results in zero */ | |
300 | emit_jit_reg_move(dst, r_zero, ctx); | |
301 | else | |
302 | emit_instr(ctx, srl, dst, src, sa); | |
c6610de3 MC |
303 | } |
304 | ||
55393ee5 MC |
305 | static inline void emit_slt(unsigned int dst, unsigned int src1, |
306 | unsigned int src2, struct jit_ctx *ctx) | |
307 | { | |
308 | emit_instr(ctx, slt, dst, src1, src2); | |
309 | } | |
310 | ||
c6610de3 MC |
311 | static inline void emit_sltu(unsigned int dst, unsigned int src1, |
312 | unsigned int src2, struct jit_ctx *ctx) | |
313 | { | |
314 | emit_instr(ctx, sltu, dst, src1, src2); | |
315 | } | |
316 | ||
317 | static inline void emit_sltiu(unsigned dst, unsigned int src, | |
318 | unsigned int imm, struct jit_ctx *ctx) | |
319 | { | |
320 | /* 16 bit immediate */ | |
10c4d614 | 321 | if (!is_range16((s32)imm)) { |
c6610de3 MC |
322 | emit_load_imm(r_tmp, imm, ctx); |
323 | emit_sltu(dst, src, r_tmp, ctx); | |
324 | } else { | |
325 | emit_instr(ctx, sltiu, dst, src, imm); | |
326 | } | |
327 | ||
328 | } | |
329 | ||
330 | /* Store register on the stack */ | |
331 | static inline void emit_store_stack_reg(ptr reg, ptr base, | |
332 | unsigned int offset, | |
333 | struct jit_ctx *ctx) | |
334 | { | |
39bcb796 | 335 | emit_long_instr(ctx, SW, reg, offset, base); |
c6610de3 MC |
336 | } |
337 | ||
338 | static inline void emit_store(ptr reg, ptr base, unsigned int offset, | |
339 | struct jit_ctx *ctx) | |
340 | { | |
341 | emit_instr(ctx, sw, reg, offset, base); | |
342 | } | |
343 | ||
344 | static inline void emit_load_stack_reg(ptr reg, ptr base, | |
345 | unsigned int offset, | |
346 | struct jit_ctx *ctx) | |
347 | { | |
39bcb796 | 348 | emit_long_instr(ctx, LW, reg, offset, base); |
c6610de3 MC |
349 | } |
350 | ||
351 | static inline void emit_load(unsigned int reg, unsigned int base, | |
352 | unsigned int offset, struct jit_ctx *ctx) | |
353 | { | |
354 | emit_instr(ctx, lw, reg, offset, base); | |
355 | } | |
356 | ||
357 | static inline void emit_load_byte(unsigned int reg, unsigned int base, | |
358 | unsigned int offset, struct jit_ctx *ctx) | |
359 | { | |
360 | emit_instr(ctx, lb, reg, offset, base); | |
361 | } | |
362 | ||
363 | static inline void emit_half_load(unsigned int reg, unsigned int base, | |
364 | unsigned int offset, struct jit_ctx *ctx) | |
365 | { | |
366 | emit_instr(ctx, lh, reg, offset, base); | |
367 | } | |
368 | ||
369 | static inline void emit_mul(unsigned int dst, unsigned int src1, | |
370 | unsigned int src2, struct jit_ctx *ctx) | |
371 | { | |
372 | emit_instr(ctx, mul, dst, src1, src2); | |
373 | } | |
374 | ||
375 | static inline void emit_div(unsigned int dst, unsigned int src, | |
376 | struct jit_ctx *ctx) | |
377 | { | |
378 | if (ctx->target != NULL) { | |
379 | u32 *p = &ctx->target[ctx->idx]; | |
380 | uasm_i_divu(&p, dst, src); | |
381 | p = &ctx->target[ctx->idx + 1]; | |
35a8e16a | 382 | uasm_i_mflo(&p, dst); |
c6610de3 MC |
383 | } |
384 | ctx->idx += 2; /* 2 insts */ | |
385 | } | |
386 | ||
387 | static inline void emit_mod(unsigned int dst, unsigned int src, | |
388 | struct jit_ctx *ctx) | |
389 | { | |
390 | if (ctx->target != NULL) { | |
391 | u32 *p = &ctx->target[ctx->idx]; | |
392 | uasm_i_divu(&p, dst, src); | |
393 | p = &ctx->target[ctx->idx + 1]; | |
2e46477a | 394 | uasm_i_mfhi(&p, dst); |
c6610de3 MC |
395 | } |
396 | ctx->idx += 2; /* 2 insts */ | |
397 | } | |
398 | ||
399 | static inline void emit_dsll(unsigned int dst, unsigned int src, | |
400 | unsigned int sa, struct jit_ctx *ctx) | |
401 | { | |
402 | emit_instr(ctx, dsll, dst, src, sa); | |
403 | } | |
404 | ||
405 | static inline void emit_dsrl32(unsigned int dst, unsigned int src, | |
406 | unsigned int sa, struct jit_ctx *ctx) | |
407 | { | |
408 | emit_instr(ctx, dsrl32, dst, src, sa); | |
409 | } | |
410 | ||
411 | static inline void emit_wsbh(unsigned int dst, unsigned int src, | |
412 | struct jit_ctx *ctx) | |
413 | { | |
414 | emit_instr(ctx, wsbh, dst, src); | |
415 | } | |
416 | ||
b6a14a98 MC |
417 | /* load pointer to register */ |
418 | static inline void emit_load_ptr(unsigned int dst, unsigned int src, | |
419 | int imm, struct jit_ctx *ctx) | |
420 | { | |
421 | /* src contains the base addr of the 32/64-pointer */ | |
39bcb796 | 422 | emit_long_instr(ctx, LW, dst, imm, src); |
b6a14a98 MC |
423 | } |
424 | ||
c6610de3 MC |
425 | /* load a function pointer to register */ |
426 | static inline void emit_load_func(unsigned int reg, ptr imm, | |
427 | struct jit_ctx *ctx) | |
428 | { | |
429 | if (config_enabled(CONFIG_64BIT)) { | |
430 | /* At this point imm is always 64-bit */ | |
431 | emit_load_imm(r_tmp, (u64)imm >> 32, ctx); | |
432 | emit_dsll(r_tmp_imm, r_tmp, 16, ctx); /* left shift by 16 */ | |
433 | emit_ori(r_tmp, r_tmp_imm, (imm >> 16) & 0xffff, ctx); | |
434 | emit_dsll(r_tmp_imm, r_tmp, 16, ctx); /* left shift by 16 */ | |
435 | emit_ori(reg, r_tmp_imm, imm & 0xffff, ctx); | |
436 | } else { | |
437 | emit_load_imm(reg, imm, ctx); | |
438 | } | |
439 | } | |
440 | ||
441 | /* Move to real MIPS register */ | |
442 | static inline void emit_reg_move(ptr dst, ptr src, struct jit_ctx *ctx) | |
443 | { | |
39bcb796 | 444 | emit_long_instr(ctx, ADDU, dst, src, r_zero); |
c6610de3 MC |
445 | } |
446 | ||
447 | /* Move to JIT (32-bit) register */ | |
448 | static inline void emit_jit_reg_move(ptr dst, ptr src, struct jit_ctx *ctx) | |
449 | { | |
450 | emit_addu(dst, src, r_zero, ctx); | |
451 | } | |
452 | ||
453 | /* Compute the immediate value for PC-relative branches. */ | |
454 | static inline u32 b_imm(unsigned int tgt, struct jit_ctx *ctx) | |
455 | { | |
456 | if (ctx->target == NULL) | |
457 | return 0; | |
458 | ||
459 | /* | |
460 | * We want a pc-relative branch. We only do forward branches | |
461 | * so tgt is always after pc. tgt is the instruction offset | |
462 | * we want to jump to. | |
463 | ||
464 | * Branch on MIPS: | |
465 | * I: target_offset <- sign_extend(offset) | |
466 | * I+1: PC += target_offset (delay slot) | |
467 | * | |
468 | * ctx->idx currently points to the branch instruction | |
469 | * but the offset is added to the delay slot so we need | |
470 | * to subtract 4. | |
471 | */ | |
472 | return ctx->offsets[tgt] - | |
473 | (ctx->idx * 4 - ctx->prologue_bytes) - 4; | |
474 | } | |
475 | ||
476 | static inline void emit_bcond(int cond, unsigned int reg1, unsigned int reg2, | |
477 | unsigned int imm, struct jit_ctx *ctx) | |
478 | { | |
479 | if (ctx->target != NULL) { | |
480 | u32 *p = &ctx->target[ctx->idx]; | |
481 | ||
482 | switch (cond) { | |
483 | case MIPS_COND_EQ: | |
484 | uasm_i_beq(&p, reg1, reg2, imm); | |
485 | break; | |
486 | case MIPS_COND_NE: | |
487 | uasm_i_bne(&p, reg1, reg2, imm); | |
488 | break; | |
489 | case MIPS_COND_ALL: | |
490 | uasm_i_b(&p, imm); | |
491 | break; | |
492 | default: | |
493 | pr_warn("%s: Unhandled branch conditional: %d\n", | |
494 | __func__, cond); | |
495 | } | |
496 | } | |
497 | ctx->idx++; | |
498 | } | |
499 | ||
500 | static inline void emit_b(unsigned int imm, struct jit_ctx *ctx) | |
501 | { | |
502 | emit_bcond(MIPS_COND_ALL, r_zero, r_zero, imm, ctx); | |
503 | } | |
504 | ||
505 | static inline void emit_jalr(unsigned int link, unsigned int reg, | |
506 | struct jit_ctx *ctx) | |
507 | { | |
508 | emit_instr(ctx, jalr, link, reg); | |
509 | } | |
510 | ||
511 | static inline void emit_jr(unsigned int reg, struct jit_ctx *ctx) | |
512 | { | |
513 | emit_instr(ctx, jr, reg); | |
514 | } | |
515 | ||
516 | static inline u16 align_sp(unsigned int num) | |
517 | { | |
518 | /* Double word alignment for 32-bit, quadword for 64-bit */ | |
519 | unsigned int align = config_enabled(CONFIG_64BIT) ? 16 : 8; | |
520 | num = (num + (align - 1)) & -align; | |
521 | return num; | |
522 | } | |
523 | ||
c6610de3 MC |
524 | static bool is_load_to_a(u16 inst) |
525 | { | |
526 | switch (inst) { | |
a83d081e DB |
527 | case BPF_LD | BPF_W | BPF_LEN: |
528 | case BPF_LD | BPF_W | BPF_ABS: | |
529 | case BPF_LD | BPF_H | BPF_ABS: | |
530 | case BPF_LD | BPF_B | BPF_ABS: | |
c6610de3 MC |
531 | return true; |
532 | default: | |
533 | return false; | |
534 | } | |
535 | } | |
536 | ||
537 | static void save_bpf_jit_regs(struct jit_ctx *ctx, unsigned offset) | |
538 | { | |
539 | int i = 0, real_off = 0; | |
540 | u32 sflags, tmp_flags; | |
541 | ||
542 | /* Adjust the stack pointer */ | |
543 | emit_stack_offset(-align_sp(offset), ctx); | |
544 | ||
c6610de3 MC |
545 | tmp_flags = sflags = ctx->flags >> SEEN_SREG_SFT; |
546 | /* sflags is essentially a bitmap */ | |
547 | while (tmp_flags) { | |
548 | if ((sflags >> i) & 0x1) { | |
549 | emit_store_stack_reg(MIPS_R_S0 + i, r_sp, real_off, | |
550 | ctx); | |
5e0c5610 | 551 | real_off += SZREG; |
c6610de3 MC |
552 | } |
553 | i++; | |
554 | tmp_flags >>= 1; | |
555 | } | |
556 | ||
557 | /* save return address */ | |
558 | if (ctx->flags & SEEN_CALL) { | |
559 | emit_store_stack_reg(r_ra, r_sp, real_off, ctx); | |
5e0c5610 | 560 | real_off += SZREG; |
c6610de3 MC |
561 | } |
562 | ||
563 | /* Setup r_M leaving the alignment gap if necessary */ | |
564 | if (ctx->flags & SEEN_MEM) { | |
5e0c5610 MC |
565 | if (real_off % (SZREG * 2)) |
566 | real_off += SZREG; | |
39bcb796 | 567 | emit_long_instr(ctx, ADDIU, r_M, r_sp, real_off); |
c6610de3 MC |
568 | } |
569 | } | |
570 | ||
571 | static void restore_bpf_jit_regs(struct jit_ctx *ctx, | |
572 | unsigned int offset) | |
573 | { | |
574 | int i, real_off = 0; | |
575 | u32 sflags, tmp_flags; | |
576 | ||
c6610de3 MC |
577 | tmp_flags = sflags = ctx->flags >> SEEN_SREG_SFT; |
578 | /* sflags is a bitmap */ | |
579 | i = 0; | |
580 | while (tmp_flags) { | |
581 | if ((sflags >> i) & 0x1) { | |
582 | emit_load_stack_reg(MIPS_R_S0 + i, r_sp, real_off, | |
583 | ctx); | |
5e0c5610 | 584 | real_off += SZREG; |
c6610de3 MC |
585 | } |
586 | i++; | |
587 | tmp_flags >>= 1; | |
588 | } | |
589 | ||
590 | /* restore return address */ | |
591 | if (ctx->flags & SEEN_CALL) | |
592 | emit_load_stack_reg(r_ra, r_sp, real_off, ctx); | |
593 | ||
594 | /* Restore the sp and discard the scrach memory */ | |
595 | emit_stack_offset(align_sp(offset), ctx); | |
596 | } | |
597 | ||
598 | static unsigned int get_stack_depth(struct jit_ctx *ctx) | |
599 | { | |
600 | int sp_off = 0; | |
601 | ||
602 | ||
603 | /* How may s* regs do we need to preserved? */ | |
5e0c5610 | 604 | sp_off += hweight32(ctx->flags >> SEEN_SREG_SFT) * SZREG; |
c6610de3 MC |
605 | |
606 | if (ctx->flags & SEEN_MEM) | |
607 | sp_off += 4 * BPF_MEMWORDS; /* BPF_MEMWORDS are 32-bit */ | |
608 | ||
609 | if (ctx->flags & SEEN_CALL) | |
266a88e2 | 610 | sp_off += SZREG; /* Space for our ra register */ |
c6610de3 | 611 | |
8833bc30 | 612 | return sp_off; |
c6610de3 MC |
613 | } |
614 | ||
615 | static void build_prologue(struct jit_ctx *ctx) | |
616 | { | |
617 | u16 first_inst = ctx->skf->insns[0].code; | |
618 | int sp_off; | |
619 | ||
620 | /* Calculate the total offset for the stack pointer */ | |
621 | sp_off = get_stack_depth(ctx); | |
622 | save_bpf_jit_regs(ctx, sp_off); | |
623 | ||
624 | if (ctx->flags & SEEN_SKB) | |
625 | emit_reg_move(r_skb, MIPS_R_A0, ctx); | |
626 | ||
266a88e2 MC |
627 | if (ctx->flags & SEEN_SKB_DATA) { |
628 | /* Load packet length */ | |
629 | emit_load(r_skb_len, r_skb, offsetof(struct sk_buff, len), | |
630 | ctx); | |
631 | emit_load(r_tmp, r_skb, offsetof(struct sk_buff, data_len), | |
632 | ctx); | |
633 | /* Load the data pointer */ | |
634 | emit_load_ptr(r_skb_data, r_skb, | |
635 | offsetof(struct sk_buff, data), ctx); | |
636 | /* Load the header length */ | |
637 | emit_subu(r_skb_hl, r_skb_len, r_tmp, ctx); | |
638 | } | |
639 | ||
e5bb48b0 | 640 | if (ctx->flags & SEEN_X) |
c6610de3 MC |
641 | emit_jit_reg_move(r_X, r_zero, ctx); |
642 | ||
643 | /* Do not leak kernel data to userspace */ | |
a83d081e | 644 | if ((first_inst != (BPF_RET | BPF_K)) && !(is_load_to_a(first_inst))) |
c6610de3 MC |
645 | emit_jit_reg_move(r_A, r_zero, ctx); |
646 | } | |
647 | ||
648 | static void build_epilogue(struct jit_ctx *ctx) | |
649 | { | |
650 | unsigned int sp_off; | |
651 | ||
652 | /* Calculate the total offset for the stack pointer */ | |
653 | ||
654 | sp_off = get_stack_depth(ctx); | |
655 | restore_bpf_jit_regs(ctx, sp_off); | |
656 | ||
657 | /* Return */ | |
658 | emit_jr(r_ra, ctx); | |
659 | emit_nop(ctx); | |
660 | } | |
661 | ||
266a88e2 MC |
662 | #define CHOOSE_LOAD_FUNC(K, func) \ |
663 | ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative : func) : \ | |
664 | func##_positive) | |
c6610de3 | 665 | |
c6610de3 MC |
666 | static int build_body(struct jit_ctx *ctx) |
667 | { | |
7ae457c1 | 668 | const struct bpf_prog *prog = ctx->skf; |
c6610de3 | 669 | const struct sock_filter *inst; |
266a88e2 | 670 | unsigned int i, off, condt; |
c6610de3 | 671 | u32 k, b_off __maybe_unused; |
266a88e2 | 672 | u8 (*sk_load_func)(unsigned long *skb, int offset); |
c6610de3 MC |
673 | |
674 | for (i = 0; i < prog->len; i++) { | |
a83d081e DB |
675 | u16 code; |
676 | ||
c6610de3 MC |
677 | inst = &(prog->insns[i]); |
678 | pr_debug("%s: code->0x%02x, jt->0x%x, jf->0x%x, k->0x%x\n", | |
679 | __func__, inst->code, inst->jt, inst->jf, inst->k); | |
680 | k = inst->k; | |
a83d081e | 681 | code = bpf_anc_helper(inst); |
c6610de3 MC |
682 | |
683 | if (ctx->target == NULL) | |
684 | ctx->offsets[i] = ctx->idx * 4; | |
685 | ||
a83d081e DB |
686 | switch (code) { |
687 | case BPF_LD | BPF_IMM: | |
c6610de3 MC |
688 | /* A <- k ==> li r_A, k */ |
689 | ctx->flags |= SEEN_A; | |
690 | emit_load_imm(r_A, k, ctx); | |
691 | break; | |
a83d081e | 692 | case BPF_LD | BPF_W | BPF_LEN: |
c6610de3 MC |
693 | BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4); |
694 | /* A <- len ==> lw r_A, offset(skb) */ | |
695 | ctx->flags |= SEEN_SKB | SEEN_A; | |
696 | off = offsetof(struct sk_buff, len); | |
697 | emit_load(r_A, r_skb, off, ctx); | |
698 | break; | |
a83d081e | 699 | case BPF_LD | BPF_MEM: |
c6610de3 MC |
700 | /* A <- M[k] ==> lw r_A, offset(M) */ |
701 | ctx->flags |= SEEN_MEM | SEEN_A; | |
702 | emit_load(r_A, r_M, SCRATCH_OFF(k), ctx); | |
703 | break; | |
a83d081e | 704 | case BPF_LD | BPF_W | BPF_ABS: |
c6610de3 | 705 | /* A <- P[k:4] */ |
266a88e2 | 706 | sk_load_func = CHOOSE_LOAD_FUNC(k, sk_load_word); |
c6610de3 | 707 | goto load; |
a83d081e | 708 | case BPF_LD | BPF_H | BPF_ABS: |
c6610de3 | 709 | /* A <- P[k:2] */ |
266a88e2 | 710 | sk_load_func = CHOOSE_LOAD_FUNC(k, sk_load_half); |
c6610de3 | 711 | goto load; |
a83d081e | 712 | case BPF_LD | BPF_B | BPF_ABS: |
c6610de3 | 713 | /* A <- P[k:1] */ |
266a88e2 | 714 | sk_load_func = CHOOSE_LOAD_FUNC(k, sk_load_byte); |
c6610de3 MC |
715 | load: |
716 | emit_load_imm(r_off, k, ctx); | |
717 | load_common: | |
ad152bd6 | 718 | ctx->flags |= SEEN_CALL | SEEN_OFF | |
266a88e2 | 719 | SEEN_SKB | SEEN_A | SEEN_SKB_DATA; |
c6610de3 | 720 | |
266a88e2 | 721 | emit_load_func(r_s0, (ptr)sk_load_func, ctx); |
c6610de3 MC |
722 | emit_reg_move(MIPS_R_A0, r_skb, ctx); |
723 | emit_jalr(MIPS_R_RA, r_s0, ctx); | |
724 | /* Load second argument to delay slot */ | |
725 | emit_reg_move(MIPS_R_A1, r_off, ctx); | |
726 | /* Check the error value */ | |
266a88e2 MC |
727 | emit_bcond(MIPS_COND_EQ, r_ret, 0, b_imm(i + 1, ctx), |
728 | ctx); | |
729 | /* Load return register on DS for failures */ | |
730 | emit_reg_move(r_ret, r_zero, ctx); | |
c6610de3 MC |
731 | /* Return with error */ |
732 | emit_b(b_imm(prog->len, ctx), ctx); | |
266a88e2 | 733 | emit_nop(ctx); |
c6610de3 | 734 | break; |
a83d081e | 735 | case BPF_LD | BPF_W | BPF_IND: |
c6610de3 | 736 | /* A <- P[X + k:4] */ |
266a88e2 | 737 | sk_load_func = sk_load_word; |
c6610de3 | 738 | goto load_ind; |
a83d081e | 739 | case BPF_LD | BPF_H | BPF_IND: |
c6610de3 | 740 | /* A <- P[X + k:2] */ |
266a88e2 | 741 | sk_load_func = sk_load_half; |
c6610de3 | 742 | goto load_ind; |
a83d081e | 743 | case BPF_LD | BPF_B | BPF_IND: |
c6610de3 | 744 | /* A <- P[X + k:1] */ |
266a88e2 | 745 | sk_load_func = sk_load_byte; |
c6610de3 | 746 | load_ind: |
c6610de3 MC |
747 | ctx->flags |= SEEN_OFF | SEEN_X; |
748 | emit_addiu(r_off, r_X, k, ctx); | |
749 | goto load_common; | |
a83d081e | 750 | case BPF_LDX | BPF_IMM: |
c6610de3 MC |
751 | /* X <- k */ |
752 | ctx->flags |= SEEN_X; | |
753 | emit_load_imm(r_X, k, ctx); | |
754 | break; | |
a83d081e | 755 | case BPF_LDX | BPF_MEM: |
c6610de3 MC |
756 | /* X <- M[k] */ |
757 | ctx->flags |= SEEN_X | SEEN_MEM; | |
758 | emit_load(r_X, r_M, SCRATCH_OFF(k), ctx); | |
759 | break; | |
a83d081e | 760 | case BPF_LDX | BPF_W | BPF_LEN: |
c6610de3 MC |
761 | /* X <- len */ |
762 | ctx->flags |= SEEN_X | SEEN_SKB; | |
763 | off = offsetof(struct sk_buff, len); | |
764 | emit_load(r_X, r_skb, off, ctx); | |
765 | break; | |
a83d081e | 766 | case BPF_LDX | BPF_B | BPF_MSH: |
c6610de3 | 767 | /* X <- 4 * (P[k:1] & 0xf) */ |
ad152bd6 | 768 | ctx->flags |= SEEN_X | SEEN_CALL | SEEN_SKB; |
c6610de3 | 769 | /* Load offset to a1 */ |
266a88e2 | 770 | emit_load_func(r_s0, (ptr)sk_load_byte, ctx); |
c6610de3 MC |
771 | /* |
772 | * This may emit two instructions so it may not fit | |
773 | * in the delay slot. So use a0 in the delay slot. | |
774 | */ | |
775 | emit_load_imm(MIPS_R_A1, k, ctx); | |
776 | emit_jalr(MIPS_R_RA, r_s0, ctx); | |
777 | emit_reg_move(MIPS_R_A0, r_skb, ctx); /* delay slot */ | |
778 | /* Check the error value */ | |
266a88e2 MC |
779 | emit_bcond(MIPS_COND_NE, r_ret, 0, |
780 | b_imm(prog->len, ctx), ctx); | |
781 | emit_reg_move(r_ret, r_zero, ctx); | |
c6610de3 MC |
782 | /* We are good */ |
783 | /* X <- P[1:K] & 0xf */ | |
266a88e2 | 784 | emit_andi(r_X, r_A, 0xf, ctx); |
c6610de3 MC |
785 | /* X << 2 */ |
786 | emit_b(b_imm(i + 1, ctx), ctx); | |
787 | emit_sll(r_X, r_X, 2, ctx); /* delay slot */ | |
c6610de3 | 788 | break; |
a83d081e | 789 | case BPF_ST: |
c6610de3 MC |
790 | /* M[k] <- A */ |
791 | ctx->flags |= SEEN_MEM | SEEN_A; | |
792 | emit_store(r_A, r_M, SCRATCH_OFF(k), ctx); | |
793 | break; | |
a83d081e | 794 | case BPF_STX: |
c6610de3 MC |
795 | /* M[k] <- X */ |
796 | ctx->flags |= SEEN_MEM | SEEN_X; | |
797 | emit_store(r_X, r_M, SCRATCH_OFF(k), ctx); | |
798 | break; | |
a83d081e | 799 | case BPF_ALU | BPF_ADD | BPF_K: |
c6610de3 MC |
800 | /* A += K */ |
801 | ctx->flags |= SEEN_A; | |
802 | emit_addiu(r_A, r_A, k, ctx); | |
803 | break; | |
a83d081e | 804 | case BPF_ALU | BPF_ADD | BPF_X: |
c6610de3 MC |
805 | /* A += X */ |
806 | ctx->flags |= SEEN_A | SEEN_X; | |
807 | emit_addu(r_A, r_A, r_X, ctx); | |
808 | break; | |
a83d081e | 809 | case BPF_ALU | BPF_SUB | BPF_K: |
c6610de3 MC |
810 | /* A -= K */ |
811 | ctx->flags |= SEEN_A; | |
812 | emit_addiu(r_A, r_A, -k, ctx); | |
813 | break; | |
a83d081e | 814 | case BPF_ALU | BPF_SUB | BPF_X: |
c6610de3 MC |
815 | /* A -= X */ |
816 | ctx->flags |= SEEN_A | SEEN_X; | |
817 | emit_subu(r_A, r_A, r_X, ctx); | |
818 | break; | |
a83d081e | 819 | case BPF_ALU | BPF_MUL | BPF_K: |
c6610de3 MC |
820 | /* A *= K */ |
821 | /* Load K to scratch register before MUL */ | |
ad152bd6 | 822 | ctx->flags |= SEEN_A; |
c6610de3 MC |
823 | emit_load_imm(r_s0, k, ctx); |
824 | emit_mul(r_A, r_A, r_s0, ctx); | |
825 | break; | |
a83d081e | 826 | case BPF_ALU | BPF_MUL | BPF_X: |
c6610de3 | 827 | /* A *= X */ |
c6610de3 MC |
828 | ctx->flags |= SEEN_A | SEEN_X; |
829 | emit_mul(r_A, r_A, r_X, ctx); | |
830 | break; | |
a83d081e | 831 | case BPF_ALU | BPF_DIV | BPF_K: |
c6610de3 MC |
832 | /* A /= k */ |
833 | if (k == 1) | |
834 | break; | |
835 | if (optimize_div(&k)) { | |
836 | ctx->flags |= SEEN_A; | |
837 | emit_srl(r_A, r_A, k, ctx); | |
838 | break; | |
839 | } | |
ad152bd6 | 840 | ctx->flags |= SEEN_A; |
c6610de3 MC |
841 | emit_load_imm(r_s0, k, ctx); |
842 | emit_div(r_A, r_s0, ctx); | |
843 | break; | |
a83d081e | 844 | case BPF_ALU | BPF_MOD | BPF_K: |
c6610de3 | 845 | /* A %= k */ |
2e46477a | 846 | if (k == 1) { |
c6610de3 MC |
847 | ctx->flags |= SEEN_A; |
848 | emit_jit_reg_move(r_A, r_zero, ctx); | |
849 | } else { | |
ad152bd6 | 850 | ctx->flags |= SEEN_A; |
c6610de3 MC |
851 | emit_load_imm(r_s0, k, ctx); |
852 | emit_mod(r_A, r_s0, ctx); | |
853 | } | |
854 | break; | |
a83d081e | 855 | case BPF_ALU | BPF_DIV | BPF_X: |
c6610de3 | 856 | /* A /= X */ |
c6610de3 MC |
857 | ctx->flags |= SEEN_X | SEEN_A; |
858 | /* Check if r_X is zero */ | |
859 | emit_bcond(MIPS_COND_EQ, r_X, r_zero, | |
860 | b_imm(prog->len, ctx), ctx); | |
266a88e2 | 861 | emit_load_imm(r_ret, 0, ctx); /* delay slot */ |
c6610de3 MC |
862 | emit_div(r_A, r_X, ctx); |
863 | break; | |
a83d081e | 864 | case BPF_ALU | BPF_MOD | BPF_X: |
c6610de3 | 865 | /* A %= X */ |
c6610de3 MC |
866 | ctx->flags |= SEEN_X | SEEN_A; |
867 | /* Check if r_X is zero */ | |
868 | emit_bcond(MIPS_COND_EQ, r_X, r_zero, | |
869 | b_imm(prog->len, ctx), ctx); | |
266a88e2 | 870 | emit_load_imm(r_ret, 0, ctx); /* delay slot */ |
c6610de3 MC |
871 | emit_mod(r_A, r_X, ctx); |
872 | break; | |
a83d081e | 873 | case BPF_ALU | BPF_OR | BPF_K: |
c6610de3 MC |
874 | /* A |= K */ |
875 | ctx->flags |= SEEN_A; | |
876 | emit_ori(r_A, r_A, k, ctx); | |
877 | break; | |
a83d081e | 878 | case BPF_ALU | BPF_OR | BPF_X: |
c6610de3 | 879 | /* A |= X */ |
c6610de3 MC |
880 | ctx->flags |= SEEN_A; |
881 | emit_ori(r_A, r_A, r_X, ctx); | |
882 | break; | |
a83d081e | 883 | case BPF_ALU | BPF_XOR | BPF_K: |
c6610de3 MC |
884 | /* A ^= k */ |
885 | ctx->flags |= SEEN_A; | |
886 | emit_xori(r_A, r_A, k, ctx); | |
887 | break; | |
a83d081e DB |
888 | case BPF_ANC | SKF_AD_ALU_XOR_X: |
889 | case BPF_ALU | BPF_XOR | BPF_X: | |
c6610de3 | 890 | /* A ^= X */ |
c6610de3 MC |
891 | ctx->flags |= SEEN_A; |
892 | emit_xor(r_A, r_A, r_X, ctx); | |
893 | break; | |
a83d081e | 894 | case BPF_ALU | BPF_AND | BPF_K: |
c6610de3 MC |
895 | /* A &= K */ |
896 | ctx->flags |= SEEN_A; | |
897 | emit_andi(r_A, r_A, k, ctx); | |
898 | break; | |
a83d081e | 899 | case BPF_ALU | BPF_AND | BPF_X: |
c6610de3 | 900 | /* A &= X */ |
c6610de3 MC |
901 | ctx->flags |= SEEN_A | SEEN_X; |
902 | emit_and(r_A, r_A, r_X, ctx); | |
903 | break; | |
a83d081e | 904 | case BPF_ALU | BPF_LSH | BPF_K: |
c6610de3 MC |
905 | /* A <<= K */ |
906 | ctx->flags |= SEEN_A; | |
907 | emit_sll(r_A, r_A, k, ctx); | |
908 | break; | |
a83d081e | 909 | case BPF_ALU | BPF_LSH | BPF_X: |
c6610de3 MC |
910 | /* A <<= X */ |
911 | ctx->flags |= SEEN_A | SEEN_X; | |
c6610de3 MC |
912 | emit_sllv(r_A, r_A, r_X, ctx); |
913 | break; | |
a83d081e | 914 | case BPF_ALU | BPF_RSH | BPF_K: |
c6610de3 MC |
915 | /* A >>= K */ |
916 | ctx->flags |= SEEN_A; | |
917 | emit_srl(r_A, r_A, k, ctx); | |
918 | break; | |
a83d081e | 919 | case BPF_ALU | BPF_RSH | BPF_X: |
c6610de3 | 920 | ctx->flags |= SEEN_A | SEEN_X; |
c6610de3 MC |
921 | emit_srlv(r_A, r_A, r_X, ctx); |
922 | break; | |
a83d081e | 923 | case BPF_ALU | BPF_NEG: |
c6610de3 MC |
924 | /* A = -A */ |
925 | ctx->flags |= SEEN_A; | |
926 | emit_neg(r_A, ctx); | |
927 | break; | |
a83d081e | 928 | case BPF_JMP | BPF_JA: |
c6610de3 MC |
929 | /* pc += K */ |
930 | emit_b(b_imm(i + k + 1, ctx), ctx); | |
931 | emit_nop(ctx); | |
932 | break; | |
a83d081e | 933 | case BPF_JMP | BPF_JEQ | BPF_K: |
c6610de3 MC |
934 | /* pc += ( A == K ) ? pc->jt : pc->jf */ |
935 | condt = MIPS_COND_EQ | MIPS_COND_K; | |
936 | goto jmp_cmp; | |
a83d081e | 937 | case BPF_JMP | BPF_JEQ | BPF_X: |
c6610de3 MC |
938 | ctx->flags |= SEEN_X; |
939 | /* pc += ( A == X ) ? pc->jt : pc->jf */ | |
940 | condt = MIPS_COND_EQ | MIPS_COND_X; | |
941 | goto jmp_cmp; | |
a83d081e | 942 | case BPF_JMP | BPF_JGE | BPF_K: |
c6610de3 MC |
943 | /* pc += ( A >= K ) ? pc->jt : pc->jf */ |
944 | condt = MIPS_COND_GE | MIPS_COND_K; | |
945 | goto jmp_cmp; | |
a83d081e | 946 | case BPF_JMP | BPF_JGE | BPF_X: |
c6610de3 MC |
947 | ctx->flags |= SEEN_X; |
948 | /* pc += ( A >= X ) ? pc->jt : pc->jf */ | |
949 | condt = MIPS_COND_GE | MIPS_COND_X; | |
950 | goto jmp_cmp; | |
a83d081e | 951 | case BPF_JMP | BPF_JGT | BPF_K: |
c6610de3 MC |
952 | /* pc += ( A > K ) ? pc->jt : pc->jf */ |
953 | condt = MIPS_COND_GT | MIPS_COND_K; | |
954 | goto jmp_cmp; | |
a83d081e | 955 | case BPF_JMP | BPF_JGT | BPF_X: |
c6610de3 MC |
956 | ctx->flags |= SEEN_X; |
957 | /* pc += ( A > X ) ? pc->jt : pc->jf */ | |
958 | condt = MIPS_COND_GT | MIPS_COND_X; | |
959 | jmp_cmp: | |
960 | /* Greater or Equal */ | |
961 | if ((condt & MIPS_COND_GE) || | |
962 | (condt & MIPS_COND_GT)) { | |
963 | if (condt & MIPS_COND_K) { /* K */ | |
ad152bd6 | 964 | ctx->flags |= SEEN_A; |
c6610de3 MC |
965 | emit_sltiu(r_s0, r_A, k, ctx); |
966 | } else { /* X */ | |
ad152bd6 | 967 | ctx->flags |= SEEN_A | |
c6610de3 MC |
968 | SEEN_X; |
969 | emit_sltu(r_s0, r_A, r_X, ctx); | |
970 | } | |
971 | /* A < (K|X) ? r_scrach = 1 */ | |
972 | b_off = b_imm(i + inst->jf + 1, ctx); | |
1ab24a4e | 973 | emit_bcond(MIPS_COND_NE, r_s0, r_zero, b_off, |
c6610de3 MC |
974 | ctx); |
975 | emit_nop(ctx); | |
976 | /* A > (K|X) ? scratch = 0 */ | |
977 | if (condt & MIPS_COND_GT) { | |
978 | /* Checking for equality */ | |
ad152bd6 | 979 | ctx->flags |= SEEN_A | SEEN_X; |
c6610de3 MC |
980 | if (condt & MIPS_COND_K) |
981 | emit_load_imm(r_s0, k, ctx); | |
982 | else | |
983 | emit_jit_reg_move(r_s0, r_X, | |
984 | ctx); | |
985 | b_off = b_imm(i + inst->jf + 1, ctx); | |
986 | emit_bcond(MIPS_COND_EQ, r_A, r_s0, | |
987 | b_off, ctx); | |
988 | emit_nop(ctx); | |
989 | /* Finally, A > K|X */ | |
990 | b_off = b_imm(i + inst->jt + 1, ctx); | |
991 | emit_b(b_off, ctx); | |
992 | emit_nop(ctx); | |
993 | } else { | |
994 | /* A >= (K|X) so jump */ | |
995 | b_off = b_imm(i + inst->jt + 1, ctx); | |
996 | emit_b(b_off, ctx); | |
997 | emit_nop(ctx); | |
998 | } | |
999 | } else { | |
1000 | /* A == K|X */ | |
1001 | if (condt & MIPS_COND_K) { /* K */ | |
ad152bd6 | 1002 | ctx->flags |= SEEN_A; |
c6610de3 MC |
1003 | emit_load_imm(r_s0, k, ctx); |
1004 | /* jump true */ | |
1005 | b_off = b_imm(i + inst->jt + 1, ctx); | |
1006 | emit_bcond(MIPS_COND_EQ, r_A, r_s0, | |
1007 | b_off, ctx); | |
1008 | emit_nop(ctx); | |
1009 | /* jump false */ | |
1010 | b_off = b_imm(i + inst->jf + 1, | |
1011 | ctx); | |
1012 | emit_bcond(MIPS_COND_NE, r_A, r_s0, | |
1013 | b_off, ctx); | |
1014 | emit_nop(ctx); | |
1015 | } else { /* X */ | |
1016 | /* jump true */ | |
1017 | ctx->flags |= SEEN_A | SEEN_X; | |
1018 | b_off = b_imm(i + inst->jt + 1, | |
1019 | ctx); | |
1020 | emit_bcond(MIPS_COND_EQ, r_A, r_X, | |
1021 | b_off, ctx); | |
1022 | emit_nop(ctx); | |
1023 | /* jump false */ | |
1024 | b_off = b_imm(i + inst->jf + 1, ctx); | |
1025 | emit_bcond(MIPS_COND_NE, r_A, r_X, | |
1026 | b_off, ctx); | |
1027 | emit_nop(ctx); | |
1028 | } | |
1029 | } | |
1030 | break; | |
a83d081e | 1031 | case BPF_JMP | BPF_JSET | BPF_K: |
ad152bd6 | 1032 | ctx->flags |= SEEN_A; |
c6610de3 MC |
1033 | /* pc += (A & K) ? pc -> jt : pc -> jf */ |
1034 | emit_load_imm(r_s1, k, ctx); | |
1035 | emit_and(r_s0, r_A, r_s1, ctx); | |
1036 | /* jump true */ | |
1037 | b_off = b_imm(i + inst->jt + 1, ctx); | |
1038 | emit_bcond(MIPS_COND_NE, r_s0, r_zero, b_off, ctx); | |
1039 | emit_nop(ctx); | |
1040 | /* jump false */ | |
1041 | b_off = b_imm(i + inst->jf + 1, ctx); | |
1042 | emit_b(b_off, ctx); | |
1043 | emit_nop(ctx); | |
1044 | break; | |
a83d081e | 1045 | case BPF_JMP | BPF_JSET | BPF_X: |
ad152bd6 | 1046 | ctx->flags |= SEEN_X | SEEN_A; |
c6610de3 MC |
1047 | /* pc += (A & X) ? pc -> jt : pc -> jf */ |
1048 | emit_and(r_s0, r_A, r_X, ctx); | |
1049 | /* jump true */ | |
1050 | b_off = b_imm(i + inst->jt + 1, ctx); | |
1051 | emit_bcond(MIPS_COND_NE, r_s0, r_zero, b_off, ctx); | |
1052 | emit_nop(ctx); | |
1053 | /* jump false */ | |
1054 | b_off = b_imm(i + inst->jf + 1, ctx); | |
1055 | emit_b(b_off, ctx); | |
1056 | emit_nop(ctx); | |
1057 | break; | |
a83d081e | 1058 | case BPF_RET | BPF_A: |
c6610de3 MC |
1059 | ctx->flags |= SEEN_A; |
1060 | if (i != prog->len - 1) | |
1061 | /* | |
1062 | * If this is not the last instruction | |
1063 | * then jump to the epilogue | |
1064 | */ | |
1065 | emit_b(b_imm(prog->len, ctx), ctx); | |
1066 | emit_reg_move(r_ret, r_A, ctx); /* delay slot */ | |
1067 | break; | |
a83d081e | 1068 | case BPF_RET | BPF_K: |
c6610de3 MC |
1069 | /* |
1070 | * It can emit two instructions so it does not fit on | |
1071 | * the delay slot. | |
1072 | */ | |
1073 | emit_load_imm(r_ret, k, ctx); | |
1074 | if (i != prog->len - 1) { | |
1075 | /* | |
1076 | * If this is not the last instruction | |
1077 | * then jump to the epilogue | |
1078 | */ | |
1079 | emit_b(b_imm(prog->len, ctx), ctx); | |
1080 | emit_nop(ctx); | |
1081 | } | |
1082 | break; | |
a83d081e | 1083 | case BPF_MISC | BPF_TAX: |
c6610de3 MC |
1084 | /* X = A */ |
1085 | ctx->flags |= SEEN_X | SEEN_A; | |
1086 | emit_jit_reg_move(r_X, r_A, ctx); | |
1087 | break; | |
a83d081e | 1088 | case BPF_MISC | BPF_TXA: |
c6610de3 MC |
1089 | /* A = X */ |
1090 | ctx->flags |= SEEN_A | SEEN_X; | |
c6610de3 MC |
1091 | emit_jit_reg_move(r_A, r_X, ctx); |
1092 | break; | |
1093 | /* AUX */ | |
a83d081e | 1094 | case BPF_ANC | SKF_AD_PROTOCOL: |
c6610de3 MC |
1095 | /* A = ntohs(skb->protocol */ |
1096 | ctx->flags |= SEEN_SKB | SEEN_OFF | SEEN_A; | |
1097 | BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, | |
1098 | protocol) != 2); | |
1099 | off = offsetof(struct sk_buff, protocol); | |
1100 | emit_half_load(r_A, r_skb, off, ctx); | |
1101 | #ifdef CONFIG_CPU_LITTLE_ENDIAN | |
1102 | /* This needs little endian fixup */ | |
3c09bae4 | 1103 | if (cpu_has_wsbh) { |
b4f16c93 RB |
1104 | /* R2 and later have the wsbh instruction */ |
1105 | emit_wsbh(r_A, r_A, ctx); | |
1106 | } else { | |
c6610de3 MC |
1107 | /* Get first byte */ |
1108 | emit_andi(r_tmp_imm, r_A, 0xff, ctx); | |
1109 | /* Shift it */ | |
1110 | emit_sll(r_tmp, r_tmp_imm, 8, ctx); | |
1111 | /* Get second byte */ | |
1112 | emit_srl(r_tmp_imm, r_A, 8, ctx); | |
1113 | emit_andi(r_tmp_imm, r_tmp_imm, 0xff, ctx); | |
1114 | /* Put everyting together in r_A */ | |
1115 | emit_or(r_A, r_tmp, r_tmp_imm, ctx); | |
c6610de3 MC |
1116 | } |
1117 | #endif | |
1118 | break; | |
a83d081e | 1119 | case BPF_ANC | SKF_AD_CPU: |
c6610de3 MC |
1120 | ctx->flags |= SEEN_A | SEEN_OFF; |
1121 | /* A = current_thread_info()->cpu */ | |
1122 | BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, | |
1123 | cpu) != 4); | |
1124 | off = offsetof(struct thread_info, cpu); | |
1125 | /* $28/gp points to the thread_info struct */ | |
1126 | emit_load(r_A, 28, off, ctx); | |
1127 | break; | |
a83d081e | 1128 | case BPF_ANC | SKF_AD_IFINDEX: |
c6610de3 | 1129 | /* A = skb->dev->ifindex */ |
ad152bd6 | 1130 | ctx->flags |= SEEN_SKB | SEEN_A; |
c6610de3 | 1131 | off = offsetof(struct sk_buff, dev); |
b6a14a98 MC |
1132 | /* Load *dev pointer */ |
1133 | emit_load_ptr(r_s0, r_skb, off, ctx); | |
c6610de3 MC |
1134 | /* error (0) in the delay slot */ |
1135 | emit_bcond(MIPS_COND_EQ, r_s0, r_zero, | |
1136 | b_imm(prog->len, ctx), ctx); | |
1137 | emit_reg_move(r_ret, r_zero, ctx); | |
1138 | BUILD_BUG_ON(FIELD_SIZEOF(struct net_device, | |
1139 | ifindex) != 4); | |
1140 | off = offsetof(struct net_device, ifindex); | |
1141 | emit_load(r_A, r_s0, off, ctx); | |
1142 | break; | |
a83d081e | 1143 | case BPF_ANC | SKF_AD_MARK: |
c6610de3 MC |
1144 | ctx->flags |= SEEN_SKB | SEEN_A; |
1145 | BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4); | |
1146 | off = offsetof(struct sk_buff, mark); | |
1147 | emit_load(r_A, r_skb, off, ctx); | |
1148 | break; | |
a83d081e | 1149 | case BPF_ANC | SKF_AD_RXHASH: |
c6610de3 MC |
1150 | ctx->flags |= SEEN_SKB | SEEN_A; |
1151 | BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, hash) != 4); | |
1152 | off = offsetof(struct sk_buff, hash); | |
1153 | emit_load(r_A, r_skb, off, ctx); | |
1154 | break; | |
a83d081e DB |
1155 | case BPF_ANC | SKF_AD_VLAN_TAG: |
1156 | case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT: | |
ad152bd6 | 1157 | ctx->flags |= SEEN_SKB | SEEN_A; |
c6610de3 MC |
1158 | BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, |
1159 | vlan_tci) != 2); | |
1160 | off = offsetof(struct sk_buff, vlan_tci); | |
1161 | emit_half_load(r_s0, r_skb, off, ctx); | |
91a41d7f | 1162 | if (code == (BPF_ANC | SKF_AD_VLAN_TAG)) { |
6e86c59d | 1163 | emit_andi(r_A, r_s0, (u16)~VLAN_TAG_PRESENT, ctx); |
91a41d7f | 1164 | } else { |
9ee1606e | 1165 | emit_andi(r_A, r_s0, VLAN_TAG_PRESENT, ctx); |
91a41d7f MC |
1166 | /* return 1 if present */ |
1167 | emit_sltu(r_A, r_zero, r_A, ctx); | |
1168 | } | |
c6610de3 | 1169 | break; |
a83d081e | 1170 | case BPF_ANC | SKF_AD_PKTTYPE: |
9eebfe47 MC |
1171 | ctx->flags |= SEEN_SKB; |
1172 | ||
233577a2 | 1173 | emit_load_byte(r_tmp, r_skb, PKT_TYPE_OFFSET(), ctx); |
c6610de3 MC |
1174 | /* Keep only the last 3 bits */ |
1175 | emit_andi(r_A, r_tmp, PKT_TYPE_MAX, ctx); | |
b4fe0ec8 MC |
1176 | #ifdef __BIG_ENDIAN_BITFIELD |
1177 | /* Get the actual packet type to the lower 3 bits */ | |
1178 | emit_srl(r_A, r_A, 5, ctx); | |
1179 | #endif | |
c6610de3 | 1180 | break; |
a83d081e | 1181 | case BPF_ANC | SKF_AD_QUEUE: |
c6610de3 MC |
1182 | ctx->flags |= SEEN_SKB | SEEN_A; |
1183 | BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, | |
1184 | queue_mapping) != 2); | |
1185 | BUILD_BUG_ON(offsetof(struct sk_buff, | |
1186 | queue_mapping) > 0xff); | |
1187 | off = offsetof(struct sk_buff, queue_mapping); | |
1188 | emit_half_load(r_A, r_skb, off, ctx); | |
1189 | break; | |
1190 | default: | |
78b95b66 MC |
1191 | pr_debug("%s: Unhandled opcode: 0x%02x\n", __FILE__, |
1192 | inst->code); | |
c6610de3 MC |
1193 | return -1; |
1194 | } | |
1195 | } | |
1196 | ||
1197 | /* compute offsets only during the first pass */ | |
1198 | if (ctx->target == NULL) | |
1199 | ctx->offsets[i] = ctx->idx * 4; | |
1200 | ||
1201 | return 0; | |
1202 | } | |
1203 | ||
1204 | int bpf_jit_enable __read_mostly; | |
1205 | ||
7ae457c1 | 1206 | void bpf_jit_compile(struct bpf_prog *fp) |
c6610de3 MC |
1207 | { |
1208 | struct jit_ctx ctx; | |
1209 | unsigned int alloc_size, tmp_idx; | |
1210 | ||
1211 | if (!bpf_jit_enable) | |
1212 | return; | |
1213 | ||
1214 | memset(&ctx, 0, sizeof(ctx)); | |
1215 | ||
1216 | ctx.offsets = kcalloc(fp->len, sizeof(*ctx.offsets), GFP_KERNEL); | |
1217 | if (ctx.offsets == NULL) | |
1218 | return; | |
1219 | ||
1220 | ctx.skf = fp; | |
1221 | ||
1222 | if (build_body(&ctx)) | |
1223 | goto out; | |
1224 | ||
1225 | tmp_idx = ctx.idx; | |
1226 | build_prologue(&ctx); | |
1227 | ctx.prologue_bytes = (ctx.idx - tmp_idx) * 4; | |
1228 | /* just to complete the ctx.idx count */ | |
1229 | build_epilogue(&ctx); | |
1230 | ||
1231 | alloc_size = 4 * ctx.idx; | |
1232 | ctx.target = module_alloc(alloc_size); | |
1233 | if (ctx.target == NULL) | |
1234 | goto out; | |
1235 | ||
1236 | /* Clean it */ | |
1237 | memset(ctx.target, 0, alloc_size); | |
1238 | ||
1239 | ctx.idx = 0; | |
1240 | ||
1241 | /* Generate the actual JIT code */ | |
1242 | build_prologue(&ctx); | |
1243 | build_body(&ctx); | |
1244 | build_epilogue(&ctx); | |
1245 | ||
1246 | /* Update the icache */ | |
1247 | flush_icache_range((ptr)ctx.target, (ptr)(ctx.target + ctx.idx)); | |
1248 | ||
1249 | if (bpf_jit_enable > 1) | |
1250 | /* Dump JIT code */ | |
1251 | bpf_jit_dump(fp->len, alloc_size, 2, ctx.target); | |
1252 | ||
1253 | fp->bpf_func = (void *)ctx.target; | |
a91263d5 | 1254 | fp->jited = 1; |
c6610de3 MC |
1255 | |
1256 | out: | |
1257 | kfree(ctx.offsets); | |
1258 | } | |
1259 | ||
7ae457c1 | 1260 | void bpf_jit_free(struct bpf_prog *fp) |
c6610de3 MC |
1261 | { |
1262 | if (fp->jited) | |
be1f221c | 1263 | module_memfree(fp->bpf_func); |
60a3b225 DB |
1264 | |
1265 | bpf_prog_unlock_free(fp); | |
c6610de3 | 1266 | } |