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65040e22 J |
1 | /* |
2 | * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights | |
3 | * reserved. | |
4 | * | |
5 | * This software is available to you under a choice of one of two | |
6 | * licenses. You may choose to be licensed under the terms of the GNU | |
7 | * General Public License (GPL) Version 2, available from the file | |
8 | * COPYING in the main directory of this source tree, or the NetLogic | |
9 | * license below: | |
10 | * | |
11 | * Redistribution and use in source and binary forms, with or without | |
12 | * modification, are permitted provided that the following conditions | |
13 | * are met: | |
14 | * | |
15 | * 1. Redistributions of source code must retain the above copyright | |
16 | * notice, this list of conditions and the following disclaimer. | |
17 | * 2. Redistributions in binary form must reproduce the above copyright | |
18 | * notice, this list of conditions and the following disclaimer in | |
19 | * the documentation and/or other materials provided with the | |
20 | * distribution. | |
21 | * | |
22 | * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR | |
23 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | |
24 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
25 | * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE | |
26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR | |
29 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
30 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE | |
31 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN | |
32 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
33 | */ | |
34 | ||
35 | #include <linux/kernel.h> | |
aceee09d | 36 | #include <linux/of_fdt.h> |
65040e22 | 37 | |
bdc92d74 | 38 | #include <asm/idle.h> |
65040e22 J |
39 | #include <asm/reboot.h> |
40 | #include <asm/time.h> | |
41 | #include <asm/bootinfo.h> | |
42 | ||
65040e22 J |
43 | #include <asm/netlogic/haldefs.h> |
44 | #include <asm/netlogic/common.h> | |
45 | ||
46 | #include <asm/netlogic/xlp-hal/iomap.h> | |
47 | #include <asm/netlogic/xlp-hal/xlp.h> | |
48 | #include <asm/netlogic/xlp-hal/sys.h> | |
49 | ||
77ae798f J |
50 | uint64_t nlm_io_base; |
51 | struct nlm_soc_info nlm_nodes[NLM_NR_NODES]; | |
2a37b1ae | 52 | cpumask_t nlm_cpumask = CPU_MASK_CPU0; |
77ae798f | 53 | unsigned int nlm_threads_per_core; |
98d4884c | 54 | unsigned int xlp_cores_per_node; |
66d29985 | 55 | |
65040e22 J |
56 | static void nlm_linux_exit(void) |
57 | { | |
77ae798f J |
58 | uint64_t sysbase = nlm_get_node(0)->sysbase; |
59 | ||
861c0569 J |
60 | if (cpu_is_xlp9xx()) |
61 | nlm_write_sys_reg(sysbase, SYS_9XX_CHIP_RESET, 1); | |
62 | else | |
63 | nlm_write_sys_reg(sysbase, SYS_CHIP_RESET, 1); | |
65040e22 J |
64 | for ( ; ; ) |
65 | cpu_wait(); | |
66 | } | |
67 | ||
72213834 J |
68 | static void nlm_fixup_mem(void) |
69 | { | |
70 | const int pref_backup = 512; | |
71 | int i; | |
72 | ||
73 | for (i = 0; i < boot_mem_map.nr_map; i++) { | |
74 | if (boot_mem_map.map[i].type != BOOT_MEM_RAM) | |
75 | continue; | |
76 | boot_mem_map.map[i].size -= pref_backup; | |
77 | } | |
78 | } | |
79 | ||
a2ba6cd6 J |
80 | static void __init xlp_init_mem_from_bars(void) |
81 | { | |
82 | uint64_t map[16]; | |
83 | int i, n; | |
84 | ||
85 | n = xlp_get_dram_map(-1, map); /* -1: info for all nodes */ | |
86 | for (i = 0; i < n; i += 2) { | |
87 | /* exclude 0x1000_0000-0x2000_0000, u-boot device */ | |
88 | if (map[i] <= 0x10000000 && map[i+1] > 0x10000000) | |
89 | map[i+1] = 0x10000000; | |
90 | if (map[i] > 0x10000000 && map[i] < 0x20000000) | |
91 | map[i] = 0x20000000; | |
92 | ||
93 | add_memory_region(map[i], map[i+1] - map[i], BOOT_MEM_RAM); | |
94 | } | |
95 | } | |
96 | ||
65040e22 J |
97 | void __init plat_mem_setup(void) |
98 | { | |
e92e1d0d J |
99 | #ifdef CONFIG_SMP |
100 | nlm_wakeup_secondary_cpus(); | |
101 | ||
102 | /* update TLB size after waking up threads */ | |
103 | current_cpu_data.tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1; | |
104 | ||
105 | register_smp_ops(&nlm_smp_ops); | |
106 | #endif | |
65040e22 J |
107 | _machine_restart = (void (*)(char *))nlm_linux_exit; |
108 | _machine_halt = nlm_linux_exit; | |
109 | pm_power_off = nlm_linux_exit; | |
e83fc6be | 110 | |
aceee09d | 111 | /* memory and bootargs from DT */ |
e363bbac | 112 | xlp_early_init_devtree(); |
a2ba6cd6 J |
113 | |
114 | if (boot_mem_map.nr_map == 0) { | |
115 | pr_info("Using DRAM BARs for memory map.\n"); | |
116 | xlp_init_mem_from_bars(); | |
117 | } | |
118 | /* Calculate and setup wired entries for mapped kernel */ | |
72213834 | 119 | nlm_fixup_mem(); |
65040e22 J |
120 | } |
121 | ||
122 | const char *get_system_type(void) | |
123 | { | |
5874743e | 124 | switch (read_c0_prid() & PRID_IMP_MASK) { |
8907c55e | 125 | case PRID_IMP_NETLOGIC_XLP9XX: |
1c983986 | 126 | case PRID_IMP_NETLOGIC_XLP5XX: |
4ca86a2f J |
127 | case PRID_IMP_NETLOGIC_XLP2XX: |
128 | return "Broadcom XLPII Series"; | |
129 | default: | |
130 | return "Netlogic XLP Series"; | |
131 | } | |
65040e22 J |
132 | } |
133 | ||
134 | void __init prom_free_prom_memory(void) | |
135 | { | |
136 | /* Nothing yet */ | |
137 | } | |
138 | ||
139 | void xlp_mmu_init(void) | |
140 | { | |
4ca86a2f J |
141 | u32 conf4; |
142 | ||
143 | if (cpu_is_xlpii()) { | |
144 | /* XLPII series has extended pagesize in config 4 */ | |
145 | conf4 = read_c0_config4() & ~0x1f00u; | |
146 | write_c0_config4(conf4 | ((PAGE_SHIFT - 10) / 2 << 8)); | |
147 | } else { | |
148 | /* enable extended TLB and Large Fixed TLB */ | |
149 | write_c0_config6(read_c0_config6() | 0x24); | |
150 | ||
151 | /* set page mask of extended Fixed TLB in config7 */ | |
152 | write_c0_config7(PM_DEFAULT_MASK >> | |
153 | (13 + (ffz(PM_DEFAULT_MASK >> 13) / 2))); | |
154 | } | |
65040e22 J |
155 | } |
156 | ||
ed21cfe2 GR |
157 | void nlm_percpu_init(int hwcpuid) |
158 | { | |
159 | } | |
160 | ||
65040e22 J |
161 | void __init prom_init(void) |
162 | { | |
571886b2 J |
163 | void *reset_vec; |
164 | ||
77ae798f | 165 | nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE); |
98d4884c J |
166 | if (cpu_is_xlp9xx()) |
167 | xlp_cores_per_node = 32; | |
168 | else | |
169 | xlp_cores_per_node = 8; | |
571886b2 | 170 | nlm_init_boot_cpu(); |
65040e22 | 171 | xlp_mmu_init(); |
77ae798f | 172 | nlm_node_init(0); |
aceee09d | 173 | xlp_dt_init((void *)(long)fw_arg0); |
e83fc6be | 174 | |
571886b2 J |
175 | /* Update reset entry point with CPU init code */ |
176 | reset_vec = (void *)CKSEG1ADDR(RESET_VEC_PHYS); | |
919f9abb | 177 | memset(reset_vec, 0, RESET_VEC_SIZE); |
571886b2 J |
178 | memcpy(reset_vec, (void *)nlm_reset_entry, |
179 | (nlm_reset_entry_end - nlm_reset_entry)); | |
180 | ||
65040e22 | 181 | #ifdef CONFIG_SMP |
2a37b1ae | 182 | cpumask_setall(&nlm_cpumask); |
65040e22 J |
183 | #endif |
184 | } |