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MIPS: Netlogic: Identify XLP 9XX chip
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1/*
2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
3 * reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the NetLogic
9 * license below:
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in
19 * the documentation and/or other materials provided with the
20 * distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#include <linux/kernel.h>
aceee09d 36#include <linux/of_fdt.h>
65040e22 37
bdc92d74 38#include <asm/idle.h>
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39#include <asm/reboot.h>
40#include <asm/time.h>
41#include <asm/bootinfo.h>
42
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43#include <asm/netlogic/haldefs.h>
44#include <asm/netlogic/common.h>
45
46#include <asm/netlogic/xlp-hal/iomap.h>
47#include <asm/netlogic/xlp-hal/xlp.h>
48#include <asm/netlogic/xlp-hal/sys.h>
49
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50uint64_t nlm_io_base;
51struct nlm_soc_info nlm_nodes[NLM_NR_NODES];
2a37b1ae 52cpumask_t nlm_cpumask = CPU_MASK_CPU0;
77ae798f 53unsigned int nlm_threads_per_core;
66d29985 54
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55static void nlm_linux_exit(void)
56{
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57 uint64_t sysbase = nlm_get_node(0)->sysbase;
58
59 nlm_write_sys_reg(sysbase, SYS_CHIP_RESET, 1);
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60 for ( ; ; )
61 cpu_wait();
62}
63
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64static void nlm_fixup_mem(void)
65{
66 const int pref_backup = 512;
67 int i;
68
69 for (i = 0; i < boot_mem_map.nr_map; i++) {
70 if (boot_mem_map.map[i].type != BOOT_MEM_RAM)
71 continue;
72 boot_mem_map.map[i].size -= pref_backup;
73 }
74}
75
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76static void __init xlp_init_mem_from_bars(void)
77{
78 uint64_t map[16];
79 int i, n;
80
81 n = xlp_get_dram_map(-1, map); /* -1: info for all nodes */
82 for (i = 0; i < n; i += 2) {
83 /* exclude 0x1000_0000-0x2000_0000, u-boot device */
84 if (map[i] <= 0x10000000 && map[i+1] > 0x10000000)
85 map[i+1] = 0x10000000;
86 if (map[i] > 0x10000000 && map[i] < 0x20000000)
87 map[i] = 0x20000000;
88
89 add_memory_region(map[i], map[i+1] - map[i], BOOT_MEM_RAM);
90 }
91}
92
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93void __init plat_mem_setup(void)
94{
95 panic_timeout = 5;
96 _machine_restart = (void (*)(char *))nlm_linux_exit;
97 _machine_halt = nlm_linux_exit;
98 pm_power_off = nlm_linux_exit;
e83fc6be 99
aceee09d 100 /* memory and bootargs from DT */
e363bbac 101 xlp_early_init_devtree();
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102
103 if (boot_mem_map.nr_map == 0) {
104 pr_info("Using DRAM BARs for memory map.\n");
105 xlp_init_mem_from_bars();
106 }
107 /* Calculate and setup wired entries for mapped kernel */
72213834 108 nlm_fixup_mem();
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109}
110
111const char *get_system_type(void)
112{
4ca86a2f 113 switch (read_c0_prid() & 0xff00) {
8907c55e 114 case PRID_IMP_NETLOGIC_XLP9XX:
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115 case PRID_IMP_NETLOGIC_XLP2XX:
116 return "Broadcom XLPII Series";
117 default:
118 return "Netlogic XLP Series";
119 }
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120}
121
122void __init prom_free_prom_memory(void)
123{
124 /* Nothing yet */
125}
126
127void xlp_mmu_init(void)
128{
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129 u32 conf4;
130
131 if (cpu_is_xlpii()) {
132 /* XLPII series has extended pagesize in config 4 */
133 conf4 = read_c0_config4() & ~0x1f00u;
134 write_c0_config4(conf4 | ((PAGE_SHIFT - 10) / 2 << 8));
135 } else {
136 /* enable extended TLB and Large Fixed TLB */
137 write_c0_config6(read_c0_config6() | 0x24);
138
139 /* set page mask of extended Fixed TLB in config7 */
140 write_c0_config7(PM_DEFAULT_MASK >>
141 (13 + (ffz(PM_DEFAULT_MASK >> 13) / 2)));
142 }
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143}
144
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145void nlm_percpu_init(int hwcpuid)
146{
147}
148
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149void __init prom_init(void)
150{
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151 void *reset_vec;
152
77ae798f 153 nlm_io_base = CKSEG1ADDR(XLP_DEFAULT_IO_BASE);
571886b2 154 nlm_init_boot_cpu();
65040e22 155 xlp_mmu_init();
77ae798f 156 nlm_node_init(0);
aceee09d 157 xlp_dt_init((void *)(long)fw_arg0);
e83fc6be 158
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159 /* Update reset entry point with CPU init code */
160 reset_vec = (void *)CKSEG1ADDR(RESET_VEC_PHYS);
919f9abb 161 memset(reset_vec, 0, RESET_VEC_SIZE);
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162 memcpy(reset_vec, (void *)nlm_reset_entry,
163 (nlm_reset_entry_end - nlm_reset_entry));
164
65040e22 165#ifdef CONFIG_SMP
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166 cpumask_setall(&nlm_cpumask);
167 nlm_wakeup_secondary_cpus();
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168
169 /* update TLB size after waking up threads */
170 current_cpu_data.tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1;
171
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172 register_smp_ops(&nlm_smp_ops);
173#endif
174}