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MIPS: Netlogic: Add default XLP config.
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1/*
2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
3 * reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the NetLogic
9 * license below:
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in
19 * the documentation and/or other materials provided with the
20 * distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
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35#include <linux/init.h>
36
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37#include <asm/asm.h>
38#include <asm/asm-offsets.h>
39#include <asm/regdef.h>
40#include <asm/mipsregs.h>
41
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42/*
43 * Early code for secondary CPUs. This will get them out of the bootloader
44 * code and into linux. Needed because the bootloader area will be taken
45 * and initialized by linux.
5c642506 46 */
a74e3353 47 __CPUINIT
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48NESTED(prom_pre_boot_secondary_cpus, 16, sp)
49 .set mips64
50 mfc0 t0, $15, 1 # read ebase
51 andi t0, 0x1f # t0 has the processor_id()
52 sll t0, 2 # offset in cpu array
53
54 PTR_LA t1, nlm_cpu_ready # mark CPU ready
55 PTR_ADDU t1, t0
56 li t2, 1
57 sw t2, 0(t1)
58
59 PTR_LA t1, nlm_cpu_unblock
60 PTR_ADDU t1, t0
611: lw t2, 0(t1) # wait till unblocked
62 beqz t2, 1b
63 nop
64
65 PTR_LA t1, nlm_next_sp
66 PTR_L sp, 0(t1)
67 PTR_LA t1, nlm_next_gp
68 PTR_L gp, 0(t1)
69
70 PTR_LA t0, nlm_early_init_secondary
71 jalr t0
72 nop
73
74 PTR_LA t0, smp_bootstrap
75 jr t0
76 nop
77END(prom_pre_boot_secondary_cpus)
78
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79/*
80 * NMI code, used for CPU wakeup, copied to reset entry
81 */
0c965407 82EXPORT(nlm_reset_entry)
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83 .set push
84 .set noat
85 .set mips64
86 .set noreorder
87
88 /* Clear the NMI and BEV bits */
89 MFC0 k0, CP0_STATUS
90 li k1, 0xffb7ffff
91 and k0, k0, k1
92 MTC0 k0, CP0_STATUS
93
94 PTR_LA k1, secondary_entry_point
95 PTR_L k0, 0(k1)
96 jr k0
97 nop
98 .set pop
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99EXPORT(nlm_reset_entry_end)
100 __FINIT