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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
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2 | /* |
3 | * Copyright (C) 2016 Imagination Technologies | |
fb615d61 | 4 | * Author: Paul Burton <paul.burton@mips.com> |
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5 | * |
6 | * pcibios_align_resource taken from arch/arm/kernel/bios32.c. | |
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7 | */ |
8 | ||
9 | #include <linux/pci.h> | |
10 | ||
11 | /* | |
12 | * We need to avoid collisions with `mirrored' VGA ports | |
13 | * and other strange ISA hardware, so we always want the | |
14 | * addresses to be allocated in the 0x000-0x0ff region | |
15 | * modulo 0x400. | |
16 | * | |
17 | * Why? Because some silly external IO cards only decode | |
18 | * the low 10 bits of the IO address. The 0x00-0xff region | |
19 | * is reserved for motherboard devices that decode all 16 | |
20 | * bits, so it's ok to allocate at, say, 0x2800-0x28ff, | |
21 | * but we want to try to avoid allocating at 0x2900-0x2bff | |
22 | * which might have be mirrored at 0x0100-0x03ff.. | |
23 | */ | |
24 | resource_size_t pcibios_align_resource(void *data, const struct resource *res, | |
25 | resource_size_t size, resource_size_t align) | |
26 | { | |
27 | struct pci_dev *dev = data; | |
28 | resource_size_t start = res->start; | |
29 | struct pci_host_bridge *host_bridge; | |
30 | ||
31 | if (res->flags & IORESOURCE_IO && start & 0x300) | |
32 | start = (start + 0x3ff) & ~0x3ff; | |
33 | ||
34 | start = (start + align - 1) & ~(align - 1); | |
35 | ||
36 | host_bridge = pci_find_host_bridge(dev->bus); | |
37 | ||
38 | if (host_bridge->align_resource) | |
39 | return host_bridge->align_resource(dev, res, | |
40 | start, size, align); | |
41 | ||
42 | return start; | |
43 | } | |
44 | ||
45 | void pcibios_fixup_bus(struct pci_bus *bus) | |
46 | { | |
47 | pci_read_bridge_bases(bus); | |
48 | } |