[mirror_ubuntu-bionic-kernel.git] / arch / mips / pci / pci.c

/*
 * This program is free software; you can redistribute	it and/or modify it
 * under  the terms of	the GNU General	 Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 * Copyright (C) 2003, 04, 11 Ralf Baechle (ralf@linux-mips.org)
 * Copyright (C) 2011 Wind River Systems,
 *   written by Ralf Baechle (ralf@linux-mips.org)
 */
#include <linux/bug.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/bootmem.h>
#include <linux/export.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/of_address.h>

#include <asm/cpu-info.h>

unsigned long PCIBIOS_MIN_IO;
EXPORT_SYMBOL(PCIBIOS_MIN_IO);

unsigned long PCIBIOS_MIN_MEM;
EXPORT_SYMBOL(PCIBIOS_MIN_MEM);

static int __init pcibios_set_cache_line_size(void)
{
	struct cpuinfo_mips *c = &current_cpu_data;
	unsigned int lsize;

	/*
	 * Set PCI cacheline size to that of the highest level in the
	 * cache hierarchy.
	 */
	lsize = c->dcache.linesz;
	lsize = c->scache.linesz ? : lsize;
	lsize = c->tcache.linesz ? : lsize;

	BUG_ON(!lsize);

	pci_dfl_cache_line_size = lsize >> 2;

	pr_debug("PCI: pci_cache_line_size set to %d bytes\n", lsize);
	return 0;
}
arch_initcall(pcibios_set_cache_line_size);

void pci_resource_to_user(const struct pci_dev *dev, int bar,
			  const struct resource *rsrc, resource_size_t *start,
			  resource_size_t *end)
{
	phys_addr_t size = resource_size(rsrc);

	*start = fixup_bigphys_addr(rsrc->start, size);
	*end = rsrc->start + size;
}

int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
			enum pci_mmap_state mmap_state, int write_combine)
{
	unsigned long prot;

	/*
	 * I/O space can be accessed via normal processor loads and stores on
	 * this platform but for now we elect not to do this and portable
	 * drivers should not do this anyway.
	 */
	if (mmap_state == pci_mmap_io)
		return -EINVAL;

	/*
	 * Ignore write-combine; for now only return uncached mappings.
	 */
	prot = pgprot_val(vma->vm_page_prot);
	prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
	vma->vm_page_prot = __pgprot(prot);

	return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
		vma->vm_end - vma->vm_start, vma->vm_page_prot);
}
Commit	Line	Data
1da177e4	1	/*
70342287 RB	2	* This program is free software; you can redistribute it and/or modify it
70342287 RB	3	* under the terms of the GNU General Public License as published by the
1da177e4 LT	4	* Free Software Foundation; either version 2 of the License, or (at your
	5	* option) any later version.
	6	*
c539ef7d RB	7	* Copyright (C) 2003, 04, 11 Ralf Baechle (ralf@linux-mips.org)
	8	* Copyright (C) 2011 Wind River Systems,
	9	* written by Ralf Baechle (ralf@linux-mips.org)
1da177e4	10	*/
c539ef7d	11	#include <linux/bug.h>
1da177e4 LT	12	#include <linux/kernel.h>
	13	#include <linux/mm.h>
	14	#include <linux/bootmem.h>
cae39d13	15	#include <linux/export.h>
1da177e4 LT	16	#include <linux/init.h>
	17	#include <linux/types.h>
	18	#include <linux/pci.h>
a48cf37a	19	#include <linux/of_address.h>
1da177e4	20
c539ef7d RB	21	#include <asm/cpu-info.h>
c539ef7d RB	22
982f6ffe	23	unsigned long PCIBIOS_MIN_IO;
f8091a88	24	EXPORT_SYMBOL(PCIBIOS_MIN_IO);
639702bd	25
f8091a88 PB	26	unsigned long PCIBIOS_MIN_MEM;
f8091a88 PB	27	EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
1da177e4	28
f474ba9d	29	static int __init pcibios_set_cache_line_size(void)
c539ef7d RB	30	{
	31	struct cpuinfo_mips *c = &current_cpu_data;
	32	unsigned int lsize;
	33
	34	/*
	35	* Set PCI cacheline size to that of the highest level in the
	36	* cache hierarchy.
	37	*/
	38	lsize = c->dcache.linesz;
	39	lsize = c->scache.linesz ? : lsize;
	40	lsize = c->tcache.linesz ? : lsize;
	41
	42	BUG_ON(!lsize);
	43
	44	pci_dfl_cache_line_size = lsize >> 2;
	45
	46	pr_debug("PCI: pci_cache_line_size set to %d bytes\n", lsize);
f474ba9d	47	return 0;
c539ef7d	48	}
f474ba9d	49	arch_initcall(pcibios_set_cache_line_size);
c539ef7d	50
8221a013 BH	51	void pci_resource_to_user(const struct pci_dev *dev, int bar,
	52	const struct resource rsrc, resource_size_t start,
	53	resource_size_t *end)
	54	{
	55	phys_addr_t size = resource_size(rsrc);
	56
	57	*start = fixup_bigphys_addr(rsrc->start, size);
	58	*end = rsrc->start + size;
	59	}
	60
98873f53 RB	61	int pci_mmap_page_range(struct pci_dev dev, struct vm_area_struct vma,
	62	enum pci_mmap_state mmap_state, int write_combine)
	63	{
	64	unsigned long prot;
	65
	66	/*
	67	* I/O space can be accessed via normal processor loads and stores on
	68	* this platform but for now we elect not to do this and portable
	69	* drivers should not do this anyway.
	70	*/
	71	if (mmap_state == pci_mmap_io)
	72	return -EINVAL;
	73
	74	/*
	75	* Ignore write-combine; for now only return uncached mappings.
	76	*/
	77	prot = pgprot_val(vma->vm_page_prot);
	78	prot = (prot & ~_CACHE_MASK) \| _CACHE_UNCACHED;
	79	vma->vm_page_prot = __pgprot(prot);
	80
	81	return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
	82	vma->vm_end - vma->vm_start, vma->vm_page_prot);
	83	}