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04dc82e1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
2572f00d JH |
2 | /* |
3 | * Joshua Henderson <joshua.henderson@microchip.com> | |
4 | * Copyright (C) 2015 Microchip Technology Inc. All rights reserved. | |
2572f00d | 5 | */ |
2572f00d JH |
6 | #include <linux/clk-provider.h> |
7 | #include <linux/clocksource.h> | |
8 | #include <linux/init.h> | |
6e4ad1b4 | 9 | #include <linux/irqdomain.h> |
2572f00d JH |
10 | #include <linux/of.h> |
11 | #include <linux/of_irq.h> | |
2572f00d JH |
12 | |
13 | #include <asm/time.h> | |
14 | ||
15 | #include "pic32mzda.h" | |
16 | ||
17 | static const struct of_device_id pic32_infra_match[] = { | |
18 | { .compatible = "microchip,pic32mzda-infra", }, | |
19 | { }, | |
20 | }; | |
21 | ||
22 | #define DEFAULT_CORE_TIMER_INTERRUPT 0 | |
23 | ||
24 | static unsigned int pic32_xlate_core_timer_irq(void) | |
25 | { | |
26 | static struct device_node *node; | |
27 | unsigned int irq; | |
28 | ||
29 | node = of_find_matching_node(NULL, pic32_infra_match); | |
30 | ||
31 | if (WARN_ON(!node)) | |
32 | goto default_map; | |
33 | ||
34 | irq = irq_of_parse_and_map(node, 0); | |
35 | if (!irq) | |
36 | goto default_map; | |
37 | ||
38 | return irq; | |
39 | ||
40 | default_map: | |
41 | ||
42 | return irq_create_mapping(NULL, DEFAULT_CORE_TIMER_INTERRUPT); | |
43 | } | |
44 | ||
45 | unsigned int get_c0_compare_int(void) | |
46 | { | |
47 | return pic32_xlate_core_timer_irq(); | |
48 | } | |
49 | ||
50 | void __init plat_time_init(void) | |
51 | { | |
6e4ad1b4 | 52 | unsigned long rate = pic32_get_pbclk(7); |
2572f00d JH |
53 | |
54 | of_clk_init(NULL); | |
2572f00d | 55 | |
6e4ad1b4 PCM |
56 | pr_info("CPU Clock: %ldMHz\n", rate / 1000000); |
57 | mips_hpt_frequency = rate / 2; | |
2572f00d | 58 | |
ba5d08c0 | 59 | timer_probe(); |
2572f00d | 60 | } |