]>
Commit | Line | Data |
---|---|---|
3f0a06b0 JC |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify it | |
3 | * under the terms of the GNU General Public License version 2 as published | |
4 | * by the Free Software Foundation. | |
5 | * | |
6 | * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> | |
97b92108 | 7 | * Copyright (C) 2013 John Crispin <john@phrozen.org> |
3f0a06b0 JC |
8 | */ |
9 | ||
10 | #include <linux/kernel.h> | |
26dd3e4f PG |
11 | #include <linux/init.h> |
12 | #include <linux/export.h> | |
3f0a06b0 JC |
13 | #include <linux/clkdev.h> |
14 | #include <linux/clk.h> | |
15 | ||
16 | #include <asm/time.h> | |
17 | ||
18 | #include "common.h" | |
19 | ||
20 | struct clk { | |
21 | struct clk_lookup cl; | |
22 | unsigned long rate; | |
23 | }; | |
24 | ||
25 | void ralink_clk_add(const char *dev, unsigned long rate) | |
26 | { | |
27 | struct clk *clk = kzalloc(sizeof(struct clk), GFP_KERNEL); | |
28 | ||
29 | if (!clk) | |
f7777dcc | 30 | panic("failed to add clock"); |
3f0a06b0 JC |
31 | |
32 | clk->cl.dev_id = dev; | |
33 | clk->cl.clk = clk; | |
34 | ||
35 | clk->rate = rate; | |
36 | ||
37 | clkdev_add(&clk->cl); | |
38 | } | |
39 | ||
40 | /* | |
41 | * Linux clock API | |
42 | */ | |
43 | int clk_enable(struct clk *clk) | |
44 | { | |
45 | return 0; | |
46 | } | |
47 | EXPORT_SYMBOL_GPL(clk_enable); | |
48 | ||
49 | void clk_disable(struct clk *clk) | |
50 | { | |
51 | } | |
52 | EXPORT_SYMBOL_GPL(clk_disable); | |
53 | ||
54 | unsigned long clk_get_rate(struct clk *clk) | |
55 | { | |
a18097b7 JG |
56 | if (!clk) |
57 | return 0; | |
58 | ||
3f0a06b0 JC |
59 | return clk->rate; |
60 | } | |
61 | EXPORT_SYMBOL_GPL(clk_get_rate); | |
62 | ||
a8b62047 JC |
63 | int clk_set_rate(struct clk *clk, unsigned long rate) |
64 | { | |
65 | return -1; | |
66 | } | |
67 | EXPORT_SYMBOL_GPL(clk_set_rate); | |
68 | ||
80e6321a JC |
69 | long clk_round_rate(struct clk *clk, unsigned long rate) |
70 | { | |
71 | return -1; | |
72 | } | |
73 | EXPORT_SYMBOL_GPL(clk_round_rate); | |
74 | ||
3f0a06b0 JC |
75 | void __init plat_time_init(void) |
76 | { | |
77 | struct clk *clk; | |
78 | ||
79 | ralink_of_remap(); | |
80 | ||
81 | ralink_clk_init(); | |
82 | clk = clk_get_sys("cpu", NULL); | |
83 | if (IS_ERR(clk)) | |
84 | panic("unable to get CPU clock, err=%ld", PTR_ERR(clk)); | |
85 | pr_info("CPU Clock: %ldMHz\n", clk_get_rate(clk) / 1000000); | |
86 | mips_hpt_frequency = clk_get_rate(clk) / 2; | |
87 | clk_put(clk); | |
ba5d08c0 | 88 | timer_probe(); |
3f0a06b0 | 89 | } |