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3a5bfe7b JC |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify it | |
3 | * under the terms of the GNU General Public License version 2 as published | |
4 | * by the Free Software Foundation. | |
5 | * | |
6 | * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> | |
7 | * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> | |
97b92108 | 8 | * Copyright (C) 2013 John Crispin <john@phrozen.org> |
3a5bfe7b JC |
9 | */ |
10 | ||
11 | #include <linux/io.h> | |
12 | #include <linux/clk.h> | |
13 | #include <linux/init.h> | |
dd63b008 | 14 | #include <linux/sizes.h> |
3a5bfe7b JC |
15 | #include <linux/of_fdt.h> |
16 | #include <linux/kernel.h> | |
17 | #include <linux/bootmem.h> | |
18 | #include <linux/of_platform.h> | |
19 | #include <linux/of_address.h> | |
20 | ||
21 | #include <asm/reboot.h> | |
22 | #include <asm/bootinfo.h> | |
23 | #include <asm/addrspace.h> | |
089a49b6 | 24 | #include <asm/prom.h> |
3a5bfe7b JC |
25 | |
26 | #include "common.h" | |
27 | ||
28 | __iomem void *rt_sysc_membase; | |
29 | __iomem void *rt_memc_membase; | |
30 | ||
3a5bfe7b JC |
31 | __iomem void *plat_of_remap_node(const char *node) |
32 | { | |
33 | struct resource res; | |
34 | struct device_node *np; | |
35 | ||
36 | np = of_find_compatible_node(NULL, NULL, node); | |
37 | if (!np) | |
38 | panic("Failed to find %s node", node); | |
39 | ||
40 | if (of_address_to_resource(np, 0, &res)) | |
41 | panic("Failed to get resource for %s", node); | |
42 | ||
43 | if ((request_mem_region(res.start, | |
44 | resource_size(&res), | |
45 | res.name) < 0)) | |
46 | panic("Failed to request resources for %s", node); | |
47 | ||
48 | return ioremap_nocache(res.start, resource_size(&res)); | |
49 | } | |
50 | ||
51 | void __init device_tree_init(void) | |
52 | { | |
afb46f79 | 53 | unflatten_and_copy_device_tree(); |
3a5bfe7b JC |
54 | } |
55 | ||
15d11120 JC |
56 | static int memory_dtb; |
57 | ||
58 | static int __init early_init_dt_find_memory(unsigned long node, | |
59 | const char *uname, int depth, void *data) | |
60 | { | |
61 | if (depth == 1 && !strcmp(uname, "memory@0")) | |
62 | memory_dtb = 1; | |
63 | ||
64 | return 0; | |
65 | } | |
66 | ||
3a5bfe7b JC |
67 | void __init plat_mem_setup(void) |
68 | { | |
69 | set_io_port_base(KSEG1); | |
70 | ||
71 | /* | |
72 | * Load the builtin devicetree. This causes the chosen node to be | |
73 | * parsed resulting in our memory appearing | |
74 | */ | |
0cdde839 | 75 | __dt_setup_arch(__dtb_start); |
dd63b008 | 76 | |
15d11120 JC |
77 | of_scan_flat_dt(early_init_dt_find_memory, NULL); |
78 | if (memory_dtb) | |
79 | of_scan_flat_dt(early_init_dt_scan_memory, NULL); | |
80 | else if (soc_info.mem_size) | |
cdfce539 | 81 | add_memory_region(soc_info.mem_base, soc_info.mem_size * SZ_1M, |
dd63b008 JC |
82 | BOOT_MEM_RAM); |
83 | else | |
84 | detect_memory_region(soc_info.mem_base, | |
85 | soc_info.mem_size_min * SZ_1M, | |
86 | soc_info.mem_size_max * SZ_1M); | |
3a5bfe7b JC |
87 | } |
88 | ||
89 | static int __init plat_of_setup(void) | |
90 | { | |
84988c06 | 91 | __dt_register_buses(soc_info.compatible, "palmbus"); |
3a5bfe7b | 92 | |
84988c06 | 93 | /* make sure that the reset controller is setup early */ |
2a153f1c JC |
94 | ralink_rst_init(); |
95 | ||
3a5bfe7b JC |
96 | return 0; |
97 | } | |
98 | ||
99 | arch_initcall(plat_of_setup); |