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c06e836a JC |
1 | /* |
2 | * This program is free software; you can redistribute it and/or modify it | |
3 | * under the terms of the GNU General Public License version 2 as published | |
4 | * by the Free Software Foundation. | |
5 | * | |
6 | * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> | |
7 | * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> | |
8 | * Copyright (C) 2013 John Crispin <blogic@openwrt.org> | |
9 | */ | |
10 | ||
11 | #include <linux/pm.h> | |
12 | #include <linux/io.h> | |
2a153f1c JC |
13 | #include <linux/of.h> |
14 | #include <linux/reset-controller.h> | |
c06e836a JC |
15 | |
16 | #include <asm/reboot.h> | |
17 | ||
18 | #include <asm/mach-ralink/ralink_regs.h> | |
19 | ||
20 | /* Reset Control */ | |
21 | #define SYSC_REG_RESET_CTRL 0x034 | |
22 | #define RSTCTL_RESET_SYSTEM BIT(0) | |
23 | ||
2a153f1c JC |
24 | static int ralink_assert_device(struct reset_controller_dev *rcdev, |
25 | unsigned long id) | |
26 | { | |
27 | u32 val; | |
28 | ||
29 | if (id < 8) | |
30 | return -1; | |
31 | ||
32 | val = rt_sysc_r32(SYSC_REG_RESET_CTRL); | |
33 | val |= BIT(id); | |
34 | rt_sysc_w32(val, SYSC_REG_RESET_CTRL); | |
35 | ||
36 | return 0; | |
37 | } | |
38 | ||
39 | static int ralink_deassert_device(struct reset_controller_dev *rcdev, | |
40 | unsigned long id) | |
41 | { | |
42 | u32 val; | |
43 | ||
44 | if (id < 8) | |
45 | return -1; | |
46 | ||
47 | val = rt_sysc_r32(SYSC_REG_RESET_CTRL); | |
48 | val &= ~BIT(id); | |
49 | rt_sysc_w32(val, SYSC_REG_RESET_CTRL); | |
50 | ||
51 | return 0; | |
52 | } | |
53 | ||
54 | static int ralink_reset_device(struct reset_controller_dev *rcdev, | |
55 | unsigned long id) | |
56 | { | |
57 | ralink_assert_device(rcdev, id); | |
58 | return ralink_deassert_device(rcdev, id); | |
59 | } | |
60 | ||
61 | static struct reset_control_ops reset_ops = { | |
62 | .reset = ralink_reset_device, | |
63 | .assert = ralink_assert_device, | |
64 | .deassert = ralink_deassert_device, | |
65 | }; | |
66 | ||
67 | static struct reset_controller_dev reset_dev = { | |
68 | .ops = &reset_ops, | |
69 | .owner = THIS_MODULE, | |
70 | .nr_resets = 32, | |
71 | .of_reset_n_cells = 1, | |
72 | }; | |
73 | ||
74 | void ralink_rst_init(void) | |
75 | { | |
76 | reset_dev.of_node = of_find_compatible_node(NULL, NULL, | |
77 | "ralink,rt2880-reset"); | |
78 | if (!reset_dev.of_node) | |
79 | pr_err("Failed to find reset controller node"); | |
80 | else | |
81 | reset_controller_register(&reset_dev); | |
82 | } | |
83 | ||
c06e836a JC |
84 | static void ralink_restart(char *command) |
85 | { | |
86 | local_irq_disable(); | |
87 | rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL); | |
88 | unreachable(); | |
89 | } | |
90 | ||
91 | static void ralink_halt(void) | |
92 | { | |
93 | local_irq_disable(); | |
94 | unreachable(); | |
95 | } | |
96 | ||
97 | static int __init mips_reboot_setup(void) | |
98 | { | |
99 | _machine_restart = ralink_restart; | |
100 | _machine_halt = ralink_halt; | |
101 | pm_power_off = ralink_halt; | |
102 | ||
103 | return 0; | |
104 | } | |
105 | ||
106 | arch_initcall(mips_reboot_setup); |