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1da177e4 LT |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General | |
3 | * Public License. See the file "COPYING" in the main directory of this | |
4 | * archive for more details. | |
5 | * | |
6 | * Copyright (C) 2000 - 2001 by Kanoj Sarcar (kanoj@sgi.com) | |
7 | * Copyright (C) 2000 - 2001 by Silicon Graphics, Inc. | |
8 | */ | |
1da177e4 LT |
9 | #include <linux/kernel.h> |
10 | #include <linux/init.h> | |
11 | #include <linux/sched.h> | |
12 | #include <linux/mm.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/cpumask.h> | |
15 | #include <asm/cpu.h> | |
16 | #include <asm/io.h> | |
17 | #include <asm/pgtable.h> | |
18 | #include <asm/time.h> | |
19 | #include <asm/sn/types.h> | |
20 | #include <asm/sn/sn0/addrs.h> | |
21 | #include <asm/sn/sn0/hubni.h> | |
22 | #include <asm/sn/sn0/hubio.h> | |
23 | #include <asm/sn/klconfig.h> | |
24 | #include <asm/sn/ioc3.h> | |
25 | #include <asm/mipsregs.h> | |
26 | #include <asm/sn/gda.h> | |
27 | #include <asm/sn/hub.h> | |
28 | #include <asm/sn/intr.h> | |
29 | #include <asm/current.h> | |
1da177e4 LT |
30 | #include <asm/processor.h> |
31 | #include <asm/mmu_context.h> | |
32 | #include <asm/thread_info.h> | |
33 | #include <asm/sn/launch.h> | |
34 | #include <asm/sn/sn_private.h> | |
35 | #include <asm/sn/sn0/ip27.h> | |
36 | #include <asm/sn/mapped_kernel.h> | |
37 | ||
38 | #define CPU_NONE (cpuid_t)-1 | |
39 | ||
40 | static DECLARE_BITMAP(hub_init_mask, MAX_COMPACT_NODES); | |
41 | nasid_t master_nasid = INVALID_NASID; | |
42 | ||
43 | cnodeid_t nasid_to_compact_node[MAX_NASIDS]; | |
44 | nasid_t compact_to_nasid_node[MAX_COMPACT_NODES]; | |
45 | cnodeid_t cpuid_to_compact_node[MAXCPUS]; | |
46 | ||
47 | EXPORT_SYMBOL(nasid_to_compact_node); | |
48 | ||
cc6e8e08 RB |
49 | struct cpuinfo_ip27 sn_cpu_info[NR_CPUS]; |
50 | EXPORT_SYMBOL_GPL(sn_cpu_info); | |
51 | ||
1da177e4 LT |
52 | extern void pcibr_setup(cnodeid_t); |
53 | ||
54 | extern void xtalk_probe_node(cnodeid_t nid); | |
55 | ||
234fcd14 | 56 | static void __cpuinit per_hub_init(cnodeid_t cnode) |
1da177e4 LT |
57 | { |
58 | struct hub_data *hub = hub_data(cnode); | |
59 | nasid_t nasid = COMPACT_TO_NASID_NODEID(cnode); | |
4f12bfe5 | 60 | int i; |
1da177e4 LT |
61 | |
62 | cpu_set(smp_processor_id(), hub->h_cpus); | |
63 | ||
64 | if (test_and_set_bit(cnode, hub_init_mask)) | |
65 | return; | |
1da177e4 LT |
66 | /* |
67 | * Set CRB timeout at 5ms, (< PI timeout of 10ms) | |
68 | */ | |
69 | REMOTE_HUB_S(nasid, IIO_ICTP, 0x800); | |
70 | REMOTE_HUB_S(nasid, IIO_ICTO, 0xff); | |
71 | ||
72 | hub_rtc_init(cnode); | |
73 | xtalk_probe_node(cnode); | |
74 | ||
75 | #ifdef CONFIG_REPLICATE_EXHANDLERS | |
76 | /* | |
77 | * If this is not a headless node initialization, | |
78 | * copy over the caliased exception handlers. | |
79 | */ | |
80 | if (get_compact_nodeid() == cnode) { | |
81 | extern char except_vec2_generic, except_vec3_generic; | |
82 | extern void build_tlb_refill_handler(void); | |
83 | ||
84 | memcpy((void *)(CKSEG0 + 0x100), &except_vec2_generic, 0x80); | |
85 | memcpy((void *)(CKSEG0 + 0x180), &except_vec3_generic, 0x80); | |
86 | build_tlb_refill_handler(); | |
87 | memcpy((void *)(CKSEG0 + 0x100), (void *) CKSEG0, 0x80); | |
88 | memcpy((void *)(CKSEG0 + 0x180), &except_vec3_generic, 0x100); | |
89 | __flush_cache_all(); | |
90 | } | |
91 | #endif | |
4f12bfe5 RB |
92 | |
93 | /* | |
94 | * Some interrupts are reserved by hardware or by software convention. | |
95 | * Mark these as reserved right away so they won't be used accidently | |
96 | * later. | |
97 | */ | |
98 | for (i = 0; i <= BASE_PCI_IRQ; i++) { | |
99 | __set_bit(i, hub->irq_alloc_mask); | |
100 | LOCAL_HUB_CLR_INTR(INT_PEND0_BASELVL + i); | |
101 | } | |
102 | ||
103 | __set_bit(IP_PEND0_6_63, hub->irq_alloc_mask); | |
104 | LOCAL_HUB_S(PI_INT_PEND_MOD, IP_PEND0_6_63); | |
105 | ||
106 | for (i = NI_BRDCAST_ERR_A; i <= MSC_PANIC_INTR; i++) { | |
107 | __set_bit(i, hub->irq_alloc_mask); | |
108 | LOCAL_HUB_CLR_INTR(INT_PEND1_BASELVL + i); | |
109 | } | |
1da177e4 LT |
110 | } |
111 | ||
06d428d7 | 112 | void __cpuinit per_cpu_init(void) |
1da177e4 LT |
113 | { |
114 | int cpu = smp_processor_id(); | |
115 | int slice = LOCAL_HUB_L(PI_CPU_NUM); | |
116 | cnodeid_t cnode = get_compact_nodeid(); | |
117 | struct hub_data *hub = hub_data(cnode); | |
118 | struct slice_data *si = hub->slice + slice; | |
119 | int i; | |
120 | ||
121 | if (test_and_set_bit(slice, &hub->slice_map)) | |
122 | return; | |
123 | ||
124 | clear_c0_status(ST0_IM); | |
125 | ||
4f12bfe5 RB |
126 | per_hub_init(cnode); |
127 | ||
1da177e4 LT |
128 | for (i = 0; i < LEVELS_PER_SLICE; i++) |
129 | si->level_to_irq[i] = -1; | |
130 | ||
1da177e4 LT |
131 | /* |
132 | * We use this so we can find the local hub's data as fast as only | |
133 | * possible. | |
134 | */ | |
135 | cpu_data[cpu].data = si; | |
136 | ||
137 | cpu_time_init(); | |
138 | install_ipi(); | |
139 | ||
140 | /* Install our NMI handler if symmon hasn't installed one. */ | |
141 | install_cpu_nmi_handler(cputoslice(cpu)); | |
142 | ||
143 | set_c0_status(SRB_DEV0 | SRB_DEV1); | |
1da177e4 LT |
144 | } |
145 | ||
146 | /* | |
147 | * get_nasid() returns the physical node id number of the caller. | |
148 | */ | |
149 | nasid_t | |
150 | get_nasid(void) | |
151 | { | |
152 | return (nasid_t)((LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_NODEID_MASK) | |
153 | >> NSRI_NODEID_SHFT); | |
154 | } | |
155 | ||
156 | /* | |
157 | * Map the physical node id to a virtual node id (virtual node ids are contiguous). | |
158 | */ | |
159 | cnodeid_t get_compact_nodeid(void) | |
160 | { | |
161 | return NASID_TO_COMPACT_NODEID(get_nasid()); | |
162 | } | |
163 | ||
164 | /* Extracted from the IOC3 meta driver. FIXME. */ | |
165 | static inline void ioc3_sio_init(void) | |
166 | { | |
167 | struct ioc3 *ioc3; | |
168 | nasid_t nid; | |
169 | long loops; | |
170 | ||
171 | nid = get_nasid(); | |
172 | ioc3 = (struct ioc3 *) KL_CONFIG_CH_CONS_INFO(nid)->memory_base; | |
173 | ||
174 | ioc3->sscr_a = 0; /* PIO mode for uarta. */ | |
175 | ioc3->sscr_b = 0; /* PIO mode for uartb. */ | |
176 | ioc3->sio_iec = ~0; | |
177 | ioc3->sio_ies = (SIO_IR_SA_INT | SIO_IR_SB_INT); | |
178 | ||
179 | loops=1000000; while(loops--); | |
180 | ioc3->sregs.uarta.iu_fcr = 0; | |
181 | ioc3->sregs.uartb.iu_fcr = 0; | |
182 | loops=1000000; while(loops--); | |
183 | } | |
184 | ||
185 | static inline void ioc3_eth_init(void) | |
186 | { | |
187 | struct ioc3 *ioc3; | |
188 | nasid_t nid; | |
189 | ||
190 | nid = get_nasid(); | |
191 | ioc3 = (struct ioc3 *) KL_CONFIG_CH_CONS_INFO(nid)->memory_base; | |
192 | ||
193 | ioc3->eier = 0; | |
194 | } | |
195 | ||
1da177e4 LT |
196 | extern void ip27_reboot_setup(void); |
197 | ||
2925aba4 | 198 | void __init plat_mem_setup(void) |
1da177e4 LT |
199 | { |
200 | hubreg_t p, e, n_mode; | |
201 | nasid_t nid; | |
202 | ||
1da177e4 LT |
203 | ip27_reboot_setup(); |
204 | ||
205 | /* | |
206 | * hub_rtc init and cpu clock intr enabled for later calibrate_delay. | |
207 | */ | |
208 | nid = get_nasid(); | |
209 | printk("IP27: Running on node %d.\n", nid); | |
210 | ||
211 | p = LOCAL_HUB_L(PI_CPU_PRESENT_A) & 1; | |
212 | e = LOCAL_HUB_L(PI_CPU_ENABLE_A) & 1; | |
213 | printk("Node %d has %s primary CPU%s.\n", nid, | |
214 | p ? "a" : "no", | |
215 | e ? ", CPU is running" : ""); | |
216 | ||
217 | p = LOCAL_HUB_L(PI_CPU_PRESENT_B) & 1; | |
218 | e = LOCAL_HUB_L(PI_CPU_ENABLE_B) & 1; | |
219 | printk("Node %d has %s secondary CPU%s.\n", nid, | |
220 | p ? "a" : "no", | |
221 | e ? ", CPU is running" : ""); | |
222 | ||
223 | /* | |
224 | * Try to catch kernel missconfigurations and give user an | |
225 | * indication what option to select. | |
226 | */ | |
227 | n_mode = LOCAL_HUB_L(NI_STATUS_REV_ID) & NSRI_MORENODES_MASK; | |
228 | printk("Machine is in %c mode.\n", n_mode ? 'N' : 'M'); | |
aa9772e3 | 229 | #ifdef CONFIG_SGI_SN_N_MODE |
1da177e4 LT |
230 | if (!n_mode) |
231 | panic("Kernel compiled for M mode."); | |
232 | #else | |
233 | if (n_mode) | |
234 | panic("Kernel compiled for N mode."); | |
235 | #endif | |
236 | ||
237 | ioc3_sio_init(); | |
238 | ioc3_eth_init(); | |
239 | per_cpu_init(); | |
240 | ||
241 | set_io_port_base(IO_BASE); | |
1da177e4 | 242 | } |