[mirror_ubuntu-artful-kernel.git] / arch / mips / sibyte / sb1250 / setup.c

/*
 * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 */
#include <linux/export.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/reboot.h>
#include <linux/string.h>

#include <asm/bootinfo.h>
#include <asm/cpu.h>
#include <asm/mipsregs.h>
#include <asm/io.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_scd.h>

unsigned int sb1_pass;
unsigned int soc_pass;
unsigned int soc_type;
EXPORT_SYMBOL(soc_type);
unsigned int periph_rev;
unsigned int zbbus_mhz;
EXPORT_SYMBOL(zbbus_mhz);

static char *soc_str;
static char *pass_str;
static unsigned int war_pass;	/* XXXKW don't overload PASS defines? */

static int __init setup_bcm1250(void)
{
	int ret = 0;

	switch (soc_pass) {
	case K_SYS_REVISION_BCM1250_PASS1:
		periph_rev = 1;
		pass_str = "Pass 1";
		break;
	case K_SYS_REVISION_BCM1250_A10:
		periph_rev = 2;
		pass_str = "A8/A10";
		/* XXXKW different war_pass? */
		war_pass = K_SYS_REVISION_BCM1250_PASS2;
		break;
	case K_SYS_REVISION_BCM1250_PASS2_2:
		periph_rev = 2;
		pass_str = "B1";
		break;
	case K_SYS_REVISION_BCM1250_B2:
		periph_rev = 2;
		pass_str = "B2";
		war_pass = K_SYS_REVISION_BCM1250_PASS2_2;
		break;
	case K_SYS_REVISION_BCM1250_PASS3:
		periph_rev = 3;
		pass_str = "C0";
		break;
	case K_SYS_REVISION_BCM1250_C1:
		periph_rev = 3;
		pass_str = "C1";
		break;
	default:
		if (soc_pass < K_SYS_REVISION_BCM1250_PASS2_2) {
			periph_rev = 2;
			pass_str = "A0-A6";
			war_pass = K_SYS_REVISION_BCM1250_PASS2;
		} else {
			printk("Unknown BCM1250 rev %x\n", soc_pass);
			ret = 1;
		}
		break;
	}

	return ret;
}

int sb1250_m3_workaround_needed(void)
{
	switch (soc_type) {
	case K_SYS_SOC_TYPE_BCM1250:
	case K_SYS_SOC_TYPE_BCM1250_ALT:
	case K_SYS_SOC_TYPE_BCM1250_ALT2:
	case K_SYS_SOC_TYPE_BCM1125:
	case K_SYS_SOC_TYPE_BCM1125H:
		return soc_pass < K_SYS_REVISION_BCM1250_C0;

	default:
		return 0;
	}
}

static int __init setup_bcm112x(void)
{
	int ret = 0;

	switch (soc_pass) {
	case 0:
		/* Early build didn't have revid set */
		periph_rev = 3;
		pass_str = "A1";
		war_pass = K_SYS_REVISION_BCM112x_A1;
		break;
	case K_SYS_REVISION_BCM112x_A1:
		periph_rev = 3;
		pass_str = "A1";
		break;
	case K_SYS_REVISION_BCM112x_A2:
		periph_rev = 3;
		pass_str = "A2";
		break;
	case K_SYS_REVISION_BCM112x_A3:
		periph_rev = 3;
		pass_str = "A3";
		break;
	case K_SYS_REVISION_BCM112x_A4:
		periph_rev = 3;
		pass_str = "A4";
		break;
	case K_SYS_REVISION_BCM112x_B0:
		periph_rev = 3;
		pass_str = "B0";
		break;
	default:
		printk("Unknown %s rev %x\n", soc_str, soc_pass);
		ret = 1;
	}

	return ret;
}

/* Setup code likely to be common to all SiByte platforms */

static int __init sys_rev_decode(void)
{
	int ret = 0;

	war_pass = soc_pass;
	switch (soc_type) {
	case K_SYS_SOC_TYPE_BCM1250:
	case K_SYS_SOC_TYPE_BCM1250_ALT:
	case K_SYS_SOC_TYPE_BCM1250_ALT2:
		soc_str = "BCM1250";
		ret = setup_bcm1250();
		break;
	case K_SYS_SOC_TYPE_BCM1120:
		soc_str = "BCM1120";
		ret = setup_bcm112x();
		break;
	case K_SYS_SOC_TYPE_BCM1125:
		soc_str = "BCM1125";
		ret = setup_bcm112x();
		break;
	case K_SYS_SOC_TYPE_BCM1125H:
		soc_str = "BCM1125H";
		ret = setup_bcm112x();
		break;
	default:
		printk("Unknown SOC type %x\n", soc_type);
		ret = 1;
		break;
	}

	return ret;
}

void __init sb1250_setup(void)
{
	uint64_t sys_rev;
	int plldiv;
	int bad_config = 0;

	sb1_pass = read_c0_prid() & PRID_REV_MASK;
	sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION));
	soc_type = SYS_SOC_TYPE(sys_rev);
	soc_pass = G_SYS_REVISION(sys_rev);

	if (sys_rev_decode()) {
		printk("Restart after failure to identify SiByte chip\n");
		machine_restart(NULL);
	}

	plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
	zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);

	printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
		    soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
	printk("Board type: %s\n", get_system_type());

	switch (war_pass) {
	case K_SYS_REVISION_BCM1250_PASS1:
		printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "
			    "and the kernel doesn't have the proper "
			    "workarounds compiled in. @@@@\n");
		bad_config = 1;
		break;
	case K_SYS_REVISION_BCM1250_PASS2:
		/* Pass 2 - easiest as default for now - so many numbers */
#if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \
    !defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS)
		printk("@@@@ This is a BCM1250 A3-A10 board, and the "
			    "kernel doesn't have the proper workarounds "
			    "compiled in. @@@@\n");
		bad_config = 1;
#endif
#ifdef CONFIG_CPU_HAS_PREFETCH
		printk("@@@@ Prefetches may be enabled in this kernel, "
			    "but are buggy on this board.  @@@@\n");
		bad_config = 1;
#endif
		break;
	case K_SYS_REVISION_BCM1250_PASS2_2:
#ifndef CONFIG_SB1_PASS_2_WORKAROUNDS
		printk("@@@@ This is a BCM1250 B1/B2. board, and the "
			    "kernel doesn't have the proper workarounds "
			    "compiled in. @@@@\n");
		bad_config = 1;
#endif
#if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \
    !defined(CONFIG_CPU_HAS_PREFETCH)
		printk("@@@@ This is a BCM1250 B1/B2, but the kernel is "
			    "conservatively configured for an 'A' stepping. "
			    "@@@@\n");
#endif
		break;
	default:
		break;
	}
	if (bad_config) {
		printk("Invalid configuration for this chip.\n");
		machine_restart(NULL);
	}
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License
	6	* as published by the Free Software Foundation; either version 2
	7	* of the License, or (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	17	*/
26dd3e4f	18	#include <linux/export.h>
5ac71fd1	19	#include <linux/init.h>
1da177e4 LT	20	#include <linux/kernel.h>
	21	#include <linux/reboot.h>
	22	#include <linux/string.h>
	23
	24	#include <asm/bootinfo.h>
8ff374b9	25	#include <asm/cpu.h>
1da177e4 LT	26	#include <asm/mipsregs.h>
	27	#include <asm/io.h>
	28	#include <asm/sibyte/sb1250.h>
	29	#include <asm/sibyte/sb1250_regs.h>
	30	#include <asm/sibyte/sb1250_scd.h>
	31
	32	unsigned int sb1_pass;
	33	unsigned int soc_pass;
	34	unsigned int soc_type;
b45d5279	35	EXPORT_SYMBOL(soc_type);
1da177e4 LT	36	unsigned int periph_rev;
1da177e4 LT	37	unsigned int zbbus_mhz;
bb9b813b	38	EXPORT_SYMBOL(zbbus_mhz);
1da177e4 LT	39
	40	static char *soc_str;
	41	static char *pass_str;
	42	static unsigned int war_pass; /* XXXKW don't overload PASS defines? */
	43
5ac71fd1	44	static int __init setup_bcm1250(void)
1da177e4 LT	45	{
	46	int ret = 0;
	47
	48	switch (soc_pass) {
	49	case K_SYS_REVISION_BCM1250_PASS1:
	50	periph_rev = 1;
	51	pass_str = "Pass 1";
	52	break;
	53	case K_SYS_REVISION_BCM1250_A10:
	54	periph_rev = 2;
	55	pass_str = "A8/A10";
	56	/* XXXKW different war_pass? */
	57	war_pass = K_SYS_REVISION_BCM1250_PASS2;
	58	break;
	59	case K_SYS_REVISION_BCM1250_PASS2_2:
	60	periph_rev = 2;
	61	pass_str = "B1";
	62	break;
	63	case K_SYS_REVISION_BCM1250_B2:
	64	periph_rev = 2;
	65	pass_str = "B2";
	66	war_pass = K_SYS_REVISION_BCM1250_PASS2_2;
	67	break;
	68	case K_SYS_REVISION_BCM1250_PASS3:
	69	periph_rev = 3;
	70	pass_str = "C0";
	71	break;
	72	case K_SYS_REVISION_BCM1250_C1:
	73	periph_rev = 3;
	74	pass_str = "C1";
	75	break;
	76	default:
	77	if (soc_pass < K_SYS_REVISION_BCM1250_PASS2_2) {
	78	periph_rev = 2;
	79	pass_str = "A0-A6";
	80	war_pass = K_SYS_REVISION_BCM1250_PASS2;
	81	} else {
36a88530	82	printk("Unknown BCM1250 rev %x\n", soc_pass);
1da177e4 LT	83	ret = 1;
	84	}
	85	break;
	86	}
7c4b4773	87
1da177e4 LT	88	return ret;
	89	}
	90
8d9df29d RB	91	int sb1250_m3_workaround_needed(void)
	92	{
	93	switch (soc_type) {
	94	case K_SYS_SOC_TYPE_BCM1250:
	95	case K_SYS_SOC_TYPE_BCM1250_ALT:
	96	case K_SYS_SOC_TYPE_BCM1250_ALT2:
	97	case K_SYS_SOC_TYPE_BCM1125:
	98	case K_SYS_SOC_TYPE_BCM1125H:
	99	return soc_pass < K_SYS_REVISION_BCM1250_C0;
	100
	101	default:
	102	return 0;
	103	}
	104	}
	105
5ac71fd1	106	static int __init setup_bcm112x(void)
1da177e4 LT	107	{
	108	int ret = 0;
	109
	110	switch (soc_pass) {
	111	case 0:
	112	/* Early build didn't have revid set */
	113	periph_rev = 3;
	114	pass_str = "A1";
	115	war_pass = K_SYS_REVISION_BCM112x_A1;
	116	break;
	117	case K_SYS_REVISION_BCM112x_A1:
	118	periph_rev = 3;
	119	pass_str = "A1";
	120	break;
	121	case K_SYS_REVISION_BCM112x_A2:
	122	periph_rev = 3;
	123	pass_str = "A2";
	124	break;
9a994357 MM	125	case K_SYS_REVISION_BCM112x_A3:
	126	periph_rev = 3;
	127	pass_str = "A3";
	128	break;
	129	case K_SYS_REVISION_BCM112x_A4:
	130	periph_rev = 3;
	131	pass_str = "A4";
	132	break;
	133	case K_SYS_REVISION_BCM112x_B0:
	134	periph_rev = 3;
	135	pass_str = "B0";
	136	break;
1da177e4	137	default:
36a88530	138	printk("Unknown %s rev %x\n", soc_str, soc_pass);
1da177e4 LT	139	ret = 1;
1da177e4 LT	140	}
7c4b4773 RB	141
	142	return ret;
	143	}
	144
	145	/* Setup code likely to be common to all SiByte platforms */
	146
	147	static int __init sys_rev_decode(void)
	148	{
	149	int ret = 0;
	150
	151	war_pass = soc_pass;
	152	switch (soc_type) {
	153	case K_SYS_SOC_TYPE_BCM1250:
	154	case K_SYS_SOC_TYPE_BCM1250_ALT:
	155	case K_SYS_SOC_TYPE_BCM1250_ALT2:
	156	soc_str = "BCM1250";
	157	ret = setup_bcm1250();
	158	break;
	159	case K_SYS_SOC_TYPE_BCM1120:
	160	soc_str = "BCM1120";
	161	ret = setup_bcm112x();
	162	break;
	163	case K_SYS_SOC_TYPE_BCM1125:
	164	soc_str = "BCM1125";
	165	ret = setup_bcm112x();
	166	break;
	167	case K_SYS_SOC_TYPE_BCM1125H:
	168	soc_str = "BCM1125H";
	169	ret = setup_bcm112x();
	170	break;
	171	default:
	172	printk("Unknown SOC type %x\n", soc_type);
	173	ret = 1;
	174	break;
	175	}
	176
1da177e4 LT	177	return ret;
	178	}
	179
5ac71fd1	180	void __init sb1250_setup(void)
1da177e4 LT	181	{
	182	uint64_t sys_rev;
	183	int plldiv;
	184	int bad_config = 0;
	185
8ff374b9	186	sb1_pass = read_c0_prid() & PRID_REV_MASK;
65bda1a9	187	sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION));
1da177e4 LT	188	soc_type = SYS_SOC_TYPE(sys_rev);
	189	soc_pass = G_SYS_REVISION(sys_rev);
	190
	191	if (sys_rev_decode()) {
36a88530	192	printk("Restart after failure to identify SiByte chip\n");
1da177e4 LT	193	machine_restart(NULL);
	194	}
	195
65bda1a9	196	plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
1da177e4 LT	197	zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
1da177e4 LT	198
36a88530	199	printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
1da177e4	200	soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
36a88530	201	printk("Board type: %s\n", get_system_type());
1da177e4	202
b6f7880b	203	switch (war_pass) {
1da177e4	204	case K_SYS_REVISION_BCM1250_PASS1:
36a88530	205	printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "
70342287 RB	206	"and the kernel doesn't have the proper "
70342287 RB	207	"workarounds compiled in. @@@@\n");
1da177e4	208	bad_config = 1;
1da177e4 LT	209	break;
	210	case K_SYS_REVISION_BCM1250_PASS2:
	211	/* Pass 2 - easiest as default for now - so many numbers */
b6f7880b RB	212	#if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) \|\| \
b6f7880b RB	213	!defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS)
36a88530	214	printk("@@@@ This is a BCM1250 A3-A10 board, and the "
70342287 RB	215	"kernel doesn't have the proper workarounds "
70342287 RB	216	"compiled in. @@@@\n");
1da177e4 LT	217	bad_config = 1;
	218	#endif
	219	#ifdef CONFIG_CPU_HAS_PREFETCH
36a88530	220	printk("@@@@ Prefetches may be enabled in this kernel, "
70342287	221	"but are buggy on this board. @@@@\n");
1da177e4 LT	222	bad_config = 1;
	223	#endif
	224	break;
	225	case K_SYS_REVISION_BCM1250_PASS2_2:
	226	#ifndef CONFIG_SB1_PASS_2_WORKAROUNDS
36a88530	227	printk("@@@@ This is a BCM1250 B1/B2. board, and the "
70342287 RB	228	"kernel doesn't have the proper workarounds "
70342287 RB	229	"compiled in. @@@@\n");
1da177e4 LT	230	bad_config = 1;
1da177e4 LT	231	#endif
b6f7880b RB	232	#if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) \|\| \
b6f7880b RB	233	!defined(CONFIG_CPU_HAS_PREFETCH)
36a88530	234	printk("@@@@ This is a BCM1250 B1/B2, but the kernel is "
70342287 RB	235	"conservatively configured for an 'A' stepping. "
70342287 RB	236	"@@@@\n");
1da177e4 LT	237	#endif
	238	break;
	239	default:
	240	break;
	241	}
	242	if (bad_config) {
36a88530	243	printk("Invalid configuration for this chip.\n");
1da177e4 LT	244	machine_restart(NULL);
	245	}
	246	}