[mirror_ubuntu-artful-kernel.git] / arch / mips / sibyte / sb1250 / setup.c

/*
 * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 */
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/reboot.h>
#include <linux/string.h>

#include <asm/bootinfo.h>
#include <asm/mipsregs.h>
#include <asm/io.h>
#include <asm/sibyte/sb1250.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_scd.h>

unsigned int sb1_pass;
unsigned int soc_pass;
unsigned int soc_type;
unsigned int periph_rev;
unsigned int zbbus_mhz;
EXPORT_SYMBOL(zbbus_mhz);

static char *soc_str;
static char *pass_str;
static unsigned int war_pass;	/* XXXKW don't overload PASS defines? */

static inline int setup_bcm1250(void);
static inline int setup_bcm112x(void);

/* Setup code likely to be common to all SiByte platforms */

static int __init sys_rev_decode(void)
{
	int ret = 0;

	war_pass = soc_pass;
	switch (soc_type) {
	case K_SYS_SOC_TYPE_BCM1250:
	case K_SYS_SOC_TYPE_BCM1250_ALT:
	case K_SYS_SOC_TYPE_BCM1250_ALT2:
		soc_str = "BCM1250";
		ret = setup_bcm1250();
		break;
	case K_SYS_SOC_TYPE_BCM1120:
		soc_str = "BCM1120";
		ret = setup_bcm112x();
		break;
	case K_SYS_SOC_TYPE_BCM1125:
		soc_str = "BCM1125";
		ret = setup_bcm112x();
		break;
	case K_SYS_SOC_TYPE_BCM1125H:
		soc_str = "BCM1125H";
		ret = setup_bcm112x();
		break;
	default:
		printk("Unknown SOC type %x\n", soc_type);
		ret = 1;
		break;
	}
	return ret;
}

static int __init setup_bcm1250(void)
{
	int ret = 0;

	switch (soc_pass) {
	case K_SYS_REVISION_BCM1250_PASS1:
		periph_rev = 1;
		pass_str = "Pass 1";
		break;
	case K_SYS_REVISION_BCM1250_A10:
		periph_rev = 2;
		pass_str = "A8/A10";
		/* XXXKW different war_pass? */
		war_pass = K_SYS_REVISION_BCM1250_PASS2;
		break;
	case K_SYS_REVISION_BCM1250_PASS2_2:
		periph_rev = 2;
		pass_str = "B1";
		break;
	case K_SYS_REVISION_BCM1250_B2:
		periph_rev = 2;
		pass_str = "B2";
		war_pass = K_SYS_REVISION_BCM1250_PASS2_2;
		break;
	case K_SYS_REVISION_BCM1250_PASS3:
		periph_rev = 3;
		pass_str = "C0";
		break;
	case K_SYS_REVISION_BCM1250_C1:
		periph_rev = 3;
		pass_str = "C1";
		break;
	default:
		if (soc_pass < K_SYS_REVISION_BCM1250_PASS2_2) {
			periph_rev = 2;
			pass_str = "A0-A6";
			war_pass = K_SYS_REVISION_BCM1250_PASS2;
		} else {
			printk("Unknown BCM1250 rev %x\n", soc_pass);
			ret = 1;
		}
		break;
	}
	return ret;
}

static int __init setup_bcm112x(void)
{
	int ret = 0;

	switch (soc_pass) {
	case 0:
		/* Early build didn't have revid set */
		periph_rev = 3;
		pass_str = "A1";
		war_pass = K_SYS_REVISION_BCM112x_A1;
		break;
	case K_SYS_REVISION_BCM112x_A1:
		periph_rev = 3;
		pass_str = "A1";
		break;
	case K_SYS_REVISION_BCM112x_A2:
		periph_rev = 3;
		pass_str = "A2";
		break;
	default:
		printk("Unknown %s rev %x\n", soc_str, soc_pass);
		ret = 1;
	}
	return ret;
}

void __init sb1250_setup(void)
{
	uint64_t sys_rev;
	int plldiv;
	int bad_config = 0;

	sb1_pass = read_c0_prid() & 0xff;
	sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION));
	soc_type = SYS_SOC_TYPE(sys_rev);
	soc_pass = G_SYS_REVISION(sys_rev);

	if (sys_rev_decode()) {
		printk("Restart after failure to identify SiByte chip\n");
		machine_restart(NULL);
	}

	plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
	zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);

	printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
		    soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
	printk("Board type: %s\n", get_system_type());

	switch (war_pass) {
	case K_SYS_REVISION_BCM1250_PASS1:
#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
		printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "
		            "and the kernel doesn't have the proper "
		            "workarounds compiled in. @@@@\n");
		bad_config = 1;
#endif
		break;
	case K_SYS_REVISION_BCM1250_PASS2:
		/* Pass 2 - easiest as default for now - so many numbers */
#if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \
    !defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS)
		printk("@@@@ This is a BCM1250 A3-A10 board, and the "
		            "kernel doesn't have the proper workarounds "
		            "compiled in. @@@@\n");
		bad_config = 1;
#endif
#ifdef CONFIG_CPU_HAS_PREFETCH
		printk("@@@@ Prefetches may be enabled in this kernel, "
		            "but are buggy on this board.  @@@@\n");
		bad_config = 1;
#endif
		break;
	case K_SYS_REVISION_BCM1250_PASS2_2:
#ifndef CONFIG_SB1_PASS_2_WORKAROUNDS
		printk("@@@@ This is a BCM1250 B1/B2. board, and the "
		            "kernel doesn't have the proper workarounds "
		            "compiled in. @@@@\n");
		bad_config = 1;
#endif
#if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \
    !defined(CONFIG_CPU_HAS_PREFETCH)
		printk("@@@@ This is a BCM1250 B1/B2, but the kernel is "
		            "conservatively configured for an 'A' stepping. "
		            "@@@@\n");
#endif
		break;
	default:
		break;
	}
	if (bad_config) {
		printk("Invalid configuration for this chip.\n");
		machine_restart(NULL);
	}
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License
	6	* as published by the Free Software Foundation; either version 2
	7	* of the License, or (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	17	*/
5ac71fd1	18	#include <linux/init.h>
bb9b813b	19	#include <linux/module.h>
1da177e4 LT	20	#include <linux/kernel.h>
	21	#include <linux/reboot.h>
	22	#include <linux/string.h>
	23
	24	#include <asm/bootinfo.h>
	25	#include <asm/mipsregs.h>
	26	#include <asm/io.h>
	27	#include <asm/sibyte/sb1250.h>
	28	#include <asm/sibyte/sb1250_regs.h>
	29	#include <asm/sibyte/sb1250_scd.h>
	30
	31	unsigned int sb1_pass;
	32	unsigned int soc_pass;
	33	unsigned int soc_type;
	34	unsigned int periph_rev;
	35	unsigned int zbbus_mhz;
bb9b813b	36	EXPORT_SYMBOL(zbbus_mhz);
1da177e4 LT	37
	38	static char *soc_str;
	39	static char *pass_str;
	40	static unsigned int war_pass; /* XXXKW don't overload PASS defines? */
	41
	42	static inline int setup_bcm1250(void);
	43	static inline int setup_bcm112x(void);
	44
	45	/* Setup code likely to be common to all SiByte platforms */
	46
5ac71fd1	47	static int __init sys_rev_decode(void)
1da177e4 LT	48	{
	49	int ret = 0;
	50
	51	war_pass = soc_pass;
	52	switch (soc_type) {
	53	case K_SYS_SOC_TYPE_BCM1250:
	54	case K_SYS_SOC_TYPE_BCM1250_ALT:
	55	case K_SYS_SOC_TYPE_BCM1250_ALT2:
	56	soc_str = "BCM1250";
	57	ret = setup_bcm1250();
	58	break;
	59	case K_SYS_SOC_TYPE_BCM1120:
	60	soc_str = "BCM1120";
	61	ret = setup_bcm112x();
	62	break;
	63	case K_SYS_SOC_TYPE_BCM1125:
	64	soc_str = "BCM1125";
	65	ret = setup_bcm112x();
	66	break;
	67	case K_SYS_SOC_TYPE_BCM1125H:
	68	soc_str = "BCM1125H";
	69	ret = setup_bcm112x();
	70	break;
	71	default:
36a88530	72	printk("Unknown SOC type %x\n", soc_type);
1da177e4 LT	73	ret = 1;
	74	break;
	75	}
	76	return ret;
	77	}
	78
5ac71fd1	79	static int __init setup_bcm1250(void)
1da177e4 LT	80	{
	81	int ret = 0;
	82
	83	switch (soc_pass) {
	84	case K_SYS_REVISION_BCM1250_PASS1:
	85	periph_rev = 1;
	86	pass_str = "Pass 1";
	87	break;
	88	case K_SYS_REVISION_BCM1250_A10:
	89	periph_rev = 2;
	90	pass_str = "A8/A10";
	91	/* XXXKW different war_pass? */
	92	war_pass = K_SYS_REVISION_BCM1250_PASS2;
	93	break;
	94	case K_SYS_REVISION_BCM1250_PASS2_2:
	95	periph_rev = 2;
	96	pass_str = "B1";
	97	break;
	98	case K_SYS_REVISION_BCM1250_B2:
	99	periph_rev = 2;
	100	pass_str = "B2";
	101	war_pass = K_SYS_REVISION_BCM1250_PASS2_2;
	102	break;
	103	case K_SYS_REVISION_BCM1250_PASS3:
	104	periph_rev = 3;
	105	pass_str = "C0";
	106	break;
	107	case K_SYS_REVISION_BCM1250_C1:
	108	periph_rev = 3;
	109	pass_str = "C1";
	110	break;
	111	default:
	112	if (soc_pass < K_SYS_REVISION_BCM1250_PASS2_2) {
	113	periph_rev = 2;
	114	pass_str = "A0-A6";
	115	war_pass = K_SYS_REVISION_BCM1250_PASS2;
	116	} else {
36a88530	117	printk("Unknown BCM1250 rev %x\n", soc_pass);
1da177e4 LT	118	ret = 1;
	119	}
	120	break;
	121	}
	122	return ret;
	123	}
	124
5ac71fd1	125	static int __init setup_bcm112x(void)
1da177e4 LT	126	{
	127	int ret = 0;
	128
	129	switch (soc_pass) {
	130	case 0:
	131	/* Early build didn't have revid set */
	132	periph_rev = 3;
	133	pass_str = "A1";
	134	war_pass = K_SYS_REVISION_BCM112x_A1;
	135	break;
	136	case K_SYS_REVISION_BCM112x_A1:
	137	periph_rev = 3;
	138	pass_str = "A1";
	139	break;
	140	case K_SYS_REVISION_BCM112x_A2:
	141	periph_rev = 3;
	142	pass_str = "A2";
	143	break;
	144	default:
36a88530	145	printk("Unknown %s rev %x\n", soc_str, soc_pass);
1da177e4 LT	146	ret = 1;
	147	}
	148	return ret;
	149	}
	150
5ac71fd1	151	void __init sb1250_setup(void)
1da177e4 LT	152	{
	153	uint64_t sys_rev;
	154	int plldiv;
	155	int bad_config = 0;
	156
	157	sb1_pass = read_c0_prid() & 0xff;
65bda1a9	158	sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION));
1da177e4 LT	159	soc_type = SYS_SOC_TYPE(sys_rev);
	160	soc_pass = G_SYS_REVISION(sys_rev);
	161
	162	if (sys_rev_decode()) {
36a88530	163	printk("Restart after failure to identify SiByte chip\n");
1da177e4 LT	164	machine_restart(NULL);
	165	}
	166
65bda1a9	167	plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
1da177e4 LT	168	zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
1da177e4 LT	169
36a88530	170	printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
1da177e4	171	soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
36a88530	172	printk("Board type: %s\n", get_system_type());
1da177e4	173
b6f7880b	174	switch (war_pass) {
1da177e4 LT	175	case K_SYS_REVISION_BCM1250_PASS1:
1da177e4 LT	176	#ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
36a88530	177	printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "
b6f7880b RB	178	"and the kernel doesn't have the proper "
b6f7880b RB	179	"workarounds compiled in. @@@@\n");
1da177e4 LT	180	bad_config = 1;
	181	#endif
	182	break;
	183	case K_SYS_REVISION_BCM1250_PASS2:
	184	/* Pass 2 - easiest as default for now - so many numbers */
b6f7880b RB	185	#if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) \|\| \
b6f7880b RB	186	!defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS)
36a88530	187	printk("@@@@ This is a BCM1250 A3-A10 board, and the "
b6f7880b RB	188	"kernel doesn't have the proper workarounds "
b6f7880b RB	189	"compiled in. @@@@\n");
1da177e4 LT	190	bad_config = 1;
	191	#endif
	192	#ifdef CONFIG_CPU_HAS_PREFETCH
36a88530	193	printk("@@@@ Prefetches may be enabled in this kernel, "
b6f7880b	194	"but are buggy on this board. @@@@\n");
1da177e4 LT	195	bad_config = 1;
	196	#endif
	197	break;
	198	case K_SYS_REVISION_BCM1250_PASS2_2:
	199	#ifndef CONFIG_SB1_PASS_2_WORKAROUNDS
36a88530	200	printk("@@@@ This is a BCM1250 B1/B2. board, and the "
b6f7880b RB	201	"kernel doesn't have the proper workarounds "
b6f7880b RB	202	"compiled in. @@@@\n");
1da177e4 LT	203	bad_config = 1;
1da177e4 LT	204	#endif
b6f7880b RB	205	#if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) \|\| \
b6f7880b RB	206	!defined(CONFIG_CPU_HAS_PREFETCH)
36a88530	207	printk("@@@@ This is a BCM1250 B1/B2, but the kernel is "
b6f7880b RB	208	"conservatively configured for an 'A' stepping. "
b6f7880b RB	209	"@@@@\n");
1da177e4 LT	210	#endif
	211	break;
	212	default:
	213	break;
	214	}
	215	if (bad_config) {
36a88530	216	printk("Invalid configuration for this chip.\n");
1da177e4 LT	217	machine_restart(NULL);
	218	}
	219	}