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1da177e4 LT |
1 | /* |
2 | * arch/mips/sni/pcimt_scache.c | |
3 | * | |
4 | * This file is subject to the terms and conditions of the GNU General Public | |
5 | * License. See the file "COPYING" in the main directory of this archive | |
6 | * for more details. | |
7 | * | |
8 | * Copyright (c) 1997, 1998 by Ralf Baechle | |
9 | */ | |
10 | #include <linux/init.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <asm/bcache.h> | |
13 | #include <asm/sni.h> | |
14 | ||
15 | #define cacheconf (*(volatile unsigned int *)PCIMT_CACHECONF) | |
16 | #define invspace (*(volatile unsigned int *)PCIMT_INVSPACE) | |
17 | ||
18 | void __init sni_pcimt_sc_init(void) | |
19 | { | |
20 | unsigned int scsiz, sc_size; | |
21 | ||
22 | scsiz = cacheconf & 7; | |
23 | if (scsiz == 0) { | |
24 | printk("Second level cache is deactived.\n"); | |
25 | return; | |
26 | } | |
27 | if (scsiz >= 6) { | |
28 | printk("Invalid second level cache size configured, " | |
29 | "deactivating second level cache.\n"); | |
30 | cacheconf = 0; | |
31 | return; | |
32 | } | |
33 | ||
34 | sc_size = 128 << scsiz; | |
35 | printk("%dkb second level cache detected, deactivating.\n", sc_size); | |
36 | cacheconf = 0; | |
37 | } |