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Commit | Line | Data |
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89d63fe1 AN |
1 | /* |
2 | * linux/arch/mips/txx9/generic/setup.c | |
3 | * | |
4 | * Based on linux/arch/mips/txx9/rbtx4938/setup.c, | |
5 | * and RBTX49xx patch from CELF patch archive. | |
6 | * | |
7 | * 2003-2005 (c) MontaVista Software, Inc. | |
8 | * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007 | |
9 | * | |
10 | * This file is subject to the terms and conditions of the GNU General Public | |
11 | * License. See the file "COPYING" in the main directory of this archive | |
12 | * for more details. | |
13 | */ | |
14 | #include <linux/init.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/types.h> | |
edcaf1a6 AN |
17 | #include <linux/interrupt.h> |
18 | #include <linux/string.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/clk.h> | |
21 | #include <linux/err.h> | |
e0eb7307 | 22 | #include <linux/gpio.h> |
68314725 | 23 | #include <linux/platform_device.h> |
7779a5e0 | 24 | #include <linux/serial_core.h> |
51f607c7 | 25 | #include <linux/mtd/physmap.h> |
ae027ead | 26 | #include <linux/leds.h> |
edcaf1a6 | 27 | #include <asm/bootinfo.h> |
e0eb7307 | 28 | #include <asm/time.h> |
a49297e8 | 29 | #include <asm/reboot.h> |
d10e025f | 30 | #include <asm/r4kcache.h> |
b6263ff2 | 31 | #include <asm/sections.h> |
89d63fe1 | 32 | #include <asm/txx9/generic.h> |
07517529 | 33 | #include <asm/txx9/pci.h> |
496a3b5c | 34 | #include <asm/txx9tmr.h> |
a591f5d3 | 35 | #include <asm/txx9/ndfmc.h> |
edcaf1a6 AN |
36 | #ifdef CONFIG_CPU_TX49XX |
37 | #include <asm/txx9/tx4938.h> | |
38 | #endif | |
89d63fe1 AN |
39 | |
40 | /* EBUSC settings of TX4927, etc. */ | |
41 | struct resource txx9_ce_res[8]; | |
42 | static char txx9_ce_res_name[8][4]; /* "CEn" */ | |
43 | ||
44 | /* pcode, internal register */ | |
94a4c329 | 45 | unsigned int txx9_pcode; |
89d63fe1 AN |
46 | char txx9_pcode_str[8]; |
47 | static struct resource txx9_reg_res = { | |
48 | .name = txx9_pcode_str, | |
49 | .flags = IORESOURCE_MEM, | |
50 | }; | |
51 | void __init | |
52 | txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size) | |
53 | { | |
54 | int i; | |
55 | ||
56 | for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) { | |
57 | sprintf(txx9_ce_res_name[i], "CE%d", i); | |
58 | txx9_ce_res[i].flags = IORESOURCE_MEM; | |
59 | txx9_ce_res[i].name = txx9_ce_res_name[i]; | |
60 | } | |
61 | ||
073828d0 | 62 | txx9_pcode = pcode; |
89d63fe1 AN |
63 | sprintf(txx9_pcode_str, "TX%x", pcode); |
64 | if (base) { | |
65 | txx9_reg_res.start = base & 0xfffffffffULL; | |
66 | txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1); | |
67 | request_resource(&iomem_resource, &txx9_reg_res); | |
68 | } | |
69 | } | |
70 | ||
71 | /* clocks */ | |
72 | unsigned int txx9_master_clock; | |
73 | unsigned int txx9_cpu_clock; | |
74 | unsigned int txx9_gbus_clock; | |
edcaf1a6 | 75 | |
c7b95bcb AN |
76 | #ifdef CONFIG_CPU_TX39XX |
77 | /* don't enable by default - see errata */ | |
78 | int txx9_ccfg_toeon __initdata; | |
79 | #else | |
94a4c329 | 80 | int txx9_ccfg_toeon __initdata = 1; |
c7b95bcb | 81 | #endif |
edcaf1a6 AN |
82 | |
83 | /* Minimum CLK support */ | |
84 | ||
85 | struct clk *clk_get(struct device *dev, const char *id) | |
86 | { | |
87 | if (!strcmp(id, "spi-baseclk")) | |
94a4c329 | 88 | return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4); |
edcaf1a6 | 89 | if (!strcmp(id, "imbus_clk")) |
94a4c329 | 90 | return (struct clk *)((unsigned long)txx9_gbus_clock / 2); |
edcaf1a6 AN |
91 | return ERR_PTR(-ENOENT); |
92 | } | |
93 | EXPORT_SYMBOL(clk_get); | |
94 | ||
95 | int clk_enable(struct clk *clk) | |
96 | { | |
97 | return 0; | |
98 | } | |
99 | EXPORT_SYMBOL(clk_enable); | |
100 | ||
101 | void clk_disable(struct clk *clk) | |
102 | { | |
103 | } | |
104 | EXPORT_SYMBOL(clk_disable); | |
105 | ||
106 | unsigned long clk_get_rate(struct clk *clk) | |
107 | { | |
108 | return (unsigned long)clk; | |
109 | } | |
110 | EXPORT_SYMBOL(clk_get_rate); | |
111 | ||
112 | void clk_put(struct clk *clk) | |
113 | { | |
114 | } | |
115 | EXPORT_SYMBOL(clk_put); | |
116 | ||
8d795f2a AN |
117 | /* GPIO support */ |
118 | ||
119 | #ifdef CONFIG_GENERIC_GPIO | |
120 | int gpio_to_irq(unsigned gpio) | |
121 | { | |
122 | return -EINVAL; | |
123 | } | |
124 | EXPORT_SYMBOL(gpio_to_irq); | |
125 | ||
126 | int irq_to_gpio(unsigned irq) | |
127 | { | |
128 | return -EINVAL; | |
129 | } | |
130 | EXPORT_SYMBOL(irq_to_gpio); | |
131 | #endif | |
132 | ||
860e546c AN |
133 | #define BOARD_VEC(board) extern struct txx9_board_vec board; |
134 | #include <asm/txx9/boards.h> | |
135 | #undef BOARD_VEC | |
edcaf1a6 | 136 | |
edcaf1a6 AN |
137 | struct txx9_board_vec *txx9_board_vec __initdata; |
138 | static char txx9_system_type[32]; | |
139 | ||
860e546c AN |
140 | static struct txx9_board_vec *board_vecs[] __initdata = { |
141 | #define BOARD_VEC(board) &board, | |
142 | #include <asm/txx9/boards.h> | |
143 | #undef BOARD_VEC | |
144 | }; | |
145 | ||
146 | static struct txx9_board_vec *__init find_board_byname(const char *name) | |
147 | { | |
148 | int i; | |
149 | ||
150 | /* search board_vecs table */ | |
151 | for (i = 0; i < ARRAY_SIZE(board_vecs); i++) { | |
152 | if (strstr(board_vecs[i]->system, name)) | |
153 | return board_vecs[i]; | |
154 | } | |
155 | return NULL; | |
156 | } | |
157 | ||
e0dfb20c | 158 | static void __init prom_init_cmdline(void) |
edcaf1a6 | 159 | { |
97b0511c GU |
160 | int argc; |
161 | int *argv32; | |
edcaf1a6 | 162 | int i; /* Always ignore the "-c" at argv[0] */ |
e0dfb20c | 163 | char builtin[CL_SIZE]; |
edcaf1a6 | 164 | |
97b0511c GU |
165 | if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) { |
166 | /* | |
167 | * argc is not a valid number, or argv32 is not a valid | |
168 | * pointer | |
169 | */ | |
170 | argc = 0; | |
171 | argv32 = NULL; | |
172 | } else { | |
173 | argc = (int)fw_arg0; | |
174 | argv32 = (int *)fw_arg1; | |
175 | } | |
176 | ||
edcaf1a6 | 177 | /* ignore all built-in args if any f/w args given */ |
e0dfb20c AN |
178 | /* |
179 | * But if built-in strings was started with '+', append them | |
180 | * to command line args. If built-in was started with '-', | |
181 | * ignore all f/w args. | |
182 | */ | |
183 | builtin[0] = '\0'; | |
184 | if (arcs_cmdline[0] == '+') | |
185 | strcpy(builtin, arcs_cmdline + 1); | |
186 | else if (arcs_cmdline[0] == '-') { | |
187 | strcpy(builtin, arcs_cmdline + 1); | |
188 | argc = 0; | |
189 | } else if (argc <= 1) | |
190 | strcpy(builtin, arcs_cmdline); | |
191 | arcs_cmdline[0] = '\0'; | |
edcaf1a6 AN |
192 | |
193 | for (i = 1; i < argc; i++) { | |
e0dfb20c | 194 | char *str = (char *)(long)argv32[i]; |
edcaf1a6 AN |
195 | if (i != 1) |
196 | strcat(arcs_cmdline, " "); | |
e0dfb20c AN |
197 | if (strchr(str, ' ')) { |
198 | strcat(arcs_cmdline, "\""); | |
199 | strcat(arcs_cmdline, str); | |
200 | strcat(arcs_cmdline, "\""); | |
201 | } else | |
202 | strcat(arcs_cmdline, str); | |
203 | } | |
204 | /* append saved builtin args */ | |
205 | if (builtin[0]) { | |
206 | if (arcs_cmdline[0]) | |
207 | strcat(arcs_cmdline, " "); | |
208 | strcat(arcs_cmdline, builtin); | |
edcaf1a6 AN |
209 | } |
210 | } | |
211 | ||
d10e025f AN |
212 | static int txx9_ic_disable __initdata; |
213 | static int txx9_dc_disable __initdata; | |
214 | ||
215 | #if defined(CONFIG_CPU_TX49XX) | |
216 | /* flush all cache on very early stage (before 4k_cache_init) */ | |
217 | static void __init early_flush_dcache(void) | |
218 | { | |
219 | unsigned int conf = read_c0_config(); | |
220 | unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6)); | |
221 | unsigned int linesz = 32; | |
222 | unsigned long addr, end; | |
223 | ||
224 | end = INDEX_BASE + dc_size / 4; | |
225 | /* 4way, waybit=0 */ | |
226 | for (addr = INDEX_BASE; addr < end; addr += linesz) { | |
227 | cache_op(Index_Writeback_Inv_D, addr | 0); | |
228 | cache_op(Index_Writeback_Inv_D, addr | 1); | |
229 | cache_op(Index_Writeback_Inv_D, addr | 2); | |
230 | cache_op(Index_Writeback_Inv_D, addr | 3); | |
231 | } | |
232 | } | |
233 | ||
234 | static void __init txx9_cache_fixup(void) | |
235 | { | |
236 | unsigned int conf; | |
237 | ||
238 | conf = read_c0_config(); | |
239 | /* flush and disable */ | |
240 | if (txx9_ic_disable) { | |
241 | conf |= TX49_CONF_IC; | |
242 | write_c0_config(conf); | |
243 | } | |
244 | if (txx9_dc_disable) { | |
245 | early_flush_dcache(); | |
246 | conf |= TX49_CONF_DC; | |
247 | write_c0_config(conf); | |
248 | } | |
249 | ||
250 | /* enable cache */ | |
251 | conf = read_c0_config(); | |
252 | if (!txx9_ic_disable) | |
253 | conf &= ~TX49_CONF_IC; | |
254 | if (!txx9_dc_disable) | |
255 | conf &= ~TX49_CONF_DC; | |
256 | write_c0_config(conf); | |
257 | ||
258 | if (conf & TX49_CONF_IC) | |
259 | pr_info("TX49XX I-Cache disabled.\n"); | |
260 | if (conf & TX49_CONF_DC) | |
261 | pr_info("TX49XX D-Cache disabled.\n"); | |
262 | } | |
263 | #elif defined(CONFIG_CPU_TX39XX) | |
264 | /* flush all cache on very early stage (before tx39_cache_init) */ | |
265 | static void __init early_flush_dcache(void) | |
266 | { | |
267 | unsigned int conf = read_c0_config(); | |
268 | unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >> | |
269 | TX39_CONF_DCS_SHIFT)); | |
270 | unsigned int linesz = 16; | |
271 | unsigned long addr, end; | |
272 | ||
273 | end = INDEX_BASE + dc_size / 2; | |
274 | /* 2way, waybit=0 */ | |
275 | for (addr = INDEX_BASE; addr < end; addr += linesz) { | |
276 | cache_op(Index_Writeback_Inv_D, addr | 0); | |
277 | cache_op(Index_Writeback_Inv_D, addr | 1); | |
278 | } | |
279 | } | |
280 | ||
281 | static void __init txx9_cache_fixup(void) | |
282 | { | |
283 | unsigned int conf; | |
284 | ||
285 | conf = read_c0_config(); | |
286 | /* flush and disable */ | |
287 | if (txx9_ic_disable) { | |
288 | conf &= ~TX39_CONF_ICE; | |
289 | write_c0_config(conf); | |
290 | } | |
291 | if (txx9_dc_disable) { | |
292 | early_flush_dcache(); | |
293 | conf &= ~TX39_CONF_DCE; | |
294 | write_c0_config(conf); | |
295 | } | |
296 | ||
297 | /* enable cache */ | |
298 | conf = read_c0_config(); | |
299 | if (!txx9_ic_disable) | |
300 | conf |= TX39_CONF_ICE; | |
301 | if (!txx9_dc_disable) | |
302 | conf |= TX39_CONF_DCE; | |
303 | write_c0_config(conf); | |
304 | ||
305 | if (!(conf & TX39_CONF_ICE)) | |
306 | pr_info("TX39XX I-Cache disabled.\n"); | |
307 | if (!(conf & TX39_CONF_DCE)) | |
308 | pr_info("TX39XX D-Cache disabled.\n"); | |
309 | } | |
310 | #else | |
311 | static inline void txx9_cache_fixup(void) | |
312 | { | |
313 | } | |
314 | #endif | |
315 | ||
860e546c | 316 | static void __init preprocess_cmdline(void) |
edcaf1a6 | 317 | { |
860e546c AN |
318 | char cmdline[CL_SIZE]; |
319 | char *s; | |
320 | ||
321 | strcpy(cmdline, arcs_cmdline); | |
322 | s = cmdline; | |
323 | arcs_cmdline[0] = '\0'; | |
324 | while (s && *s) { | |
325 | char *str = strsep(&s, " "); | |
326 | if (strncmp(str, "board=", 6) == 0) { | |
327 | txx9_board_vec = find_board_byname(str + 6); | |
328 | continue; | |
329 | } else if (strncmp(str, "masterclk=", 10) == 0) { | |
330 | unsigned long val; | |
331 | if (strict_strtoul(str + 10, 10, &val) == 0) | |
332 | txx9_master_clock = val; | |
333 | continue; | |
d10e025f AN |
334 | } else if (strcmp(str, "icdisable") == 0) { |
335 | txx9_ic_disable = 1; | |
336 | continue; | |
337 | } else if (strcmp(str, "dcdisable") == 0) { | |
338 | txx9_dc_disable = 1; | |
339 | continue; | |
c7b95bcb AN |
340 | } else if (strcmp(str, "toeoff") == 0) { |
341 | txx9_ccfg_toeon = 0; | |
342 | continue; | |
343 | } else if (strcmp(str, "toeon") == 0) { | |
344 | txx9_ccfg_toeon = 1; | |
345 | continue; | |
860e546c AN |
346 | } |
347 | if (arcs_cmdline[0]) | |
348 | strcat(arcs_cmdline, " "); | |
349 | strcat(arcs_cmdline, str); | |
350 | } | |
d10e025f AN |
351 | |
352 | txx9_cache_fixup(); | |
860e546c AN |
353 | } |
354 | ||
355 | static void __init select_board(void) | |
356 | { | |
357 | const char *envstr; | |
358 | ||
359 | /* first, determine by "board=" argument in preprocess_cmdline() */ | |
360 | if (txx9_board_vec) | |
361 | return; | |
362 | /* next, determine by "board" envvar */ | |
363 | envstr = prom_getenv("board"); | |
364 | if (envstr) { | |
365 | txx9_board_vec = find_board_byname(envstr); | |
366 | if (txx9_board_vec) | |
367 | return; | |
368 | } | |
369 | ||
370 | /* select "default" board */ | |
edcaf1a6 | 371 | #ifdef CONFIG_CPU_TX39XX |
7a1fdf19 | 372 | txx9_board_vec = &jmr3927_vec; |
edcaf1a6 AN |
373 | #endif |
374 | #ifdef CONFIG_CPU_TX49XX | |
375 | switch (TX4938_REV_PCODE()) { | |
8d795f2a | 376 | #ifdef CONFIG_TOSHIBA_RBTX4927 |
edcaf1a6 | 377 | case 0x4927: |
7a1fdf19 | 378 | txx9_board_vec = &rbtx4927_vec; |
edcaf1a6 AN |
379 | break; |
380 | case 0x4937: | |
7a1fdf19 | 381 | txx9_board_vec = &rbtx4937_vec; |
edcaf1a6 | 382 | break; |
8d795f2a AN |
383 | #endif |
384 | #ifdef CONFIG_TOSHIBA_RBTX4938 | |
edcaf1a6 | 385 | case 0x4938: |
7a1fdf19 | 386 | txx9_board_vec = &rbtx4938_vec; |
edcaf1a6 | 387 | break; |
b27311e1 AN |
388 | #endif |
389 | #ifdef CONFIG_TOSHIBA_RBTX4939 | |
390 | case 0x4939: | |
391 | txx9_board_vec = &rbtx4939_vec; | |
392 | break; | |
8d795f2a | 393 | #endif |
edcaf1a6 AN |
394 | } |
395 | #endif | |
860e546c AN |
396 | } |
397 | ||
398 | void __init prom_init(void) | |
399 | { | |
400 | prom_init_cmdline(); | |
401 | preprocess_cmdline(); | |
402 | select_board(); | |
7a1fdf19 YY |
403 | |
404 | strcpy(txx9_system_type, txx9_board_vec->system); | |
405 | ||
7b226094 | 406 | txx9_board_vec->prom_init(); |
edcaf1a6 AN |
407 | } |
408 | ||
409 | void __init prom_free_prom_memory(void) | |
410 | { | |
b6263ff2 AN |
411 | unsigned long saddr = PAGE_SIZE; |
412 | unsigned long eaddr = __pa_symbol(&_text); | |
413 | ||
414 | if (saddr < eaddr) | |
415 | free_init_pages("prom memory", saddr, eaddr); | |
edcaf1a6 AN |
416 | } |
417 | ||
418 | const char *get_system_type(void) | |
419 | { | |
420 | return txx9_system_type; | |
421 | } | |
422 | ||
423 | char * __init prom_getcmdline(void) | |
424 | { | |
425 | return &(arcs_cmdline[0]); | |
426 | } | |
427 | ||
265b89db AN |
428 | const char *__init prom_getenv(const char *name) |
429 | { | |
97b0511c | 430 | const s32 *str; |
265b89db | 431 | |
97b0511c | 432 | if (fw_arg2 < CKSEG0) |
265b89db | 433 | return NULL; |
97b0511c GU |
434 | |
435 | str = (const s32 *)fw_arg2; | |
265b89db AN |
436 | /* YAMON style ("name", "value" pairs) */ |
437 | while (str[0] && str[1]) { | |
438 | if (!strcmp((const char *)(unsigned long)str[0], name)) | |
439 | return (const char *)(unsigned long)str[1]; | |
440 | str += 2; | |
441 | } | |
442 | return NULL; | |
443 | } | |
444 | ||
a49297e8 AN |
445 | static void __noreturn txx9_machine_halt(void) |
446 | { | |
447 | local_irq_disable(); | |
448 | clear_c0_status(ST0_IM); | |
449 | while (1) { | |
450 | if (cpu_wait) { | |
451 | (*cpu_wait)(); | |
452 | if (cpu_has_counter) { | |
453 | /* | |
454 | * Clear counter interrupt while it | |
455 | * breaks WAIT instruction even if | |
456 | * masked. | |
457 | */ | |
458 | write_c0_compare(0); | |
459 | } | |
460 | } | |
461 | } | |
462 | } | |
463 | ||
68314725 AN |
464 | /* Watchdog support */ |
465 | void __init txx9_wdt_init(unsigned long base) | |
466 | { | |
467 | struct resource res = { | |
468 | .start = base, | |
469 | .end = base + 0x100 - 1, | |
470 | .flags = IORESOURCE_MEM, | |
471 | }; | |
472 | platform_device_register_simple("txx9wdt", -1, &res, 1); | |
473 | } | |
474 | ||
496a3b5c AN |
475 | void txx9_wdt_now(unsigned long base) |
476 | { | |
477 | struct txx9_tmr_reg __iomem *tmrptr = | |
478 | ioremap(base, sizeof(struct txx9_tmr_reg)); | |
479 | /* disable watch dog timer */ | |
480 | __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr); | |
481 | __raw_writel(0, &tmrptr->tcr); | |
482 | /* kick watchdog */ | |
483 | __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr); | |
484 | __raw_writel(1, &tmrptr->cpra); /* immediate */ | |
485 | __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG, | |
486 | &tmrptr->tcr); | |
487 | } | |
488 | ||
c49f91f5 AN |
489 | /* SPI support */ |
490 | void __init txx9_spi_init(int busid, unsigned long base, int irq) | |
491 | { | |
492 | struct resource res[] = { | |
493 | { | |
494 | .start = base, | |
495 | .end = base + 0x20 - 1, | |
496 | .flags = IORESOURCE_MEM, | |
497 | }, { | |
498 | .start = irq, | |
499 | .flags = IORESOURCE_IRQ, | |
500 | }, | |
501 | }; | |
502 | platform_device_register_simple("spi_txx9", busid, | |
503 | res, ARRAY_SIZE(res)); | |
504 | } | |
505 | ||
506 | void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr) | |
507 | { | |
508 | struct platform_device *pdev = | |
509 | platform_device_alloc("tc35815-mac", id); | |
510 | if (!pdev || | |
511 | platform_device_add_data(pdev, ethaddr, 6) || | |
512 | platform_device_add(pdev)) | |
513 | platform_device_put(pdev); | |
514 | } | |
515 | ||
7779a5e0 AN |
516 | void __init txx9_sio_init(unsigned long baseaddr, int irq, |
517 | unsigned int line, unsigned int sclk, int nocts) | |
518 | { | |
519 | #ifdef CONFIG_SERIAL_TXX9 | |
520 | struct uart_port req; | |
521 | ||
522 | memset(&req, 0, sizeof(req)); | |
523 | req.line = line; | |
524 | req.iotype = UPIO_MEM; | |
525 | req.membase = ioremap(baseaddr, 0x24); | |
526 | req.mapbase = baseaddr; | |
527 | req.irq = irq; | |
528 | if (!nocts) | |
529 | req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; | |
530 | if (sclk) { | |
531 | req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/; | |
532 | req.uartclk = sclk; | |
533 | } else | |
534 | req.uartclk = TXX9_IMCLK; | |
535 | early_serial_txx9_setup(&req); | |
536 | #endif /* CONFIG_SERIAL_TXX9 */ | |
537 | } | |
538 | ||
e352953c AN |
539 | #ifdef CONFIG_EARLY_PRINTK |
540 | static void __init null_prom_putchar(char c) | |
541 | { | |
542 | } | |
543 | void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar; | |
544 | ||
545 | void __init prom_putchar(char c) | |
546 | { | |
547 | txx9_prom_putchar(c); | |
548 | } | |
549 | ||
550 | static void __iomem *early_txx9_sio_port; | |
551 | ||
552 | static void __init early_txx9_sio_putchar(char c) | |
553 | { | |
554 | #define TXX9_SICISR 0x0c | |
555 | #define TXX9_SITFIFO 0x1c | |
556 | #define TXX9_SICISR_TXALS 0x00000002 | |
557 | while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) & | |
558 | TXX9_SICISR_TXALS)) | |
559 | ; | |
560 | __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO); | |
561 | } | |
562 | ||
563 | void __init txx9_sio_putchar_init(unsigned long baseaddr) | |
564 | { | |
565 | early_txx9_sio_port = ioremap(baseaddr, 0x24); | |
566 | txx9_prom_putchar = early_txx9_sio_putchar; | |
567 | } | |
568 | #endif /* CONFIG_EARLY_PRINTK */ | |
569 | ||
edcaf1a6 AN |
570 | /* wrappers */ |
571 | void __init plat_mem_setup(void) | |
572 | { | |
94a4c329 AN |
573 | ioport_resource.start = 0; |
574 | ioport_resource.end = ~0UL; /* no limit */ | |
575 | iomem_resource.start = 0; | |
576 | iomem_resource.end = ~0UL; /* no limit */ | |
a49297e8 AN |
577 | |
578 | /* fallback restart/halt routines */ | |
579 | _machine_restart = (void (*)(char *))txx9_machine_halt; | |
580 | _machine_halt = txx9_machine_halt; | |
581 | pm_power_off = txx9_machine_halt; | |
582 | ||
07517529 AN |
583 | #ifdef CONFIG_PCI |
584 | pcibios_plat_setup = txx9_pcibios_setup; | |
585 | #endif | |
edcaf1a6 AN |
586 | txx9_board_vec->mem_setup(); |
587 | } | |
588 | ||
589 | void __init arch_init_irq(void) | |
590 | { | |
591 | txx9_board_vec->irq_setup(); | |
592 | } | |
593 | ||
594 | void __init plat_time_init(void) | |
595 | { | |
1374d084 AN |
596 | #ifdef CONFIG_CPU_TX49XX |
597 | mips_hpt_frequency = txx9_cpu_clock / 2; | |
598 | #endif | |
edcaf1a6 AN |
599 | txx9_board_vec->time_init(); |
600 | } | |
601 | ||
602 | static int __init _txx9_arch_init(void) | |
603 | { | |
604 | if (txx9_board_vec->arch_init) | |
605 | txx9_board_vec->arch_init(); | |
606 | return 0; | |
607 | } | |
608 | arch_initcall(_txx9_arch_init); | |
609 | ||
610 | static int __init _txx9_device_init(void) | |
611 | { | |
612 | if (txx9_board_vec->device_init) | |
613 | txx9_board_vec->device_init(); | |
614 | return 0; | |
615 | } | |
616 | device_initcall(_txx9_device_init); | |
617 | ||
618 | int (*txx9_irq_dispatch)(int pending); | |
619 | asmlinkage void plat_irq_dispatch(void) | |
620 | { | |
621 | int pending = read_c0_status() & read_c0_cause() & ST0_IM; | |
622 | int irq = txx9_irq_dispatch(pending); | |
623 | ||
624 | if (likely(irq >= 0)) | |
625 | do_IRQ(irq); | |
626 | else | |
627 | spurious_interrupt(); | |
628 | } | |
4c642f3f AN |
629 | |
630 | /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */ | |
631 | #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B | |
632 | static unsigned long __swizzle_addr_none(unsigned long port) | |
633 | { | |
634 | return port; | |
635 | } | |
636 | unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none; | |
637 | EXPORT_SYMBOL(__swizzle_addr_b); | |
638 | #endif | |
51f607c7 | 639 | |
1ba5a176 AN |
640 | #ifdef NEEDS_TXX9_IOSWABW |
641 | static u16 ioswabw_default(volatile u16 *a, u16 x) | |
642 | { | |
643 | return le16_to_cpu(x); | |
644 | } | |
645 | static u16 __mem_ioswabw_default(volatile u16 *a, u16 x) | |
646 | { | |
647 | return x; | |
648 | } | |
649 | u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default; | |
650 | EXPORT_SYMBOL(ioswabw); | |
651 | u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default; | |
652 | EXPORT_SYMBOL(__mem_ioswabw); | |
653 | #endif | |
654 | ||
51f607c7 AN |
655 | void __init txx9_physmap_flash_init(int no, unsigned long addr, |
656 | unsigned long size, | |
657 | const struct physmap_flash_data *pdata) | |
658 | { | |
659 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) | |
660 | struct resource res = { | |
661 | .start = addr, | |
662 | .end = addr + size - 1, | |
663 | .flags = IORESOURCE_MEM, | |
664 | }; | |
665 | struct platform_device *pdev; | |
666 | #ifdef CONFIG_MTD_PARTITIONS | |
667 | static struct mtd_partition parts[2]; | |
668 | struct physmap_flash_data pdata_part; | |
669 | ||
670 | /* If this area contained boot area, make separate partition */ | |
671 | if (pdata->nr_parts == 0 && !pdata->parts && | |
672 | addr < 0x1fc00000 && addr + size > 0x1fc00000 && | |
673 | !parts[0].name) { | |
674 | parts[0].name = "boot"; | |
675 | parts[0].offset = 0x1fc00000 - addr; | |
676 | parts[0].size = addr + size - 0x1fc00000; | |
677 | parts[1].name = "user"; | |
678 | parts[1].offset = 0; | |
679 | parts[1].size = 0x1fc00000 - addr; | |
680 | pdata_part = *pdata; | |
681 | pdata_part.nr_parts = ARRAY_SIZE(parts); | |
682 | pdata_part.parts = parts; | |
683 | pdata = &pdata_part; | |
684 | } | |
685 | #endif | |
686 | pdev = platform_device_alloc("physmap-flash", no); | |
687 | if (!pdev || | |
688 | platform_device_add_resources(pdev, &res, 1) || | |
a591f5d3 AN |
689 | platform_device_add_data(pdev, pdata, sizeof(*pdata)) || |
690 | platform_device_add(pdev)) | |
691 | platform_device_put(pdev); | |
692 | #endif | |
693 | } | |
694 | ||
695 | void __init txx9_ndfmc_init(unsigned long baseaddr, | |
696 | const struct txx9ndfmc_platform_data *pdata) | |
697 | { | |
698 | #if defined(CONFIG_MTD_NAND_TXX9NDFMC) || \ | |
699 | defined(CONFIG_MTD_NAND_TXX9NDFMC_MODULE) | |
700 | struct resource res = { | |
701 | .start = baseaddr, | |
702 | .end = baseaddr + 0x1000 - 1, | |
703 | .flags = IORESOURCE_MEM, | |
704 | }; | |
705 | struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1); | |
706 | ||
707 | if (!pdev || | |
708 | platform_device_add_resources(pdev, &res, 1) || | |
51f607c7 AN |
709 | platform_device_add_data(pdev, pdata, sizeof(*pdata)) || |
710 | platform_device_add(pdev)) | |
711 | platform_device_put(pdev); | |
712 | #endif | |
713 | } | |
ae027ead AN |
714 | |
715 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | |
716 | static DEFINE_SPINLOCK(txx9_iocled_lock); | |
717 | ||
718 | #define TXX9_IOCLED_MAXLEDS 8 | |
719 | ||
720 | struct txx9_iocled_data { | |
721 | struct gpio_chip chip; | |
722 | u8 cur_val; | |
723 | void __iomem *mmioaddr; | |
724 | struct gpio_led_platform_data pdata; | |
725 | struct gpio_led leds[TXX9_IOCLED_MAXLEDS]; | |
726 | char names[TXX9_IOCLED_MAXLEDS][32]; | |
727 | }; | |
728 | ||
729 | static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset) | |
730 | { | |
731 | struct txx9_iocled_data *data = | |
732 | container_of(chip, struct txx9_iocled_data, chip); | |
733 | return data->cur_val & (1 << offset); | |
734 | } | |
735 | ||
736 | static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset, | |
737 | int value) | |
738 | { | |
739 | struct txx9_iocled_data *data = | |
740 | container_of(chip, struct txx9_iocled_data, chip); | |
741 | unsigned long flags; | |
742 | spin_lock_irqsave(&txx9_iocled_lock, flags); | |
743 | if (value) | |
744 | data->cur_val |= 1 << offset; | |
745 | else | |
746 | data->cur_val &= ~(1 << offset); | |
747 | writeb(data->cur_val, data->mmioaddr); | |
748 | mmiowb(); | |
749 | spin_unlock_irqrestore(&txx9_iocled_lock, flags); | |
750 | } | |
751 | ||
752 | static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset) | |
753 | { | |
754 | return 0; | |
755 | } | |
756 | ||
757 | static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset, | |
758 | int value) | |
759 | { | |
760 | txx9_iocled_set(chip, offset, value); | |
761 | return 0; | |
762 | } | |
763 | ||
764 | void __init txx9_iocled_init(unsigned long baseaddr, | |
765 | int basenum, unsigned int num, int lowactive, | |
766 | const char *color, char **deftriggers) | |
767 | { | |
768 | struct txx9_iocled_data *iocled; | |
769 | struct platform_device *pdev; | |
770 | int i; | |
771 | static char *default_triggers[] __initdata = { | |
772 | "heartbeat", | |
773 | "ide-disk", | |
774 | "nand-disk", | |
775 | NULL, | |
776 | }; | |
777 | ||
778 | if (!deftriggers) | |
779 | deftriggers = default_triggers; | |
780 | iocled = kzalloc(sizeof(*iocled), GFP_KERNEL); | |
781 | if (!iocled) | |
782 | return; | |
783 | iocled->mmioaddr = ioremap(baseaddr, 1); | |
784 | if (!iocled->mmioaddr) | |
785 | return; | |
786 | iocled->chip.get = txx9_iocled_get; | |
787 | iocled->chip.set = txx9_iocled_set; | |
788 | iocled->chip.direction_input = txx9_iocled_dir_in; | |
789 | iocled->chip.direction_output = txx9_iocled_dir_out; | |
790 | iocled->chip.label = "iocled"; | |
791 | iocled->chip.base = basenum; | |
792 | iocled->chip.ngpio = num; | |
793 | if (gpiochip_add(&iocled->chip)) | |
794 | return; | |
795 | if (basenum < 0) | |
796 | basenum = iocled->chip.base; | |
797 | ||
798 | pdev = platform_device_alloc("leds-gpio", basenum); | |
799 | if (!pdev) | |
800 | return; | |
801 | iocled->pdata.num_leds = num; | |
802 | iocled->pdata.leds = iocled->leds; | |
803 | for (i = 0; i < num; i++) { | |
804 | struct gpio_led *led = &iocled->leds[i]; | |
805 | snprintf(iocled->names[i], sizeof(iocled->names[i]), | |
806 | "iocled:%s:%u", color, i); | |
807 | led->name = iocled->names[i]; | |
808 | led->gpio = basenum + i; | |
809 | led->active_low = lowactive; | |
810 | if (deftriggers && *deftriggers) | |
811 | led->default_trigger = *deftriggers++; | |
812 | } | |
813 | pdev->dev.platform_data = &iocled->pdata; | |
814 | if (platform_device_add(pdev)) | |
815 | platform_device_put(pdev); | |
816 | } | |
817 | #else /* CONFIG_LEDS_GPIO */ | |
818 | void __init txx9_iocled_init(unsigned long baseaddr, | |
819 | int basenum, unsigned int num, int lowactive, | |
820 | const char *color, char **deftriggers) | |
821 | { | |
822 | } | |
823 | #endif /* CONFIG_LEDS_GPIO */ |