[mirror_ubuntu-artful-kernel.git] / arch / mips / txx9 / generic / setup.c

/*
 * linux/arch/mips/txx9/generic/setup.c
 *
 * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
 *	    and RBTX49xx patch from CELF patch archive.
 *
 * 2003-2005 (c) MontaVista Software, Inc.
 * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/string.h>
#include <linux/module.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/serial_core.h>
#include <linux/mtd/physmap.h>
#include <linux/leds.h>
#include <asm/bootinfo.h>
#include <asm/time.h>
#include <asm/reboot.h>
#include <asm/r4kcache.h>
#include <asm/txx9/generic.h>
#include <asm/txx9/pci.h>
#include <asm/txx9tmr.h>
#ifdef CONFIG_CPU_TX49XX
#include <asm/txx9/tx4938.h>
#endif

/* EBUSC settings of TX4927, etc. */
struct resource txx9_ce_res[8];
static char txx9_ce_res_name[8][4];	/* "CEn" */

/* pcode, internal register */
unsigned int txx9_pcode;
char txx9_pcode_str[8];
static struct resource txx9_reg_res = {
	.name = txx9_pcode_str,
	.flags = IORESOURCE_MEM,
};
void __init
txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
		sprintf(txx9_ce_res_name[i], "CE%d", i);
		txx9_ce_res[i].flags = IORESOURCE_MEM;
		txx9_ce_res[i].name = txx9_ce_res_name[i];
	}

	txx9_pcode = pcode;
	sprintf(txx9_pcode_str, "TX%x", pcode);
	if (base) {
		txx9_reg_res.start = base & 0xfffffffffULL;
		txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
		request_resource(&iomem_resource, &txx9_reg_res);
	}
}

/* clocks */
unsigned int txx9_master_clock;
unsigned int txx9_cpu_clock;
unsigned int txx9_gbus_clock;

#ifdef CONFIG_CPU_TX39XX
/* don't enable by default - see errata */
int txx9_ccfg_toeon __initdata;
#else
int txx9_ccfg_toeon __initdata = 1;
#endif

/* Minimum CLK support */

struct clk *clk_get(struct device *dev, const char *id)
{
	if (!strcmp(id, "spi-baseclk"))
		return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4);
	if (!strcmp(id, "imbus_clk"))
		return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
	return ERR_PTR(-ENOENT);
}
EXPORT_SYMBOL(clk_get);

int clk_enable(struct clk *clk)
{
	return 0;
}
EXPORT_SYMBOL(clk_enable);

void clk_disable(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_disable);

unsigned long clk_get_rate(struct clk *clk)
{
	return (unsigned long)clk;
}
EXPORT_SYMBOL(clk_get_rate);

void clk_put(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_put);

/* GPIO support */

#ifdef CONFIG_GENERIC_GPIO
int gpio_to_irq(unsigned gpio)
{
	return -EINVAL;
}
EXPORT_SYMBOL(gpio_to_irq);

int irq_to_gpio(unsigned irq)
{
	return -EINVAL;
}
EXPORT_SYMBOL(irq_to_gpio);
#endif

#define BOARD_VEC(board)	extern struct txx9_board_vec board;
#include <asm/txx9/boards.h>
#undef BOARD_VEC

struct txx9_board_vec *txx9_board_vec __initdata;
static char txx9_system_type[32];

static struct txx9_board_vec *board_vecs[] __initdata = {
#define BOARD_VEC(board)	&board,
#include <asm/txx9/boards.h>
#undef BOARD_VEC
};

static struct txx9_board_vec *__init find_board_byname(const char *name)
{
	int i;

	/* search board_vecs table */
	for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
		if (strstr(board_vecs[i]->system, name))
			return board_vecs[i];
	}
	return NULL;
}

static void __init prom_init_cmdline(void)
{
	int argc = (int)fw_arg0;
	int *argv32 = (int *)fw_arg1;
	int i;			/* Always ignore the "-c" at argv[0] */
	char builtin[CL_SIZE];

	/* ignore all built-in args if any f/w args given */
	/*
	 * But if built-in strings was started with '+', append them
	 * to command line args.  If built-in was started with '-',
	 * ignore all f/w args.
	 */
	builtin[0] = '\0';
	if (arcs_cmdline[0] == '+')
		strcpy(builtin, arcs_cmdline + 1);
	else if (arcs_cmdline[0] == '-') {
		strcpy(builtin, arcs_cmdline + 1);
		argc = 0;
	} else if (argc <= 1)
		strcpy(builtin, arcs_cmdline);
	arcs_cmdline[0] = '\0';

	for (i = 1; i < argc; i++) {
		char *str = (char *)(long)argv32[i];
		if (i != 1)
			strcat(arcs_cmdline, " ");
		if (strchr(str, ' ')) {
			strcat(arcs_cmdline, "\"");
			strcat(arcs_cmdline, str);
			strcat(arcs_cmdline, "\"");
		} else
			strcat(arcs_cmdline, str);
	}
	/* append saved builtin args */
	if (builtin[0]) {
		if (arcs_cmdline[0])
			strcat(arcs_cmdline, " ");
		strcat(arcs_cmdline, builtin);
	}
}

static int txx9_ic_disable __initdata;
static int txx9_dc_disable __initdata;

#if defined(CONFIG_CPU_TX49XX)
/* flush all cache on very early stage (before 4k_cache_init) */
static void __init early_flush_dcache(void)
{
	unsigned int conf = read_c0_config();
	unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
	unsigned int linesz = 32;
	unsigned long addr, end;

	end = INDEX_BASE + dc_size / 4;
	/* 4way, waybit=0 */
	for (addr = INDEX_BASE; addr < end; addr += linesz) {
		cache_op(Index_Writeback_Inv_D, addr | 0);
		cache_op(Index_Writeback_Inv_D, addr | 1);
		cache_op(Index_Writeback_Inv_D, addr | 2);
		cache_op(Index_Writeback_Inv_D, addr | 3);
	}
}

static void __init txx9_cache_fixup(void)
{
	unsigned int conf;

	conf = read_c0_config();
	/* flush and disable */
	if (txx9_ic_disable) {
		conf |= TX49_CONF_IC;
		write_c0_config(conf);
	}
	if (txx9_dc_disable) {
		early_flush_dcache();
		conf |= TX49_CONF_DC;
		write_c0_config(conf);
	}

	/* enable cache */
	conf = read_c0_config();
	if (!txx9_ic_disable)
		conf &= ~TX49_CONF_IC;
	if (!txx9_dc_disable)
		conf &= ~TX49_CONF_DC;
	write_c0_config(conf);

	if (conf & TX49_CONF_IC)
		pr_info("TX49XX I-Cache disabled.\n");
	if (conf & TX49_CONF_DC)
		pr_info("TX49XX D-Cache disabled.\n");
}
#elif defined(CONFIG_CPU_TX39XX)
/* flush all cache on very early stage (before tx39_cache_init) */
static void __init early_flush_dcache(void)
{
	unsigned int conf = read_c0_config();
	unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
					   TX39_CONF_DCS_SHIFT));
	unsigned int linesz = 16;
	unsigned long addr, end;

	end = INDEX_BASE + dc_size / 2;
	/* 2way, waybit=0 */
	for (addr = INDEX_BASE; addr < end; addr += linesz) {
		cache_op(Index_Writeback_Inv_D, addr | 0);
		cache_op(Index_Writeback_Inv_D, addr | 1);
	}
}

static void __init txx9_cache_fixup(void)
{
	unsigned int conf;

	conf = read_c0_config();
	/* flush and disable */
	if (txx9_ic_disable) {
		conf &= ~TX39_CONF_ICE;
		write_c0_config(conf);
	}
	if (txx9_dc_disable) {
		early_flush_dcache();
		conf &= ~TX39_CONF_DCE;
		write_c0_config(conf);
	}

	/* enable cache */
	conf = read_c0_config();
	if (!txx9_ic_disable)
		conf |= TX39_CONF_ICE;
	if (!txx9_dc_disable)
		conf |= TX39_CONF_DCE;
	write_c0_config(conf);

	if (!(conf & TX39_CONF_ICE))
		pr_info("TX39XX I-Cache disabled.\n");
	if (!(conf & TX39_CONF_DCE))
		pr_info("TX39XX D-Cache disabled.\n");
}
#else
static inline void txx9_cache_fixup(void)
{
}
#endif

static void __init preprocess_cmdline(void)
{
	char cmdline[CL_SIZE];
	char *s;

	strcpy(cmdline, arcs_cmdline);
	s = cmdline;
	arcs_cmdline[0] = '\0';
	while (s && *s) {
		char *str = strsep(&s, " ");
		if (strncmp(str, "board=", 6) == 0) {
			txx9_board_vec = find_board_byname(str + 6);
			continue;
		} else if (strncmp(str, "masterclk=", 10) == 0) {
			unsigned long val;
			if (strict_strtoul(str + 10, 10, &val) == 0)
				txx9_master_clock = val;
			continue;
		} else if (strcmp(str, "icdisable") == 0) {
			txx9_ic_disable = 1;
			continue;
		} else if (strcmp(str, "dcdisable") == 0) {
			txx9_dc_disable = 1;
			continue;
		} else if (strcmp(str, "toeoff") == 0) {
			txx9_ccfg_toeon = 0;
			continue;
		} else if (strcmp(str, "toeon") == 0) {
			txx9_ccfg_toeon = 1;
			continue;
		}
		if (arcs_cmdline[0])
			strcat(arcs_cmdline, " ");
		strcat(arcs_cmdline, str);
	}

	txx9_cache_fixup();
}

static void __init select_board(void)
{
	const char *envstr;

	/* first, determine by "board=" argument in preprocess_cmdline() */
	if (txx9_board_vec)
		return;
	/* next, determine by "board" envvar */
	envstr = prom_getenv("board");
	if (envstr) {
		txx9_board_vec = find_board_byname(envstr);
		if (txx9_board_vec)
			return;
	}

	/* select "default" board */
#ifdef CONFIG_CPU_TX39XX
	txx9_board_vec = &jmr3927_vec;
#endif
#ifdef CONFIG_CPU_TX49XX
	switch (TX4938_REV_PCODE()) {
#ifdef CONFIG_TOSHIBA_RBTX4927
	case 0x4927:
		txx9_board_vec = &rbtx4927_vec;
		break;
	case 0x4937:
		txx9_board_vec = &rbtx4937_vec;
		break;
#endif
#ifdef CONFIG_TOSHIBA_RBTX4938
	case 0x4938:
		txx9_board_vec = &rbtx4938_vec;
		break;
#endif
	}
#endif
}

void __init prom_init(void)
{
	prom_init_cmdline();
	preprocess_cmdline();
	select_board();

	strcpy(txx9_system_type, txx9_board_vec->system);

	txx9_board_vec->prom_init();
}

void __init prom_free_prom_memory(void)
{
}

const char *get_system_type(void)
{
	return txx9_system_type;
}

char * __init prom_getcmdline(void)
{
	return &(arcs_cmdline[0]);
}

const char *__init prom_getenv(const char *name)
{
	const s32 *str = (const s32 *)fw_arg2;

	if (!str)
		return NULL;
	/* YAMON style ("name", "value" pairs) */
	while (str[0] && str[1]) {
		if (!strcmp((const char *)(unsigned long)str[0], name))
			return (const char *)(unsigned long)str[1];
		str += 2;
	}
	return NULL;
}

static void __noreturn txx9_machine_halt(void)
{
	local_irq_disable();
	clear_c0_status(ST0_IM);
	while (1) {
		if (cpu_wait) {
			(*cpu_wait)();
			if (cpu_has_counter) {
				/*
				 * Clear counter interrupt while it
				 * breaks WAIT instruction even if
				 * masked.
				 */
				write_c0_compare(0);
			}
		}
	}
}

/* Watchdog support */
void __init txx9_wdt_init(unsigned long base)
{
	struct resource res = {
		.start	= base,
		.end	= base + 0x100 - 1,
		.flags	= IORESOURCE_MEM,
	};
	platform_device_register_simple("txx9wdt", -1, &res, 1);
}

void txx9_wdt_now(unsigned long base)
{
	struct txx9_tmr_reg __iomem *tmrptr =
		ioremap(base, sizeof(struct txx9_tmr_reg));
	/* disable watch dog timer */
	__raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
	__raw_writel(0, &tmrptr->tcr);
	/* kick watchdog */
	__raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
	__raw_writel(1, &tmrptr->cpra); /* immediate */
	__raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
		     &tmrptr->tcr);
}

/* SPI support */
void __init txx9_spi_init(int busid, unsigned long base, int irq)
{
	struct resource res[] = {
		{
			.start	= base,
			.end	= base + 0x20 - 1,
			.flags	= IORESOURCE_MEM,
		}, {
			.start	= irq,
			.flags	= IORESOURCE_IRQ,
		},
	};
	platform_device_register_simple("spi_txx9", busid,
					res, ARRAY_SIZE(res));
}

void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
{
	struct platform_device *pdev =
		platform_device_alloc("tc35815-mac", id);
	if (!pdev ||
	    platform_device_add_data(pdev, ethaddr, 6) ||
	    platform_device_add(pdev))
		platform_device_put(pdev);
}

void __init txx9_sio_init(unsigned long baseaddr, int irq,
			  unsigned int line, unsigned int sclk, int nocts)
{
#ifdef CONFIG_SERIAL_TXX9
	struct uart_port req;

	memset(&req, 0, sizeof(req));
	req.line = line;
	req.iotype = UPIO_MEM;
	req.membase = ioremap(baseaddr, 0x24);
	req.mapbase = baseaddr;
	req.irq = irq;
	if (!nocts)
		req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
	if (sclk) {
		req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
		req.uartclk = sclk;
	} else
		req.uartclk = TXX9_IMCLK;
	early_serial_txx9_setup(&req);
#endif /* CONFIG_SERIAL_TXX9 */
}

#ifdef CONFIG_EARLY_PRINTK
static void __init null_prom_putchar(char c)
{
}
void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;

void __init prom_putchar(char c)
{
	txx9_prom_putchar(c);
}

static void __iomem *early_txx9_sio_port;

static void __init early_txx9_sio_putchar(char c)
{
#define TXX9_SICISR	0x0c
#define TXX9_SITFIFO	0x1c
#define TXX9_SICISR_TXALS	0x00000002
	while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
		 TXX9_SICISR_TXALS))
		;
	__raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
}

void __init txx9_sio_putchar_init(unsigned long baseaddr)
{
	early_txx9_sio_port = ioremap(baseaddr, 0x24);
	txx9_prom_putchar = early_txx9_sio_putchar;
}
#endif /* CONFIG_EARLY_PRINTK */

/* wrappers */
void __init plat_mem_setup(void)
{
	ioport_resource.start = 0;
	ioport_resource.end = ~0UL;	/* no limit */
	iomem_resource.start = 0;
	iomem_resource.end = ~0UL;	/* no limit */

	/* fallback restart/halt routines */
	_machine_restart = (void (*)(char *))txx9_machine_halt;
	_machine_halt = txx9_machine_halt;
	pm_power_off = txx9_machine_halt;

#ifdef CONFIG_PCI
	pcibios_plat_setup = txx9_pcibios_setup;
#endif
	txx9_board_vec->mem_setup();
}

void __init arch_init_irq(void)
{
	txx9_board_vec->irq_setup();
}

void __init plat_time_init(void)
{
#ifdef CONFIG_CPU_TX49XX
	mips_hpt_frequency = txx9_cpu_clock / 2;
#endif
	txx9_board_vec->time_init();
}

static int __init _txx9_arch_init(void)
{
	if (txx9_board_vec->arch_init)
		txx9_board_vec->arch_init();
	return 0;
}
arch_initcall(_txx9_arch_init);

static int __init _txx9_device_init(void)
{
	if (txx9_board_vec->device_init)
		txx9_board_vec->device_init();
	return 0;
}
device_initcall(_txx9_device_init);

int (*txx9_irq_dispatch)(int pending);
asmlinkage void plat_irq_dispatch(void)
{
	int pending = read_c0_status() & read_c0_cause() & ST0_IM;
	int irq = txx9_irq_dispatch(pending);

	if (likely(irq >= 0))
		do_IRQ(irq);
	else
		spurious_interrupt();
}

/* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
#ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
static unsigned long __swizzle_addr_none(unsigned long port)
{
	return port;
}
unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
EXPORT_SYMBOL(__swizzle_addr_b);
#endif

void __init txx9_physmap_flash_init(int no, unsigned long addr,
				    unsigned long size,
				    const struct physmap_flash_data *pdata)
{
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
	struct resource res = {
		.start = addr,
		.end = addr + size - 1,
		.flags = IORESOURCE_MEM,
	};
	struct platform_device *pdev;
#ifdef CONFIG_MTD_PARTITIONS
	static struct mtd_partition parts[2];
	struct physmap_flash_data pdata_part;

	/* If this area contained boot area, make separate partition */
	if (pdata->nr_parts == 0 && !pdata->parts &&
	    addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
	    !parts[0].name) {
		parts[0].name = "boot";
		parts[0].offset = 0x1fc00000 - addr;
		parts[0].size = addr + size - 0x1fc00000;
		parts[1].name = "user";
		parts[1].offset = 0;
		parts[1].size = 0x1fc00000 - addr;
		pdata_part = *pdata;
		pdata_part.nr_parts = ARRAY_SIZE(parts);
		pdata_part.parts = parts;
		pdata = &pdata_part;
	}
#endif
	pdev = platform_device_alloc("physmap-flash", no);
	if (!pdev ||
	    platform_device_add_resources(pdev, &res, 1) ||
	    platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
	    platform_device_add(pdev))
		platform_device_put(pdev);
#endif
}

#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
static DEFINE_SPINLOCK(txx9_iocled_lock);

#define TXX9_IOCLED_MAXLEDS 8

struct txx9_iocled_data {
	struct gpio_chip chip;
	u8 cur_val;
	void __iomem *mmioaddr;
	struct gpio_led_platform_data pdata;
	struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
	char names[TXX9_IOCLED_MAXLEDS][32];
};

static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
{
	struct txx9_iocled_data *data =
		container_of(chip, struct txx9_iocled_data, chip);
	return data->cur_val & (1 << offset);
}

static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
			    int value)
{
	struct txx9_iocled_data *data =
		container_of(chip, struct txx9_iocled_data, chip);
	unsigned long flags;
	spin_lock_irqsave(&txx9_iocled_lock, flags);
	if (value)
		data->cur_val |= 1 << offset;
	else
		data->cur_val &= ~(1 << offset);
	writeb(data->cur_val, data->mmioaddr);
	mmiowb();
	spin_unlock_irqrestore(&txx9_iocled_lock, flags);
}

static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
{
	return 0;
}

static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
			       int value)
{
	txx9_iocled_set(chip, offset, value);
	return 0;
}

void __init txx9_iocled_init(unsigned long baseaddr,
			     int basenum, unsigned int num, int lowactive,
			     const char *color, char **deftriggers)
{
	struct txx9_iocled_data *iocled;
	struct platform_device *pdev;
	int i;
	static char *default_triggers[] __initdata = {
		"heartbeat",
		"ide-disk",
		"nand-disk",
		NULL,
	};

	if (!deftriggers)
		deftriggers = default_triggers;
	iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
	if (!iocled)
		return;
	iocled->mmioaddr = ioremap(baseaddr, 1);
	if (!iocled->mmioaddr)
		return;
	iocled->chip.get = txx9_iocled_get;
	iocled->chip.set = txx9_iocled_set;
	iocled->chip.direction_input = txx9_iocled_dir_in;
	iocled->chip.direction_output = txx9_iocled_dir_out;
	iocled->chip.label = "iocled";
	iocled->chip.base = basenum;
	iocled->chip.ngpio = num;
	if (gpiochip_add(&iocled->chip))
		return;
	if (basenum < 0)
		basenum = iocled->chip.base;

	pdev = platform_device_alloc("leds-gpio", basenum);
	if (!pdev)
		return;
	iocled->pdata.num_leds = num;
	iocled->pdata.leds = iocled->leds;
	for (i = 0; i < num; i++) {
		struct gpio_led *led = &iocled->leds[i];
		snprintf(iocled->names[i], sizeof(iocled->names[i]),
			 "iocled:%s:%u", color, i);
		led->name = iocled->names[i];
		led->gpio = basenum + i;
		led->active_low = lowactive;
		if (deftriggers && *deftriggers)
			led->default_trigger = *deftriggers++;
	}
	pdev->dev.platform_data = &iocled->pdata;
	if (platform_device_add(pdev))
		platform_device_put(pdev);
}
#else /* CONFIG_LEDS_GPIO */
void __init txx9_iocled_init(unsigned long baseaddr,
			     int basenum, unsigned int num, int lowactive,
			     const char *color, char **deftriggers)
{
}
#endif /* CONFIG_LEDS_GPIO */
Commit	Line	Data
89d63fe1 AN	1	/*
	2	* linux/arch/mips/txx9/generic/setup.c
	3	*
	4	* Based on linux/arch/mips/txx9/rbtx4938/setup.c,
	5	* and RBTX49xx patch from CELF patch archive.
	6	*
	7	* 2003-2005 (c) MontaVista Software, Inc.
	8	* (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
	9	*
	10	* This file is subject to the terms and conditions of the GNU General Public
	11	* License. See the file "COPYING" in the main directory of this archive
	12	* for more details.
	13	*/
	14	#include <linux/init.h>
	15	#include <linux/kernel.h>
	16	#include <linux/types.h>
edcaf1a6 AN	17	#include <linux/interrupt.h>
	18	#include <linux/string.h>
	19	#include <linux/module.h>
	20	#include <linux/clk.h>
	21	#include <linux/err.h>
e0eb7307	22	#include <linux/gpio.h>
68314725	23	#include <linux/platform_device.h>
7779a5e0	24	#include <linux/serial_core.h>
51f607c7	25	#include <linux/mtd/physmap.h>
ae027ead	26	#include <linux/leds.h>
edcaf1a6	27	#include <asm/bootinfo.h>
e0eb7307	28	#include <asm/time.h>
a49297e8	29	#include <asm/reboot.h>
d10e025f	30	#include <asm/r4kcache.h>
89d63fe1	31	#include <asm/txx9/generic.h>
07517529	32	#include <asm/txx9/pci.h>
496a3b5c	33	#include <asm/txx9tmr.h>
edcaf1a6 AN	34	#ifdef CONFIG_CPU_TX49XX
	35	#include <asm/txx9/tx4938.h>
	36	#endif
89d63fe1 AN	37
	38	/* EBUSC settings of TX4927, etc. */
	39	struct resource txx9_ce_res[8];
	40	static char txx9_ce_res_name[8][4]; /* "CEn" */
	41
	42	/* pcode, internal register */
94a4c329	43	unsigned int txx9_pcode;
89d63fe1 AN	44	char txx9_pcode_str[8];
	45	static struct resource txx9_reg_res = {
	46	.name = txx9_pcode_str,
	47	.flags = IORESOURCE_MEM,
	48	};
	49	void __init
	50	txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
	51	{
	52	int i;
	53
	54	for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
	55	sprintf(txx9_ce_res_name[i], "CE%d", i);
	56	txx9_ce_res[i].flags = IORESOURCE_MEM;
	57	txx9_ce_res[i].name = txx9_ce_res_name[i];
	58	}
	59
073828d0	60	txx9_pcode = pcode;
89d63fe1 AN	61	sprintf(txx9_pcode_str, "TX%x", pcode);
	62	if (base) {
	63	txx9_reg_res.start = base & 0xfffffffffULL;
	64	txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
	65	request_resource(&iomem_resource, &txx9_reg_res);
	66	}
	67	}
	68
	69	/* clocks */
	70	unsigned int txx9_master_clock;
	71	unsigned int txx9_cpu_clock;
	72	unsigned int txx9_gbus_clock;
edcaf1a6	73
c7b95bcb AN	74	#ifdef CONFIG_CPU_TX39XX
	75	/* don't enable by default - see errata */
	76	int txx9_ccfg_toeon __initdata;
	77	#else
94a4c329	78	int txx9_ccfg_toeon __initdata = 1;
c7b95bcb	79	#endif
edcaf1a6 AN	80
	81	/* Minimum CLK support */
	82
	83	struct clk clk_get(struct device dev, const char *id)
	84	{
	85	if (!strcmp(id, "spi-baseclk"))
94a4c329	86	return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4);
edcaf1a6	87	if (!strcmp(id, "imbus_clk"))
94a4c329	88	return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
edcaf1a6 AN	89	return ERR_PTR(-ENOENT);
	90	}
	91	EXPORT_SYMBOL(clk_get);
	92
	93	int clk_enable(struct clk *clk)
	94	{
	95	return 0;
	96	}
	97	EXPORT_SYMBOL(clk_enable);
	98
	99	void clk_disable(struct clk *clk)
	100	{
	101	}
	102	EXPORT_SYMBOL(clk_disable);
	103
	104	unsigned long clk_get_rate(struct clk *clk)
	105	{
	106	return (unsigned long)clk;
	107	}
	108	EXPORT_SYMBOL(clk_get_rate);
	109
	110	void clk_put(struct clk *clk)
	111	{
	112	}
	113	EXPORT_SYMBOL(clk_put);
	114
8d795f2a AN	115	/* GPIO support */
	116
	117	#ifdef CONFIG_GENERIC_GPIO
	118	int gpio_to_irq(unsigned gpio)
	119	{
	120	return -EINVAL;
	121	}
	122	EXPORT_SYMBOL(gpio_to_irq);
	123
	124	int irq_to_gpio(unsigned irq)
	125	{
	126	return -EINVAL;
	127	}
	128	EXPORT_SYMBOL(irq_to_gpio);
	129	#endif
	130
860e546c AN	131	#define BOARD_VEC(board) extern struct txx9_board_vec board;
	132	#include <asm/txx9/boards.h>
	133	#undef BOARD_VEC
edcaf1a6	134
edcaf1a6 AN	135	struct txx9_board_vec *txx9_board_vec __initdata;
	136	static char txx9_system_type[32];
	137
860e546c AN	138	static struct txx9_board_vec *board_vecs[] __initdata = {
	139	#define BOARD_VEC(board) &board,
	140	#include <asm/txx9/boards.h>
	141	#undef BOARD_VEC
	142	};
	143
	144	static struct txx9_board_vec __init find_board_byname(const char name)
	145	{
	146	int i;
	147
	148	/* search board_vecs table */
	149	for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
	150	if (strstr(board_vecs[i]->system, name))
	151	return board_vecs[i];
	152	}
	153	return NULL;
	154	}
	155
e0dfb20c	156	static void __init prom_init_cmdline(void)
edcaf1a6 AN	157	{
edcaf1a6 AN	158	int argc = (int)fw_arg0;
e0dfb20c	159	int argv32 = (int )fw_arg1;
edcaf1a6	160	int i; /* Always ignore the "-c" at argv[0] */
e0dfb20c	161	char builtin[CL_SIZE];
edcaf1a6 AN	162
edcaf1a6 AN	163	/* ignore all built-in args if any f/w args given */
e0dfb20c AN	164	/*
	165	* But if built-in strings was started with '+', append them
	166	* to command line args. If built-in was started with '-',
	167	* ignore all f/w args.
	168	*/
	169	builtin[0] = '\0';
	170	if (arcs_cmdline[0] == '+')
	171	strcpy(builtin, arcs_cmdline + 1);
	172	else if (arcs_cmdline[0] == '-') {
	173	strcpy(builtin, arcs_cmdline + 1);
	174	argc = 0;
	175	} else if (argc <= 1)
	176	strcpy(builtin, arcs_cmdline);
	177	arcs_cmdline[0] = '\0';
edcaf1a6 AN	178
edcaf1a6 AN	179	for (i = 1; i < argc; i++) {
e0dfb20c	180	char str = (char )(long)argv32[i];
edcaf1a6 AN	181	if (i != 1)
edcaf1a6 AN	182	strcat(arcs_cmdline, " ");
e0dfb20c AN	183	if (strchr(str, ' ')) {
	184	strcat(arcs_cmdline, "\"");
	185	strcat(arcs_cmdline, str);
	186	strcat(arcs_cmdline, "\"");
	187	} else
	188	strcat(arcs_cmdline, str);
	189	}
	190	/* append saved builtin args */
	191	if (builtin[0]) {
	192	if (arcs_cmdline[0])
	193	strcat(arcs_cmdline, " ");
	194	strcat(arcs_cmdline, builtin);
edcaf1a6 AN	195	}
	196	}
	197
d10e025f AN	198	static int txx9_ic_disable __initdata;
	199	static int txx9_dc_disable __initdata;
	200
	201	#if defined(CONFIG_CPU_TX49XX)
	202	/* flush all cache on very early stage (before 4k_cache_init) */
	203	static void __init early_flush_dcache(void)
	204	{
	205	unsigned int conf = read_c0_config();
	206	unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
	207	unsigned int linesz = 32;
	208	unsigned long addr, end;
	209
	210	end = INDEX_BASE + dc_size / 4;
	211	/* 4way, waybit=0 */
	212	for (addr = INDEX_BASE; addr < end; addr += linesz) {
	213	cache_op(Index_Writeback_Inv_D, addr \| 0);
	214	cache_op(Index_Writeback_Inv_D, addr \| 1);
	215	cache_op(Index_Writeback_Inv_D, addr \| 2);
	216	cache_op(Index_Writeback_Inv_D, addr \| 3);
	217	}
	218	}
	219
	220	static void __init txx9_cache_fixup(void)
	221	{
	222	unsigned int conf;
	223
	224	conf = read_c0_config();
	225	/* flush and disable */
	226	if (txx9_ic_disable) {
	227	conf \|= TX49_CONF_IC;
	228	write_c0_config(conf);
	229	}
	230	if (txx9_dc_disable) {
	231	early_flush_dcache();
	232	conf \|= TX49_CONF_DC;
	233	write_c0_config(conf);
	234	}
	235
	236	/* enable cache */
	237	conf = read_c0_config();
	238	if (!txx9_ic_disable)
	239	conf &= ~TX49_CONF_IC;
	240	if (!txx9_dc_disable)
	241	conf &= ~TX49_CONF_DC;
	242	write_c0_config(conf);
	243
	244	if (conf & TX49_CONF_IC)
	245	pr_info("TX49XX I-Cache disabled.\n");
	246	if (conf & TX49_CONF_DC)
	247	pr_info("TX49XX D-Cache disabled.\n");
	248	}
	249	#elif defined(CONFIG_CPU_TX39XX)
	250	/* flush all cache on very early stage (before tx39_cache_init) */
	251	static void __init early_flush_dcache(void)
	252	{
	253	unsigned int conf = read_c0_config();
	254	unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
	255	TX39_CONF_DCS_SHIFT));
	256	unsigned int linesz = 16;
	257	unsigned long addr, end;
	258
	259	end = INDEX_BASE + dc_size / 2;
	260	/* 2way, waybit=0 */
	261	for (addr = INDEX_BASE; addr < end; addr += linesz) {
262	cache_op(Index_Writeback_Inv_D, addr \| 0);
263	cache_op(Index_Writeback_Inv_D, addr \| 1);
264	}
265	}
266
267	static void __init txx9_cache_fixup(void)
268	{
269	unsigned int conf;
270
271	conf = read_c0_config();
272	/* flush and disable */
273	if (txx9_ic_disable) {
274	conf &= ~TX39_CONF_ICE;
275	write_c0_config(conf);
276	}
277	if (txx9_dc_disable) {
278	early_flush_dcache();
279	conf &= ~TX39_CONF_DCE;
280	write_c0_config(conf);
281	}
282
283	/* enable cache */
284	conf = read_c0_config();
285	if (!txx9_ic_disable)
286	conf \|= TX39_CONF_ICE;
287	if (!txx9_dc_disable)
288	conf \|= TX39_CONF_DCE;
289	write_c0_config(conf);
290
291	if (!(conf & TX39_CONF_ICE))
292	pr_info("TX39XX I-Cache disabled.\n");
293	if (!(conf & TX39_CONF_DCE))
294	pr_info("TX39XX D-Cache disabled.\n");
295	}
296	#else
297	static inline void txx9_cache_fixup(void)
298	{
299	}
300	#endif
301
860e546c	302	static void __init preprocess_cmdline(void)
edcaf1a6	303	{
860e546c AN	304	char cmdline[CL_SIZE];
	305	char *s;
	306
	307	strcpy(cmdline, arcs_cmdline);
	308	s = cmdline;
	309	arcs_cmdline[0] = '\0';
	310	while (s && *s) {
	311	char *str = strsep(&s, " ");
	312	if (strncmp(str, "board=", 6) == 0) {
	313	txx9_board_vec = find_board_byname(str + 6);
	314	continue;
	315	} else if (strncmp(str, "masterclk=", 10) == 0) {
	316	unsigned long val;
	317	if (strict_strtoul(str + 10, 10, &val) == 0)
	318	txx9_master_clock = val;
	319	continue;
d10e025f AN	320	} else if (strcmp(str, "icdisable") == 0) {
	321	txx9_ic_disable = 1;
	322	continue;
	323	} else if (strcmp(str, "dcdisable") == 0) {
	324	txx9_dc_disable = 1;
	325	continue;
c7b95bcb AN	326	} else if (strcmp(str, "toeoff") == 0) {
	327	txx9_ccfg_toeon = 0;
	328	continue;
	329	} else if (strcmp(str, "toeon") == 0) {
	330	txx9_ccfg_toeon = 1;
	331	continue;
860e546c AN	332	}
	333	if (arcs_cmdline[0])
	334	strcat(arcs_cmdline, " ");
	335	strcat(arcs_cmdline, str);
	336	}
d10e025f AN	337
d10e025f AN	338	txx9_cache_fixup();
860e546c AN	339	}
	340
	341	static void __init select_board(void)
	342	{
	343	const char *envstr;
	344
	345	/* first, determine by "board=" argument in preprocess_cmdline() */
	346	if (txx9_board_vec)
	347	return;
	348	/* next, determine by "board" envvar */
	349	envstr = prom_getenv("board");
	350	if (envstr) {
	351	txx9_board_vec = find_board_byname(envstr);
	352	if (txx9_board_vec)
	353	return;
	354	}
	355
	356	/* select "default" board */
edcaf1a6	357	#ifdef CONFIG_CPU_TX39XX
7a1fdf19	358	txx9_board_vec = &jmr3927_vec;
edcaf1a6 AN	359	#endif
	360	#ifdef CONFIG_CPU_TX49XX
	361	switch (TX4938_REV_PCODE()) {
8d795f2a	362	#ifdef CONFIG_TOSHIBA_RBTX4927
edcaf1a6	363	case 0x4927:
7a1fdf19	364	txx9_board_vec = &rbtx4927_vec;
edcaf1a6 AN	365	break;
edcaf1a6 AN	366	case 0x4937:
7a1fdf19	367	txx9_board_vec = &rbtx4937_vec;
edcaf1a6	368	break;
8d795f2a AN	369	#endif
8d795f2a AN	370	#ifdef CONFIG_TOSHIBA_RBTX4938
edcaf1a6	371	case 0x4938:
7a1fdf19	372	txx9_board_vec = &rbtx4938_vec;
edcaf1a6	373	break;
8d795f2a	374	#endif
edcaf1a6 AN	375	}
edcaf1a6 AN	376	#endif
860e546c AN	377	}
	378
	379	void __init prom_init(void)
	380	{
	381	prom_init_cmdline();
	382	preprocess_cmdline();
	383	select_board();
7a1fdf19 YY	384
	385	strcpy(txx9_system_type, txx9_board_vec->system);
	386
7b226094	387	txx9_board_vec->prom_init();
edcaf1a6 AN	388	}
	389
	390	void __init prom_free_prom_memory(void)
	391	{
	392	}
	393
	394	const char *get_system_type(void)
	395	{
	396	return txx9_system_type;
	397	}
	398
	399	char * __init prom_getcmdline(void)
	400	{
	401	return &(arcs_cmdline[0]);
	402	}
	403
265b89db AN	404	const char __init prom_getenv(const char name)
	405	{
	406	const s32 str = (const s32 )fw_arg2;
	407
	408	if (!str)
	409	return NULL;
	410	/* YAMON style ("name", "value" pairs) */
	411	while (str[0] && str[1]) {
	412	if (!strcmp((const char *)(unsigned long)str[0], name))
	413	return (const char *)(unsigned long)str[1];
	414	str += 2;
	415	}
	416	return NULL;
	417	}
	418
a49297e8 AN	419	static void __noreturn txx9_machine_halt(void)
	420	{
	421	local_irq_disable();
	422	clear_c0_status(ST0_IM);
	423	while (1) {
	424	if (cpu_wait) {
	425	(*cpu_wait)();
	426	if (cpu_has_counter) {
	427	/*
	428	* Clear counter interrupt while it
	429	* breaks WAIT instruction even if
	430	* masked.
	431	*/
	432	write_c0_compare(0);
	433	}
	434	}
	435	}
	436	}
	437
68314725 AN	438	/* Watchdog support */
	439	void __init txx9_wdt_init(unsigned long base)
	440	{
	441	struct resource res = {
	442	.start = base,
	443	.end = base + 0x100 - 1,
	444	.flags = IORESOURCE_MEM,
	445	};
	446	platform_device_register_simple("txx9wdt", -1, &res, 1);
	447	}
	448
496a3b5c AN	449	void txx9_wdt_now(unsigned long base)
	450	{
	451	struct txx9_tmr_reg __iomem *tmrptr =
	452	ioremap(base, sizeof(struct txx9_tmr_reg));
	453	/* disable watch dog timer */
	454	__raw_writel(TXx9_TMWTMR_WDIS \| TXx9_TMWTMR_TWC, &tmrptr->wtmr);
	455	__raw_writel(0, &tmrptr->tcr);
	456	/* kick watchdog */
	457	__raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
	458	__raw_writel(1, &tmrptr->cpra); /* immediate */
	459	__raw_writel(TXx9_TMTCR_TCE \| TXx9_TMTCR_CCDE \| TXx9_TMTCR_TMODE_WDOG,
	460	&tmrptr->tcr);
	461	}
	462
c49f91f5 AN	463	/* SPI support */
	464	void __init txx9_spi_init(int busid, unsigned long base, int irq)
	465	{
	466	struct resource res[] = {
	467	{
	468	.start = base,
	469	.end = base + 0x20 - 1,
	470	.flags = IORESOURCE_MEM,
	471	}, {
	472	.start = irq,
	473	.flags = IORESOURCE_IRQ,
	474	},
	475	};
	476	platform_device_register_simple("spi_txx9", busid,
	477	res, ARRAY_SIZE(res));
	478	}
	479
	480	void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
	481	{
	482	struct platform_device *pdev =
	483	platform_device_alloc("tc35815-mac", id);
	484	if (!pdev \|\|
	485	platform_device_add_data(pdev, ethaddr, 6) \|\|
	486	platform_device_add(pdev))
	487	platform_device_put(pdev);
	488	}
	489
7779a5e0 AN	490	void __init txx9_sio_init(unsigned long baseaddr, int irq,
	491	unsigned int line, unsigned int sclk, int nocts)
	492	{
	493	#ifdef CONFIG_SERIAL_TXX9
	494	struct uart_port req;
	495
	496	memset(&req, 0, sizeof(req));
	497	req.line = line;
	498	req.iotype = UPIO_MEM;
	499	req.membase = ioremap(baseaddr, 0x24);
	500	req.mapbase = baseaddr;
	501	req.irq = irq;
	502	if (!nocts)
	503	req.flags \|= UPF_BUGGY_UART /HAVE_CTS_LINE/;
	504	if (sclk) {
	505	req.flags \|= UPF_MAGIC_MULTIPLIER /USE_SCLK/;
	506	req.uartclk = sclk;
	507	} else
	508	req.uartclk = TXX9_IMCLK;
	509	early_serial_txx9_setup(&req);
	510	#endif /* CONFIG_SERIAL_TXX9 */
	511	}
	512
e352953c AN	513	#ifdef CONFIG_EARLY_PRINTK
	514	static void __init null_prom_putchar(char c)
	515	{
	516	}
	517	void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
	518
	519	void __init prom_putchar(char c)
	520	{
	521	txx9_prom_putchar(c);
	522	}
	523
	524	static void __iomem *early_txx9_sio_port;
	525
	526	static void __init early_txx9_sio_putchar(char c)
	527	{
	528	#define TXX9_SICISR 0x0c
	529	#define TXX9_SITFIFO 0x1c
	530	#define TXX9_SICISR_TXALS 0x00000002
	531	while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
	532	TXX9_SICISR_TXALS))
	533	;
	534	__raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
	535	}
	536
	537	void __init txx9_sio_putchar_init(unsigned long baseaddr)
	538	{
	539	early_txx9_sio_port = ioremap(baseaddr, 0x24);
	540	txx9_prom_putchar = early_txx9_sio_putchar;
	541	}
	542	#endif /* CONFIG_EARLY_PRINTK */
	543
edcaf1a6 AN	544	/* wrappers */
	545	void __init plat_mem_setup(void)
	546	{
94a4c329 AN	547	ioport_resource.start = 0;
	548	ioport_resource.end = ~0UL; /* no limit */
	549	iomem_resource.start = 0;
	550	iomem_resource.end = ~0UL; /* no limit */
a49297e8 AN	551
	552	/* fallback restart/halt routines */
	553	_machine_restart = (void ()(char ))txx9_machine_halt;
	554	_machine_halt = txx9_machine_halt;
	555	pm_power_off = txx9_machine_halt;
	556
07517529 AN	557	#ifdef CONFIG_PCI
	558	pcibios_plat_setup = txx9_pcibios_setup;
	559	#endif
edcaf1a6 AN	560	txx9_board_vec->mem_setup();
	561	}
	562
	563	void __init arch_init_irq(void)
	564	{
	565	txx9_board_vec->irq_setup();
	566	}
	567
	568	void __init plat_time_init(void)
	569	{
1374d084 AN	570	#ifdef CONFIG_CPU_TX49XX
	571	mips_hpt_frequency = txx9_cpu_clock / 2;
	572	#endif
edcaf1a6 AN	573	txx9_board_vec->time_init();
	574	}
	575
	576	static int __init _txx9_arch_init(void)
	577	{
	578	if (txx9_board_vec->arch_init)
	579	txx9_board_vec->arch_init();
	580	return 0;
	581	}
	582	arch_initcall(_txx9_arch_init);
	583
	584	static int __init _txx9_device_init(void)
	585	{
	586	if (txx9_board_vec->device_init)
	587	txx9_board_vec->device_init();
	588	return 0;
	589	}
	590	device_initcall(_txx9_device_init);
	591
	592	int (*txx9_irq_dispatch)(int pending);
	593	asmlinkage void plat_irq_dispatch(void)
	594	{
	595	int pending = read_c0_status() & read_c0_cause() & ST0_IM;
	596	int irq = txx9_irq_dispatch(pending);
	597
	598	if (likely(irq >= 0))
	599	do_IRQ(irq);
	600	else
	601	spurious_interrupt();
	602	}
4c642f3f AN	603
	604	/* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
	605	#ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
	606	static unsigned long __swizzle_addr_none(unsigned long port)
	607	{
	608	return port;
	609	}
	610	unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
	611	EXPORT_SYMBOL(__swizzle_addr_b);
	612	#endif
51f607c7 AN	613
	614	void __init txx9_physmap_flash_init(int no, unsigned long addr,
	615	unsigned long size,
	616	const struct physmap_flash_data *pdata)
	617	{
	618	#if defined(CONFIG_MTD_PHYSMAP) \|\| defined(CONFIG_MTD_PHYSMAP_MODULE)
	619	struct resource res = {
	620	.start = addr,
	621	.end = addr + size - 1,
	622	.flags = IORESOURCE_MEM,
	623	};
	624	struct platform_device *pdev;
	625	#ifdef CONFIG_MTD_PARTITIONS
	626	static struct mtd_partition parts[2];
	627	struct physmap_flash_data pdata_part;
	628
	629	/* If this area contained boot area, make separate partition */
	630	if (pdata->nr_parts == 0 && !pdata->parts &&
	631	addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
	632	!parts[0].name) {
	633	parts[0].name = "boot";
	634	parts[0].offset = 0x1fc00000 - addr;
	635	parts[0].size = addr + size - 0x1fc00000;
	636	parts[1].name = "user";
	637	parts[1].offset = 0;
	638	parts[1].size = 0x1fc00000 - addr;
	639	pdata_part = *pdata;
	640	pdata_part.nr_parts = ARRAY_SIZE(parts);
	641	pdata_part.parts = parts;
	642	pdata = &pdata_part;
	643	}
	644	#endif
	645	pdev = platform_device_alloc("physmap-flash", no);
	646	if (!pdev \|\|
	647	platform_device_add_resources(pdev, &res, 1) \|\|
	648	platform_device_add_data(pdev, pdata, sizeof(*pdata)) \|\|
	649	platform_device_add(pdev))
	650	platform_device_put(pdev);
	651	#endif
	652	}
ae027ead AN	653
	654	#if defined(CONFIG_LEDS_GPIO) \|\| defined(CONFIG_LEDS_GPIO_MODULE)
	655	static DEFINE_SPINLOCK(txx9_iocled_lock);
	656
	657	#define TXX9_IOCLED_MAXLEDS 8
	658
	659	struct txx9_iocled_data {
	660	struct gpio_chip chip;
	661	u8 cur_val;
	662	void __iomem *mmioaddr;
	663	struct gpio_led_platform_data pdata;
	664	struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
	665	char names[TXX9_IOCLED_MAXLEDS][32];
	666	};
	667
	668	static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
	669	{
	670	struct txx9_iocled_data *data =
	671	container_of(chip, struct txx9_iocled_data, chip);
	672	return data->cur_val & (1 << offset);
	673	}
	674
	675	static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
	676	int value)
	677	{
	678	struct txx9_iocled_data *data =
	679	container_of(chip, struct txx9_iocled_data, chip);
	680	unsigned long flags;
	681	spin_lock_irqsave(&txx9_iocled_lock, flags);
	682	if (value)
	683	data->cur_val \|= 1 << offset;
	684	else
	685	data->cur_val &= ~(1 << offset);
	686	writeb(data->cur_val, data->mmioaddr);
	687	mmiowb();
	688	spin_unlock_irqrestore(&txx9_iocled_lock, flags);
	689	}
	690
	691	static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
	692	{
	693	return 0;
	694	}
	695
	696	static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
	697	int value)
	698	{
	699	txx9_iocled_set(chip, offset, value);
	700	return 0;
	701	}
	702
	703	void __init txx9_iocled_init(unsigned long baseaddr,
	704	int basenum, unsigned int num, int lowactive,
	705	const char color, char *deftriggers)
	706	{
	707	struct txx9_iocled_data *iocled;
	708	struct platform_device *pdev;
	709	int i;
	710	static char *default_triggers[] __initdata = {
	711	"heartbeat",
	712	"ide-disk",
	713	"nand-disk",
	714	NULL,
	715	};
	716
717	if (!deftriggers)
718	deftriggers = default_triggers;
719	iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
720	if (!iocled)
721	return;
722	iocled->mmioaddr = ioremap(baseaddr, 1);
723	if (!iocled->mmioaddr)
724	return;
725	iocled->chip.get = txx9_iocled_get;
726	iocled->chip.set = txx9_iocled_set;
727	iocled->chip.direction_input = txx9_iocled_dir_in;
728	iocled->chip.direction_output = txx9_iocled_dir_out;
729	iocled->chip.label = "iocled";
730	iocled->chip.base = basenum;
731	iocled->chip.ngpio = num;
732	if (gpiochip_add(&iocled->chip))
733	return;
734	if (basenum < 0)
735	basenum = iocled->chip.base;
736
737	pdev = platform_device_alloc("leds-gpio", basenum);
738	if (!pdev)
739	return;
740	iocled->pdata.num_leds = num;
741	iocled->pdata.leds = iocled->leds;
742	for (i = 0; i < num; i++) {
743	struct gpio_led *led = &iocled->leds[i];
744	snprintf(iocled->names[i], sizeof(iocled->names[i]),
745	"iocled:%s:%u", color, i);
746	led->name = iocled->names[i];
747	led->gpio = basenum + i;
748	led->active_low = lowactive;
749	if (deftriggers && *deftriggers)
750	led->default_trigger = *deftriggers++;
751	}
752	pdev->dev.platform_data = &iocled->pdata;
753	if (platform_device_add(pdev))
754	platform_device_put(pdev);
755	}
756	#else /* CONFIG_LEDS_GPIO */
757	void __init txx9_iocled_init(unsigned long baseaddr,
758	int basenum, unsigned int num, int lowactive,
759	const char color, char *deftriggers)
760	{
761	}
762	#endif /* CONFIG_LEDS_GPIO */