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Commit | Line | Data |
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89d63fe1 | 1 | /* |
89d63fe1 AN |
2 | * Based on linux/arch/mips/txx9/rbtx4938/setup.c, |
3 | * and RBTX49xx patch from CELF patch archive. | |
4 | * | |
5 | * 2003-2005 (c) MontaVista Software, Inc. | |
6 | * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007 | |
7 | * | |
8 | * This file is subject to the terms and conditions of the GNU General Public | |
9 | * License. See the file "COPYING" in the main directory of this archive | |
10 | * for more details. | |
11 | */ | |
12 | #include <linux/init.h> | |
13 | #include <linux/kernel.h> | |
14 | #include <linux/types.h> | |
edcaf1a6 AN |
15 | #include <linux/interrupt.h> |
16 | #include <linux/string.h> | |
17 | #include <linux/module.h> | |
18 | #include <linux/clk.h> | |
19 | #include <linux/err.h> | |
e0eb7307 | 20 | #include <linux/gpio.h> |
68314725 | 21 | #include <linux/platform_device.h> |
7779a5e0 | 22 | #include <linux/serial_core.h> |
51f607c7 | 23 | #include <linux/mtd/physmap.h> |
ae027ead | 24 | #include <linux/leds.h> |
269a3eb1 | 25 | #include <linux/device.h> |
5a0e3ad6 | 26 | #include <linux/slab.h> |
ca4d3e67 | 27 | #include <linux/irq.h> |
edcaf1a6 | 28 | #include <asm/bootinfo.h> |
bdc92d74 | 29 | #include <asm/idle.h> |
e0eb7307 | 30 | #include <asm/time.h> |
a49297e8 | 31 | #include <asm/reboot.h> |
d10e025f | 32 | #include <asm/r4kcache.h> |
b6263ff2 | 33 | #include <asm/sections.h> |
89d63fe1 | 34 | #include <asm/txx9/generic.h> |
07517529 | 35 | #include <asm/txx9/pci.h> |
496a3b5c | 36 | #include <asm/txx9tmr.h> |
a591f5d3 | 37 | #include <asm/txx9/ndfmc.h> |
f48c8c95 | 38 | #include <asm/txx9/dmac.h> |
edcaf1a6 AN |
39 | #ifdef CONFIG_CPU_TX49XX |
40 | #include <asm/txx9/tx4938.h> | |
41 | #endif | |
89d63fe1 AN |
42 | |
43 | /* EBUSC settings of TX4927, etc. */ | |
44 | struct resource txx9_ce_res[8]; | |
45 | static char txx9_ce_res_name[8][4]; /* "CEn" */ | |
46 | ||
47 | /* pcode, internal register */ | |
94a4c329 | 48 | unsigned int txx9_pcode; |
89d63fe1 AN |
49 | char txx9_pcode_str[8]; |
50 | static struct resource txx9_reg_res = { | |
51 | .name = txx9_pcode_str, | |
52 | .flags = IORESOURCE_MEM, | |
53 | }; | |
54 | void __init | |
55 | txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size) | |
56 | { | |
57 | int i; | |
58 | ||
59 | for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) { | |
60 | sprintf(txx9_ce_res_name[i], "CE%d", i); | |
61 | txx9_ce_res[i].flags = IORESOURCE_MEM; | |
62 | txx9_ce_res[i].name = txx9_ce_res_name[i]; | |
63 | } | |
64 | ||
073828d0 | 65 | txx9_pcode = pcode; |
89d63fe1 AN |
66 | sprintf(txx9_pcode_str, "TX%x", pcode); |
67 | if (base) { | |
68 | txx9_reg_res.start = base & 0xfffffffffULL; | |
69 | txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1); | |
70 | request_resource(&iomem_resource, &txx9_reg_res); | |
71 | } | |
72 | } | |
73 | ||
74 | /* clocks */ | |
75 | unsigned int txx9_master_clock; | |
76 | unsigned int txx9_cpu_clock; | |
77 | unsigned int txx9_gbus_clock; | |
edcaf1a6 | 78 | |
c7b95bcb AN |
79 | #ifdef CONFIG_CPU_TX39XX |
80 | /* don't enable by default - see errata */ | |
81 | int txx9_ccfg_toeon __initdata; | |
82 | #else | |
94a4c329 | 83 | int txx9_ccfg_toeon __initdata = 1; |
c7b95bcb | 84 | #endif |
edcaf1a6 AN |
85 | |
86 | /* Minimum CLK support */ | |
87 | ||
88 | struct clk *clk_get(struct device *dev, const char *id) | |
89 | { | |
90 | if (!strcmp(id, "spi-baseclk")) | |
fcc152f3 | 91 | return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 2); |
edcaf1a6 | 92 | if (!strcmp(id, "imbus_clk")) |
94a4c329 | 93 | return (struct clk *)((unsigned long)txx9_gbus_clock / 2); |
edcaf1a6 AN |
94 | return ERR_PTR(-ENOENT); |
95 | } | |
96 | EXPORT_SYMBOL(clk_get); | |
97 | ||
98 | int clk_enable(struct clk *clk) | |
99 | { | |
100 | return 0; | |
101 | } | |
102 | EXPORT_SYMBOL(clk_enable); | |
103 | ||
104 | void clk_disable(struct clk *clk) | |
105 | { | |
106 | } | |
107 | EXPORT_SYMBOL(clk_disable); | |
108 | ||
109 | unsigned long clk_get_rate(struct clk *clk) | |
110 | { | |
111 | return (unsigned long)clk; | |
112 | } | |
113 | EXPORT_SYMBOL(clk_get_rate); | |
114 | ||
115 | void clk_put(struct clk *clk) | |
116 | { | |
117 | } | |
118 | EXPORT_SYMBOL(clk_put); | |
119 | ||
8d795f2a AN |
120 | /* GPIO support */ |
121 | ||
f9612a65 | 122 | #ifdef CONFIG_GPIOLIB |
8d795f2a AN |
123 | int gpio_to_irq(unsigned gpio) |
124 | { | |
125 | return -EINVAL; | |
126 | } | |
127 | EXPORT_SYMBOL(gpio_to_irq); | |
128 | ||
129 | int irq_to_gpio(unsigned irq) | |
130 | { | |
131 | return -EINVAL; | |
132 | } | |
133 | EXPORT_SYMBOL(irq_to_gpio); | |
134 | #endif | |
135 | ||
860e546c AN |
136 | #define BOARD_VEC(board) extern struct txx9_board_vec board; |
137 | #include <asm/txx9/boards.h> | |
138 | #undef BOARD_VEC | |
edcaf1a6 | 139 | |
edcaf1a6 AN |
140 | struct txx9_board_vec *txx9_board_vec __initdata; |
141 | static char txx9_system_type[32]; | |
142 | ||
860e546c AN |
143 | static struct txx9_board_vec *board_vecs[] __initdata = { |
144 | #define BOARD_VEC(board) &board, | |
145 | #include <asm/txx9/boards.h> | |
146 | #undef BOARD_VEC | |
147 | }; | |
148 | ||
149 | static struct txx9_board_vec *__init find_board_byname(const char *name) | |
150 | { | |
151 | int i; | |
152 | ||
153 | /* search board_vecs table */ | |
154 | for (i = 0; i < ARRAY_SIZE(board_vecs); i++) { | |
155 | if (strstr(board_vecs[i]->system, name)) | |
156 | return board_vecs[i]; | |
157 | } | |
158 | return NULL; | |
159 | } | |
160 | ||
e0dfb20c | 161 | static void __init prom_init_cmdline(void) |
edcaf1a6 | 162 | { |
97b0511c GU |
163 | int argc; |
164 | int *argv32; | |
edcaf1a6 AN |
165 | int i; /* Always ignore the "-c" at argv[0] */ |
166 | ||
97b0511c GU |
167 | if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) { |
168 | /* | |
169 | * argc is not a valid number, or argv32 is not a valid | |
170 | * pointer | |
171 | */ | |
172 | argc = 0; | |
173 | argv32 = NULL; | |
174 | } else { | |
175 | argc = (int)fw_arg0; | |
176 | argv32 = (int *)fw_arg1; | |
177 | } | |
178 | ||
e0dfb20c | 179 | arcs_cmdline[0] = '\0'; |
edcaf1a6 AN |
180 | |
181 | for (i = 1; i < argc; i++) { | |
e0dfb20c | 182 | char *str = (char *)(long)argv32[i]; |
edcaf1a6 AN |
183 | if (i != 1) |
184 | strcat(arcs_cmdline, " "); | |
e0dfb20c AN |
185 | if (strchr(str, ' ')) { |
186 | strcat(arcs_cmdline, "\""); | |
187 | strcat(arcs_cmdline, str); | |
188 | strcat(arcs_cmdline, "\""); | |
189 | } else | |
190 | strcat(arcs_cmdline, str); | |
191 | } | |
edcaf1a6 AN |
192 | } |
193 | ||
d10e025f AN |
194 | static int txx9_ic_disable __initdata; |
195 | static int txx9_dc_disable __initdata; | |
196 | ||
197 | #if defined(CONFIG_CPU_TX49XX) | |
198 | /* flush all cache on very early stage (before 4k_cache_init) */ | |
199 | static void __init early_flush_dcache(void) | |
200 | { | |
201 | unsigned int conf = read_c0_config(); | |
202 | unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6)); | |
203 | unsigned int linesz = 32; | |
204 | unsigned long addr, end; | |
205 | ||
206 | end = INDEX_BASE + dc_size / 4; | |
207 | /* 4way, waybit=0 */ | |
208 | for (addr = INDEX_BASE; addr < end; addr += linesz) { | |
209 | cache_op(Index_Writeback_Inv_D, addr | 0); | |
210 | cache_op(Index_Writeback_Inv_D, addr | 1); | |
211 | cache_op(Index_Writeback_Inv_D, addr | 2); | |
212 | cache_op(Index_Writeback_Inv_D, addr | 3); | |
213 | } | |
214 | } | |
215 | ||
216 | static void __init txx9_cache_fixup(void) | |
217 | { | |
218 | unsigned int conf; | |
219 | ||
220 | conf = read_c0_config(); | |
221 | /* flush and disable */ | |
222 | if (txx9_ic_disable) { | |
223 | conf |= TX49_CONF_IC; | |
224 | write_c0_config(conf); | |
225 | } | |
226 | if (txx9_dc_disable) { | |
227 | early_flush_dcache(); | |
228 | conf |= TX49_CONF_DC; | |
229 | write_c0_config(conf); | |
230 | } | |
231 | ||
232 | /* enable cache */ | |
233 | conf = read_c0_config(); | |
234 | if (!txx9_ic_disable) | |
235 | conf &= ~TX49_CONF_IC; | |
236 | if (!txx9_dc_disable) | |
237 | conf &= ~TX49_CONF_DC; | |
238 | write_c0_config(conf); | |
239 | ||
240 | if (conf & TX49_CONF_IC) | |
241 | pr_info("TX49XX I-Cache disabled.\n"); | |
242 | if (conf & TX49_CONF_DC) | |
243 | pr_info("TX49XX D-Cache disabled.\n"); | |
244 | } | |
245 | #elif defined(CONFIG_CPU_TX39XX) | |
246 | /* flush all cache on very early stage (before tx39_cache_init) */ | |
247 | static void __init early_flush_dcache(void) | |
248 | { | |
249 | unsigned int conf = read_c0_config(); | |
250 | unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >> | |
251 | TX39_CONF_DCS_SHIFT)); | |
252 | unsigned int linesz = 16; | |
253 | unsigned long addr, end; | |
254 | ||
255 | end = INDEX_BASE + dc_size / 2; | |
256 | /* 2way, waybit=0 */ | |
257 | for (addr = INDEX_BASE; addr < end; addr += linesz) { | |
258 | cache_op(Index_Writeback_Inv_D, addr | 0); | |
259 | cache_op(Index_Writeback_Inv_D, addr | 1); | |
260 | } | |
261 | } | |
262 | ||
263 | static void __init txx9_cache_fixup(void) | |
264 | { | |
265 | unsigned int conf; | |
266 | ||
267 | conf = read_c0_config(); | |
268 | /* flush and disable */ | |
269 | if (txx9_ic_disable) { | |
270 | conf &= ~TX39_CONF_ICE; | |
271 | write_c0_config(conf); | |
272 | } | |
273 | if (txx9_dc_disable) { | |
274 | early_flush_dcache(); | |
275 | conf &= ~TX39_CONF_DCE; | |
276 | write_c0_config(conf); | |
277 | } | |
278 | ||
279 | /* enable cache */ | |
280 | conf = read_c0_config(); | |
281 | if (!txx9_ic_disable) | |
282 | conf |= TX39_CONF_ICE; | |
283 | if (!txx9_dc_disable) | |
284 | conf |= TX39_CONF_DCE; | |
285 | write_c0_config(conf); | |
286 | ||
287 | if (!(conf & TX39_CONF_ICE)) | |
288 | pr_info("TX39XX I-Cache disabled.\n"); | |
289 | if (!(conf & TX39_CONF_DCE)) | |
290 | pr_info("TX39XX D-Cache disabled.\n"); | |
291 | } | |
292 | #else | |
293 | static inline void txx9_cache_fixup(void) | |
294 | { | |
295 | } | |
296 | #endif | |
297 | ||
860e546c | 298 | static void __init preprocess_cmdline(void) |
edcaf1a6 | 299 | { |
7580c9c3 | 300 | static char cmdline[COMMAND_LINE_SIZE] __initdata; |
860e546c AN |
301 | char *s; |
302 | ||
303 | strcpy(cmdline, arcs_cmdline); | |
304 | s = cmdline; | |
305 | arcs_cmdline[0] = '\0'; | |
306 | while (s && *s) { | |
307 | char *str = strsep(&s, " "); | |
308 | if (strncmp(str, "board=", 6) == 0) { | |
309 | txx9_board_vec = find_board_byname(str + 6); | |
310 | continue; | |
311 | } else if (strncmp(str, "masterclk=", 10) == 0) { | |
312 | unsigned long val; | |
313 | if (strict_strtoul(str + 10, 10, &val) == 0) | |
314 | txx9_master_clock = val; | |
315 | continue; | |
d10e025f AN |
316 | } else if (strcmp(str, "icdisable") == 0) { |
317 | txx9_ic_disable = 1; | |
318 | continue; | |
319 | } else if (strcmp(str, "dcdisable") == 0) { | |
320 | txx9_dc_disable = 1; | |
321 | continue; | |
c7b95bcb AN |
322 | } else if (strcmp(str, "toeoff") == 0) { |
323 | txx9_ccfg_toeon = 0; | |
324 | continue; | |
325 | } else if (strcmp(str, "toeon") == 0) { | |
326 | txx9_ccfg_toeon = 1; | |
327 | continue; | |
860e546c AN |
328 | } |
329 | if (arcs_cmdline[0]) | |
330 | strcat(arcs_cmdline, " "); | |
331 | strcat(arcs_cmdline, str); | |
332 | } | |
d10e025f AN |
333 | |
334 | txx9_cache_fixup(); | |
860e546c AN |
335 | } |
336 | ||
337 | static void __init select_board(void) | |
338 | { | |
339 | const char *envstr; | |
340 | ||
341 | /* first, determine by "board=" argument in preprocess_cmdline() */ | |
342 | if (txx9_board_vec) | |
343 | return; | |
344 | /* next, determine by "board" envvar */ | |
345 | envstr = prom_getenv("board"); | |
346 | if (envstr) { | |
347 | txx9_board_vec = find_board_byname(envstr); | |
348 | if (txx9_board_vec) | |
349 | return; | |
350 | } | |
351 | ||
352 | /* select "default" board */ | |
c8acd40d | 353 | #ifdef CONFIG_TOSHIBA_JMR3927 |
7a1fdf19 | 354 | txx9_board_vec = &jmr3927_vec; |
edcaf1a6 AN |
355 | #endif |
356 | #ifdef CONFIG_CPU_TX49XX | |
357 | switch (TX4938_REV_PCODE()) { | |
8d795f2a | 358 | #ifdef CONFIG_TOSHIBA_RBTX4927 |
edcaf1a6 | 359 | case 0x4927: |
7a1fdf19 | 360 | txx9_board_vec = &rbtx4927_vec; |
edcaf1a6 AN |
361 | break; |
362 | case 0x4937: | |
7a1fdf19 | 363 | txx9_board_vec = &rbtx4937_vec; |
edcaf1a6 | 364 | break; |
8d795f2a AN |
365 | #endif |
366 | #ifdef CONFIG_TOSHIBA_RBTX4938 | |
edcaf1a6 | 367 | case 0x4938: |
7a1fdf19 | 368 | txx9_board_vec = &rbtx4938_vec; |
edcaf1a6 | 369 | break; |
b27311e1 AN |
370 | #endif |
371 | #ifdef CONFIG_TOSHIBA_RBTX4939 | |
372 | case 0x4939: | |
373 | txx9_board_vec = &rbtx4939_vec; | |
374 | break; | |
8d795f2a | 375 | #endif |
edcaf1a6 AN |
376 | } |
377 | #endif | |
860e546c AN |
378 | } |
379 | ||
380 | void __init prom_init(void) | |
381 | { | |
382 | prom_init_cmdline(); | |
383 | preprocess_cmdline(); | |
384 | select_board(); | |
7a1fdf19 YY |
385 | |
386 | strcpy(txx9_system_type, txx9_board_vec->system); | |
387 | ||
7b226094 | 388 | txx9_board_vec->prom_init(); |
edcaf1a6 AN |
389 | } |
390 | ||
391 | void __init prom_free_prom_memory(void) | |
392 | { | |
b6263ff2 AN |
393 | unsigned long saddr = PAGE_SIZE; |
394 | unsigned long eaddr = __pa_symbol(&_text); | |
395 | ||
396 | if (saddr < eaddr) | |
397 | free_init_pages("prom memory", saddr, eaddr); | |
edcaf1a6 AN |
398 | } |
399 | ||
400 | const char *get_system_type(void) | |
401 | { | |
402 | return txx9_system_type; | |
403 | } | |
404 | ||
265b89db AN |
405 | const char *__init prom_getenv(const char *name) |
406 | { | |
97b0511c | 407 | const s32 *str; |
265b89db | 408 | |
97b0511c | 409 | if (fw_arg2 < CKSEG0) |
265b89db | 410 | return NULL; |
97b0511c GU |
411 | |
412 | str = (const s32 *)fw_arg2; | |
265b89db AN |
413 | /* YAMON style ("name", "value" pairs) */ |
414 | while (str[0] && str[1]) { | |
415 | if (!strcmp((const char *)(unsigned long)str[0], name)) | |
416 | return (const char *)(unsigned long)str[1]; | |
417 | str += 2; | |
418 | } | |
419 | return NULL; | |
420 | } | |
421 | ||
a49297e8 AN |
422 | static void __noreturn txx9_machine_halt(void) |
423 | { | |
424 | local_irq_disable(); | |
425 | clear_c0_status(ST0_IM); | |
426 | while (1) { | |
427 | if (cpu_wait) { | |
428 | (*cpu_wait)(); | |
429 | if (cpu_has_counter) { | |
430 | /* | |
431 | * Clear counter interrupt while it | |
432 | * breaks WAIT instruction even if | |
433 | * masked. | |
434 | */ | |
435 | write_c0_compare(0); | |
436 | } | |
437 | } | |
438 | } | |
439 | } | |
440 | ||
68314725 AN |
441 | /* Watchdog support */ |
442 | void __init txx9_wdt_init(unsigned long base) | |
443 | { | |
444 | struct resource res = { | |
445 | .start = base, | |
446 | .end = base + 0x100 - 1, | |
447 | .flags = IORESOURCE_MEM, | |
448 | }; | |
449 | platform_device_register_simple("txx9wdt", -1, &res, 1); | |
450 | } | |
451 | ||
496a3b5c AN |
452 | void txx9_wdt_now(unsigned long base) |
453 | { | |
454 | struct txx9_tmr_reg __iomem *tmrptr = | |
455 | ioremap(base, sizeof(struct txx9_tmr_reg)); | |
456 | /* disable watch dog timer */ | |
457 | __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr); | |
458 | __raw_writel(0, &tmrptr->tcr); | |
459 | /* kick watchdog */ | |
460 | __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr); | |
461 | __raw_writel(1, &tmrptr->cpra); /* immediate */ | |
462 | __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG, | |
463 | &tmrptr->tcr); | |
464 | } | |
465 | ||
c49f91f5 AN |
466 | /* SPI support */ |
467 | void __init txx9_spi_init(int busid, unsigned long base, int irq) | |
468 | { | |
469 | struct resource res[] = { | |
470 | { | |
471 | .start = base, | |
472 | .end = base + 0x20 - 1, | |
473 | .flags = IORESOURCE_MEM, | |
474 | }, { | |
475 | .start = irq, | |
476 | .flags = IORESOURCE_IRQ, | |
477 | }, | |
478 | }; | |
479 | platform_device_register_simple("spi_txx9", busid, | |
480 | res, ARRAY_SIZE(res)); | |
481 | } | |
482 | ||
483 | void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr) | |
484 | { | |
485 | struct platform_device *pdev = | |
486 | platform_device_alloc("tc35815-mac", id); | |
487 | if (!pdev || | |
488 | platform_device_add_data(pdev, ethaddr, 6) || | |
489 | platform_device_add(pdev)) | |
490 | platform_device_put(pdev); | |
491 | } | |
492 | ||
7779a5e0 AN |
493 | void __init txx9_sio_init(unsigned long baseaddr, int irq, |
494 | unsigned int line, unsigned int sclk, int nocts) | |
495 | { | |
496 | #ifdef CONFIG_SERIAL_TXX9 | |
497 | struct uart_port req; | |
498 | ||
499 | memset(&req, 0, sizeof(req)); | |
500 | req.line = line; | |
501 | req.iotype = UPIO_MEM; | |
502 | req.membase = ioremap(baseaddr, 0x24); | |
503 | req.mapbase = baseaddr; | |
504 | req.irq = irq; | |
505 | if (!nocts) | |
506 | req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/; | |
507 | if (sclk) { | |
508 | req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/; | |
509 | req.uartclk = sclk; | |
510 | } else | |
511 | req.uartclk = TXX9_IMCLK; | |
512 | early_serial_txx9_setup(&req); | |
513 | #endif /* CONFIG_SERIAL_TXX9 */ | |
514 | } | |
515 | ||
e352953c | 516 | #ifdef CONFIG_EARLY_PRINTK |
f7be4e75 | 517 | static void null_prom_putchar(char c) |
e352953c AN |
518 | { |
519 | } | |
f7be4e75 | 520 | void (*txx9_prom_putchar)(char c) = null_prom_putchar; |
e352953c | 521 | |
f7be4e75 | 522 | void prom_putchar(char c) |
e352953c AN |
523 | { |
524 | txx9_prom_putchar(c); | |
525 | } | |
526 | ||
527 | static void __iomem *early_txx9_sio_port; | |
528 | ||
f7be4e75 | 529 | static void early_txx9_sio_putchar(char c) |
e352953c AN |
530 | { |
531 | #define TXX9_SICISR 0x0c | |
532 | #define TXX9_SITFIFO 0x1c | |
533 | #define TXX9_SICISR_TXALS 0x00000002 | |
534 | while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) & | |
535 | TXX9_SICISR_TXALS)) | |
536 | ; | |
537 | __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO); | |
538 | } | |
539 | ||
540 | void __init txx9_sio_putchar_init(unsigned long baseaddr) | |
541 | { | |
542 | early_txx9_sio_port = ioremap(baseaddr, 0x24); | |
543 | txx9_prom_putchar = early_txx9_sio_putchar; | |
544 | } | |
545 | #endif /* CONFIG_EARLY_PRINTK */ | |
546 | ||
edcaf1a6 AN |
547 | /* wrappers */ |
548 | void __init plat_mem_setup(void) | |
549 | { | |
94a4c329 AN |
550 | ioport_resource.start = 0; |
551 | ioport_resource.end = ~0UL; /* no limit */ | |
552 | iomem_resource.start = 0; | |
553 | iomem_resource.end = ~0UL; /* no limit */ | |
a49297e8 AN |
554 | |
555 | /* fallback restart/halt routines */ | |
556 | _machine_restart = (void (*)(char *))txx9_machine_halt; | |
557 | _machine_halt = txx9_machine_halt; | |
558 | pm_power_off = txx9_machine_halt; | |
559 | ||
07517529 AN |
560 | #ifdef CONFIG_PCI |
561 | pcibios_plat_setup = txx9_pcibios_setup; | |
562 | #endif | |
edcaf1a6 AN |
563 | txx9_board_vec->mem_setup(); |
564 | } | |
565 | ||
566 | void __init arch_init_irq(void) | |
567 | { | |
568 | txx9_board_vec->irq_setup(); | |
569 | } | |
570 | ||
571 | void __init plat_time_init(void) | |
572 | { | |
1374d084 AN |
573 | #ifdef CONFIG_CPU_TX49XX |
574 | mips_hpt_frequency = txx9_cpu_clock / 2; | |
575 | #endif | |
edcaf1a6 AN |
576 | txx9_board_vec->time_init(); |
577 | } | |
578 | ||
579 | static int __init _txx9_arch_init(void) | |
580 | { | |
581 | if (txx9_board_vec->arch_init) | |
582 | txx9_board_vec->arch_init(); | |
583 | return 0; | |
584 | } | |
585 | arch_initcall(_txx9_arch_init); | |
586 | ||
587 | static int __init _txx9_device_init(void) | |
588 | { | |
589 | if (txx9_board_vec->device_init) | |
590 | txx9_board_vec->device_init(); | |
591 | return 0; | |
592 | } | |
593 | device_initcall(_txx9_device_init); | |
594 | ||
595 | int (*txx9_irq_dispatch)(int pending); | |
596 | asmlinkage void plat_irq_dispatch(void) | |
597 | { | |
598 | int pending = read_c0_status() & read_c0_cause() & ST0_IM; | |
599 | int irq = txx9_irq_dispatch(pending); | |
600 | ||
601 | if (likely(irq >= 0)) | |
602 | do_IRQ(irq); | |
603 | else | |
604 | spurious_interrupt(); | |
605 | } | |
4c642f3f AN |
606 | |
607 | /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */ | |
608 | #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B | |
609 | static unsigned long __swizzle_addr_none(unsigned long port) | |
610 | { | |
611 | return port; | |
612 | } | |
613 | unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none; | |
614 | EXPORT_SYMBOL(__swizzle_addr_b); | |
615 | #endif | |
51f607c7 | 616 | |
1ba5a176 AN |
617 | #ifdef NEEDS_TXX9_IOSWABW |
618 | static u16 ioswabw_default(volatile u16 *a, u16 x) | |
619 | { | |
620 | return le16_to_cpu(x); | |
621 | } | |
622 | static u16 __mem_ioswabw_default(volatile u16 *a, u16 x) | |
623 | { | |
624 | return x; | |
625 | } | |
626 | u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default; | |
627 | EXPORT_SYMBOL(ioswabw); | |
628 | u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default; | |
629 | EXPORT_SYMBOL(__mem_ioswabw); | |
630 | #endif | |
631 | ||
51f607c7 AN |
632 | void __init txx9_physmap_flash_init(int no, unsigned long addr, |
633 | unsigned long size, | |
634 | const struct physmap_flash_data *pdata) | |
635 | { | |
b33b4407 | 636 | #if IS_ENABLED(CONFIG_MTD_PHYSMAP) |
51f607c7 AN |
637 | struct resource res = { |
638 | .start = addr, | |
639 | .end = addr + size - 1, | |
640 | .flags = IORESOURCE_MEM, | |
641 | }; | |
642 | struct platform_device *pdev; | |
51f607c7 AN |
643 | static struct mtd_partition parts[2]; |
644 | struct physmap_flash_data pdata_part; | |
645 | ||
646 | /* If this area contained boot area, make separate partition */ | |
647 | if (pdata->nr_parts == 0 && !pdata->parts && | |
648 | addr < 0x1fc00000 && addr + size > 0x1fc00000 && | |
649 | !parts[0].name) { | |
650 | parts[0].name = "boot"; | |
651 | parts[0].offset = 0x1fc00000 - addr; | |
652 | parts[0].size = addr + size - 0x1fc00000; | |
653 | parts[1].name = "user"; | |
654 | parts[1].offset = 0; | |
655 | parts[1].size = 0x1fc00000 - addr; | |
656 | pdata_part = *pdata; | |
657 | pdata_part.nr_parts = ARRAY_SIZE(parts); | |
658 | pdata_part.parts = parts; | |
659 | pdata = &pdata_part; | |
660 | } | |
47854888 | 661 | |
51f607c7 AN |
662 | pdev = platform_device_alloc("physmap-flash", no); |
663 | if (!pdev || | |
664 | platform_device_add_resources(pdev, &res, 1) || | |
a591f5d3 AN |
665 | platform_device_add_data(pdev, pdata, sizeof(*pdata)) || |
666 | platform_device_add(pdev)) | |
667 | platform_device_put(pdev); | |
668 | #endif | |
669 | } | |
670 | ||
671 | void __init txx9_ndfmc_init(unsigned long baseaddr, | |
672 | const struct txx9ndfmc_platform_data *pdata) | |
673 | { | |
b33b4407 | 674 | #if IS_ENABLED(CONFIG_MTD_NAND_TXX9NDFMC) |
a591f5d3 AN |
675 | struct resource res = { |
676 | .start = baseaddr, | |
677 | .end = baseaddr + 0x1000 - 1, | |
678 | .flags = IORESOURCE_MEM, | |
679 | }; | |
680 | struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1); | |
681 | ||
682 | if (!pdev || | |
683 | platform_device_add_resources(pdev, &res, 1) || | |
51f607c7 AN |
684 | platform_device_add_data(pdev, pdata, sizeof(*pdata)) || |
685 | platform_device_add(pdev)) | |
686 | platform_device_put(pdev); | |
687 | #endif | |
688 | } | |
ae027ead | 689 | |
b33b4407 | 690 | #if IS_ENABLED(CONFIG_LEDS_GPIO) |
ae027ead AN |
691 | static DEFINE_SPINLOCK(txx9_iocled_lock); |
692 | ||
693 | #define TXX9_IOCLED_MAXLEDS 8 | |
694 | ||
695 | struct txx9_iocled_data { | |
696 | struct gpio_chip chip; | |
697 | u8 cur_val; | |
698 | void __iomem *mmioaddr; | |
699 | struct gpio_led_platform_data pdata; | |
700 | struct gpio_led leds[TXX9_IOCLED_MAXLEDS]; | |
701 | char names[TXX9_IOCLED_MAXLEDS][32]; | |
702 | }; | |
703 | ||
704 | static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset) | |
705 | { | |
706 | struct txx9_iocled_data *data = | |
707 | container_of(chip, struct txx9_iocled_data, chip); | |
708 | return data->cur_val & (1 << offset); | |
709 | } | |
710 | ||
711 | static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset, | |
712 | int value) | |
713 | { | |
714 | struct txx9_iocled_data *data = | |
715 | container_of(chip, struct txx9_iocled_data, chip); | |
716 | unsigned long flags; | |
717 | spin_lock_irqsave(&txx9_iocled_lock, flags); | |
718 | if (value) | |
719 | data->cur_val |= 1 << offset; | |
720 | else | |
721 | data->cur_val &= ~(1 << offset); | |
722 | writeb(data->cur_val, data->mmioaddr); | |
723 | mmiowb(); | |
724 | spin_unlock_irqrestore(&txx9_iocled_lock, flags); | |
725 | } | |
726 | ||
727 | static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset) | |
728 | { | |
729 | return 0; | |
730 | } | |
731 | ||
732 | static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset, | |
733 | int value) | |
734 | { | |
735 | txx9_iocled_set(chip, offset, value); | |
736 | return 0; | |
737 | } | |
738 | ||
739 | void __init txx9_iocled_init(unsigned long baseaddr, | |
740 | int basenum, unsigned int num, int lowactive, | |
741 | const char *color, char **deftriggers) | |
742 | { | |
743 | struct txx9_iocled_data *iocled; | |
744 | struct platform_device *pdev; | |
745 | int i; | |
746 | static char *default_triggers[] __initdata = { | |
747 | "heartbeat", | |
748 | "ide-disk", | |
749 | "nand-disk", | |
750 | NULL, | |
751 | }; | |
752 | ||
753 | if (!deftriggers) | |
754 | deftriggers = default_triggers; | |
755 | iocled = kzalloc(sizeof(*iocled), GFP_KERNEL); | |
756 | if (!iocled) | |
757 | return; | |
758 | iocled->mmioaddr = ioremap(baseaddr, 1); | |
759 | if (!iocled->mmioaddr) | |
70ebadc8 | 760 | goto out_free; |
ae027ead AN |
761 | iocled->chip.get = txx9_iocled_get; |
762 | iocled->chip.set = txx9_iocled_set; | |
763 | iocled->chip.direction_input = txx9_iocled_dir_in; | |
764 | iocled->chip.direction_output = txx9_iocled_dir_out; | |
765 | iocled->chip.label = "iocled"; | |
766 | iocled->chip.base = basenum; | |
767 | iocled->chip.ngpio = num; | |
768 | if (gpiochip_add(&iocled->chip)) | |
70ebadc8 | 769 | goto out_unmap; |
ae027ead AN |
770 | if (basenum < 0) |
771 | basenum = iocled->chip.base; | |
772 | ||
773 | pdev = platform_device_alloc("leds-gpio", basenum); | |
774 | if (!pdev) | |
70ebadc8 | 775 | goto out_gpio; |
ae027ead AN |
776 | iocled->pdata.num_leds = num; |
777 | iocled->pdata.leds = iocled->leds; | |
778 | for (i = 0; i < num; i++) { | |
779 | struct gpio_led *led = &iocled->leds[i]; | |
780 | snprintf(iocled->names[i], sizeof(iocled->names[i]), | |
781 | "iocled:%s:%u", color, i); | |
782 | led->name = iocled->names[i]; | |
783 | led->gpio = basenum + i; | |
784 | led->active_low = lowactive; | |
785 | if (deftriggers && *deftriggers) | |
786 | led->default_trigger = *deftriggers++; | |
787 | } | |
788 | pdev->dev.platform_data = &iocled->pdata; | |
789 | if (platform_device_add(pdev)) | |
70ebadc8 JL |
790 | goto out_pdev; |
791 | return; | |
792 | out_pdev: | |
793 | platform_device_put(pdev); | |
794 | out_gpio: | |
a2e62f3a RR |
795 | if (gpiochip_remove(&iocled->chip)) |
796 | return; | |
70ebadc8 JL |
797 | out_unmap: |
798 | iounmap(iocled->mmioaddr); | |
799 | out_free: | |
800 | kfree(iocled); | |
ae027ead AN |
801 | } |
802 | #else /* CONFIG_LEDS_GPIO */ | |
803 | void __init txx9_iocled_init(unsigned long baseaddr, | |
804 | int basenum, unsigned int num, int lowactive, | |
805 | const char *color, char **deftriggers) | |
806 | { | |
807 | } | |
808 | #endif /* CONFIG_LEDS_GPIO */ | |
f48c8c95 AN |
809 | |
810 | void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq, | |
811 | const struct txx9dmac_platform_data *pdata) | |
812 | { | |
b33b4407 | 813 | #if IS_ENABLED(CONFIG_TXX9_DMAC) |
f48c8c95 AN |
814 | struct resource res[] = { |
815 | { | |
816 | .start = baseaddr, | |
817 | .end = baseaddr + 0x800 - 1, | |
818 | .flags = IORESOURCE_MEM, | |
819 | #ifndef CONFIG_MACH_TX49XX | |
820 | }, { | |
821 | .start = irq, | |
822 | .flags = IORESOURCE_IRQ, | |
823 | #endif | |
824 | } | |
825 | }; | |
826 | #ifdef CONFIG_MACH_TX49XX | |
827 | struct resource chan_res[] = { | |
828 | { | |
829 | .flags = IORESOURCE_IRQ, | |
830 | } | |
831 | }; | |
832 | #endif | |
833 | struct platform_device *pdev = platform_device_alloc("txx9dmac", id); | |
834 | struct txx9dmac_chan_platform_data cpdata; | |
835 | int i; | |
836 | ||
837 | if (!pdev || | |
838 | platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) || | |
839 | platform_device_add_data(pdev, pdata, sizeof(*pdata)) || | |
840 | platform_device_add(pdev)) { | |
841 | platform_device_put(pdev); | |
842 | return; | |
843 | } | |
844 | memset(&cpdata, 0, sizeof(cpdata)); | |
845 | cpdata.dmac_dev = pdev; | |
846 | for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) { | |
847 | #ifdef CONFIG_MACH_TX49XX | |
848 | chan_res[0].start = irq + i; | |
849 | #endif | |
850 | pdev = platform_device_alloc("txx9dmac-chan", | |
851 | id * TXX9_DMA_MAX_NR_CHANNELS + i); | |
852 | if (!pdev || | |
853 | #ifdef CONFIG_MACH_TX49XX | |
854 | platform_device_add_resources(pdev, chan_res, | |
855 | ARRAY_SIZE(chan_res)) || | |
856 | #endif | |
857 | platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) || | |
858 | platform_device_add(pdev)) | |
859 | platform_device_put(pdev); | |
860 | } | |
861 | #endif | |
862 | } | |
742cd586 AN |
863 | |
864 | void __init txx9_aclc_init(unsigned long baseaddr, int irq, | |
865 | unsigned int dmac_id, | |
866 | unsigned int dma_chan_out, | |
867 | unsigned int dma_chan_in) | |
868 | { | |
b33b4407 | 869 | #if IS_ENABLED(CONFIG_SND_SOC_TXX9ACLC) |
742cd586 AN |
870 | unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS; |
871 | struct resource res[] = { | |
872 | { | |
873 | .start = baseaddr, | |
874 | .end = baseaddr + 0x100 - 1, | |
875 | .flags = IORESOURCE_MEM, | |
876 | }, { | |
877 | .start = irq, | |
878 | .flags = IORESOURCE_IRQ, | |
879 | }, { | |
880 | .name = "txx9dmac-chan", | |
881 | .start = dma_base + dma_chan_out, | |
882 | .flags = IORESOURCE_DMA, | |
883 | }, { | |
884 | .name = "txx9dmac-chan", | |
885 | .start = dma_base + dma_chan_in, | |
886 | .flags = IORESOURCE_DMA, | |
887 | } | |
888 | }; | |
889 | struct platform_device *pdev = | |
890 | platform_device_alloc("txx9aclc-ac97", -1); | |
891 | ||
892 | if (!pdev || | |
893 | platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) || | |
894 | platform_device_add(pdev)) | |
895 | platform_device_put(pdev); | |
896 | #endif | |
897 | } | |
c3b28ae2 | 898 | |
269a3eb1 KS |
899 | static struct bus_type txx9_sramc_subsys = { |
900 | .name = "txx9_sram", | |
901 | .dev_name = "txx9_sram", | |
902 | }; | |
c3b28ae2 | 903 | |
269a3eb1 KS |
904 | struct txx9_sramc_dev { |
905 | struct device dev; | |
c3b28ae2 AN |
906 | struct bin_attribute bindata_attr; |
907 | void __iomem *base; | |
908 | }; | |
909 | ||
2c3c8bea | 910 | static ssize_t txx9_sram_read(struct file *filp, struct kobject *kobj, |
c3b28ae2 AN |
911 | struct bin_attribute *bin_attr, |
912 | char *buf, loff_t pos, size_t size) | |
913 | { | |
269a3eb1 | 914 | struct txx9_sramc_dev *dev = bin_attr->private; |
c3b28ae2 AN |
915 | size_t ramsize = bin_attr->size; |
916 | ||
917 | if (pos >= ramsize) | |
918 | return 0; | |
919 | if (pos + size > ramsize) | |
920 | size = ramsize - pos; | |
921 | memcpy_fromio(buf, dev->base + pos, size); | |
922 | return size; | |
923 | } | |
924 | ||
2c3c8bea | 925 | static ssize_t txx9_sram_write(struct file *filp, struct kobject *kobj, |
c3b28ae2 AN |
926 | struct bin_attribute *bin_attr, |
927 | char *buf, loff_t pos, size_t size) | |
928 | { | |
269a3eb1 | 929 | struct txx9_sramc_dev *dev = bin_attr->private; |
c3b28ae2 AN |
930 | size_t ramsize = bin_attr->size; |
931 | ||
932 | if (pos >= ramsize) | |
933 | return 0; | |
934 | if (pos + size > ramsize) | |
935 | size = ramsize - pos; | |
936 | memcpy_toio(dev->base + pos, buf, size); | |
937 | return size; | |
938 | } | |
939 | ||
940 | void __init txx9_sramc_init(struct resource *r) | |
941 | { | |
269a3eb1 | 942 | struct txx9_sramc_dev *dev; |
c3b28ae2 AN |
943 | size_t size; |
944 | int err; | |
945 | ||
269a3eb1 KS |
946 | err = subsys_system_register(&txx9_sramc_subsys, NULL); |
947 | if (err) | |
948 | return; | |
c3b28ae2 AN |
949 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); |
950 | if (!dev) | |
951 | return; | |
952 | size = resource_size(r); | |
953 | dev->base = ioremap(r->start, size); | |
954 | if (!dev->base) | |
955 | goto exit; | |
269a3eb1 | 956 | dev->dev.bus = &txx9_sramc_subsys; |
f937331b | 957 | sysfs_bin_attr_init(&dev->bindata_attr); |
c3b28ae2 AN |
958 | dev->bindata_attr.attr.name = "bindata"; |
959 | dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR; | |
960 | dev->bindata_attr.read = txx9_sram_read; | |
961 | dev->bindata_attr.write = txx9_sram_write; | |
962 | dev->bindata_attr.size = size; | |
963 | dev->bindata_attr.private = dev; | |
269a3eb1 | 964 | err = device_register(&dev->dev); |
c3b28ae2 AN |
965 | if (err) |
966 | goto exit; | |
967 | err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr); | |
968 | if (err) { | |
269a3eb1 | 969 | device_unregister(&dev->dev); |
c3b28ae2 AN |
970 | goto exit; |
971 | } | |
972 | return; | |
973 | exit: | |
974 | if (dev) { | |
975 | if (dev->base) | |
976 | iounmap(dev->base); | |
977 | kfree(dev); | |
978 | } | |
979 | } |