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b920de1b DH |
1 | /* MN10300 I/O port emulation and memory-mapped I/O |
2 | * | |
3 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. | |
4 | * Written by David Howells (dhowells@redhat.com) | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public Licence | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the Licence, or (at your option) any later version. | |
10 | */ | |
11 | #ifndef _ASM_IO_H | |
12 | #define _ASM_IO_H | |
13 | ||
14 | #include <asm/page.h> /* I/O is all done through memory accesses */ | |
15 | #include <asm/cpu-regs.h> | |
16 | #include <asm/cacheflush.h> | |
76583cff | 17 | #include <asm-generic/pci_iomap.h> |
b920de1b DH |
18 | |
19 | #define mmiowb() do {} while (0) | |
20 | ||
21 | /*****************************************************************************/ | |
22 | /* | |
23 | * readX/writeX() are used to access memory mapped devices. On some | |
24 | * architectures the memory mapped IO stuff needs to be accessed | |
25 | * differently. On the x86 architecture, we just read/write the | |
26 | * memory location directly. | |
27 | */ | |
28 | static inline u8 readb(const volatile void __iomem *addr) | |
29 | { | |
30 | return *(const volatile u8 *) addr; | |
31 | } | |
32 | ||
33 | static inline u16 readw(const volatile void __iomem *addr) | |
34 | { | |
35 | return *(const volatile u16 *) addr; | |
36 | } | |
37 | ||
38 | static inline u32 readl(const volatile void __iomem *addr) | |
39 | { | |
40 | return *(const volatile u32 *) addr; | |
41 | } | |
42 | ||
43 | #define __raw_readb readb | |
44 | #define __raw_readw readw | |
45 | #define __raw_readl readl | |
46 | ||
47 | #define readb_relaxed readb | |
48 | #define readw_relaxed readw | |
49 | #define readl_relaxed readl | |
50 | ||
51 | static inline void writeb(u8 b, volatile void __iomem *addr) | |
52 | { | |
53 | *(volatile u8 *) addr = b; | |
54 | } | |
55 | ||
56 | static inline void writew(u16 b, volatile void __iomem *addr) | |
57 | { | |
58 | *(volatile u16 *) addr = b; | |
59 | } | |
60 | ||
61 | static inline void writel(u32 b, volatile void __iomem *addr) | |
62 | { | |
63 | *(volatile u32 *) addr = b; | |
64 | } | |
65 | ||
66 | #define __raw_writeb writeb | |
67 | #define __raw_writew writew | |
68 | #define __raw_writel writel | |
69 | ||
960a5597 WD |
70 | #define writeb_relaxed writeb |
71 | #define writew_relaxed writew | |
72 | #define writel_relaxed writel | |
73 | ||
b920de1b DH |
74 | /*****************************************************************************/ |
75 | /* | |
76 | * traditional input/output functions | |
77 | */ | |
78 | static inline u8 inb_local(unsigned long addr) | |
79 | { | |
80 | return readb((volatile void __iomem *) addr); | |
81 | } | |
82 | ||
83 | static inline void outb_local(u8 b, unsigned long addr) | |
84 | { | |
85 | return writeb(b, (volatile void __iomem *) addr); | |
86 | } | |
87 | ||
88 | static inline u8 inb(unsigned long addr) | |
89 | { | |
90 | return readb((volatile void __iomem *) addr); | |
91 | } | |
92 | ||
93 | static inline u16 inw(unsigned long addr) | |
94 | { | |
95 | return readw((volatile void __iomem *) addr); | |
96 | } | |
97 | ||
98 | static inline u32 inl(unsigned long addr) | |
99 | { | |
100 | return readl((volatile void __iomem *) addr); | |
101 | } | |
102 | ||
103 | static inline void outb(u8 b, unsigned long addr) | |
104 | { | |
105 | return writeb(b, (volatile void __iomem *) addr); | |
106 | } | |
107 | ||
108 | static inline void outw(u16 b, unsigned long addr) | |
109 | { | |
110 | return writew(b, (volatile void __iomem *) addr); | |
111 | } | |
112 | ||
113 | static inline void outl(u32 b, unsigned long addr) | |
114 | { | |
115 | return writel(b, (volatile void __iomem *) addr); | |
116 | } | |
117 | ||
118 | #define inb_p(addr) inb(addr) | |
119 | #define inw_p(addr) inw(addr) | |
120 | #define inl_p(addr) inl(addr) | |
121 | #define outb_p(x, addr) outb((x), (addr)) | |
122 | #define outw_p(x, addr) outw((x), (addr)) | |
123 | #define outl_p(x, addr) outl((x), (addr)) | |
124 | ||
125 | static inline void insb(unsigned long addr, void *buffer, int count) | |
126 | { | |
127 | if (count) { | |
128 | u8 *buf = buffer; | |
129 | do { | |
130 | u8 x = inb(addr); | |
131 | *buf++ = x; | |
132 | } while (--count); | |
133 | } | |
134 | } | |
135 | ||
136 | static inline void insw(unsigned long addr, void *buffer, int count) | |
137 | { | |
138 | if (count) { | |
139 | u16 *buf = buffer; | |
140 | do { | |
141 | u16 x = inw(addr); | |
142 | *buf++ = x; | |
143 | } while (--count); | |
144 | } | |
145 | } | |
146 | ||
147 | static inline void insl(unsigned long addr, void *buffer, int count) | |
148 | { | |
149 | if (count) { | |
150 | u32 *buf = buffer; | |
151 | do { | |
152 | u32 x = inl(addr); | |
153 | *buf++ = x; | |
154 | } while (--count); | |
155 | } | |
156 | } | |
157 | ||
158 | static inline void outsb(unsigned long addr, const void *buffer, int count) | |
159 | { | |
160 | if (count) { | |
161 | const u8 *buf = buffer; | |
162 | do { | |
163 | outb(*buf++, addr); | |
164 | } while (--count); | |
165 | } | |
166 | } | |
167 | ||
168 | static inline void outsw(unsigned long addr, const void *buffer, int count) | |
169 | { | |
170 | if (count) { | |
171 | const u16 *buf = buffer; | |
172 | do { | |
173 | outw(*buf++, addr); | |
174 | } while (--count); | |
175 | } | |
176 | } | |
177 | ||
178 | extern void __outsl(unsigned long addr, const void *buffer, int count); | |
179 | static inline void outsl(unsigned long addr, const void *buffer, int count) | |
180 | { | |
181 | if ((unsigned long) buffer & 0x3) | |
182 | return __outsl(addr, buffer, count); | |
183 | ||
184 | if (count) { | |
185 | const u32 *buf = buffer; | |
186 | do { | |
187 | outl(*buf++, addr); | |
188 | } while (--count); | |
189 | } | |
190 | } | |
191 | ||
192 | #define ioread8(addr) readb(addr) | |
193 | #define ioread16(addr) readw(addr) | |
194 | #define ioread32(addr) readl(addr) | |
195 | ||
196 | #define iowrite8(v, addr) writeb((v), (addr)) | |
197 | #define iowrite16(v, addr) writew((v), (addr)) | |
198 | #define iowrite32(v, addr) writel((v), (addr)) | |
601e3ad9 GR |
199 | |
200 | #define ioread16be(addr) be16_to_cpu(readw(addr)) | |
201 | #define ioread32be(addr) be32_to_cpu(readl(addr)) | |
202 | #define iowrite16be(v, addr) writew(cpu_to_be16(v), (addr)) | |
203 | #define iowrite32be(v, addr) writel(cpu_to_be32(v), (addr)) | |
b920de1b DH |
204 | |
205 | #define ioread8_rep(p, dst, count) \ | |
206 | insb((unsigned long) (p), (dst), (count)) | |
207 | #define ioread16_rep(p, dst, count) \ | |
208 | insw((unsigned long) (p), (dst), (count)) | |
209 | #define ioread32_rep(p, dst, count) \ | |
210 | insl((unsigned long) (p), (dst), (count)) | |
211 | ||
212 | #define iowrite8_rep(p, src, count) \ | |
213 | outsb((unsigned long) (p), (src), (count)) | |
214 | #define iowrite16_rep(p, src, count) \ | |
215 | outsw((unsigned long) (p), (src), (count)) | |
216 | #define iowrite32_rep(p, src, count) \ | |
217 | outsl((unsigned long) (p), (src), (count)) | |
218 | ||
9f59f7d2 AT |
219 | #define readsb(p, dst, count) \ |
220 | insb((unsigned long) (p), (dst), (count)) | |
221 | #define readsw(p, dst, count) \ | |
222 | insw((unsigned long) (p), (dst), (count)) | |
223 | #define readsl(p, dst, count) \ | |
224 | insl((unsigned long) (p), (dst), (count)) | |
225 | ||
226 | #define writesb(p, src, count) \ | |
227 | outsb((unsigned long) (p), (src), (count)) | |
228 | #define writesw(p, src, count) \ | |
229 | outsw((unsigned long) (p), (src), (count)) | |
230 | #define writesl(p, src, count) \ | |
231 | outsl((unsigned long) (p), (src), (count)) | |
b920de1b DH |
232 | |
233 | #define IO_SPACE_LIMIT 0xffffffff | |
234 | ||
235 | #ifdef __KERNEL__ | |
236 | ||
237 | #include <linux/vmalloc.h> | |
238 | #define __io_virt(x) ((void *) (x)) | |
239 | ||
240 | /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ | |
241 | struct pci_dev; | |
b920de1b DH |
242 | static inline void pci_iounmap(struct pci_dev *dev, void __iomem *p) |
243 | { | |
244 | } | |
245 | ||
246 | /* | |
247 | * Change virtual addresses to physical addresses and vv. | |
248 | * These are pretty trivial | |
249 | */ | |
250 | static inline unsigned long virt_to_phys(volatile void *address) | |
251 | { | |
252 | return __pa(address); | |
253 | } | |
254 | ||
255 | static inline void *phys_to_virt(unsigned long address) | |
256 | { | |
257 | return __va(address); | |
258 | } | |
259 | ||
260 | /* | |
261 | * Change "struct page" to physical address. | |
262 | */ | |
2ebf5d0d MT |
263 | static inline void __iomem *__ioremap(unsigned long offset, unsigned long size, |
264 | unsigned long flags) | |
b920de1b | 265 | { |
2ebf5d0d | 266 | return (void __iomem *) offset; |
b920de1b DH |
267 | } |
268 | ||
2ebf5d0d | 269 | static inline void __iomem *ioremap(unsigned long offset, unsigned long size) |
b920de1b | 270 | { |
83c2dc15 | 271 | return (void __iomem *)(offset & ~0x20000000); |
b920de1b DH |
272 | } |
273 | ||
274 | /* | |
275 | * This one maps high address device memory and turns off caching for that | |
276 | * area. it's useful if some control registers are in such an area and write | |
277 | * combining or read caching is not desirable: | |
278 | */ | |
2ebf5d0d | 279 | static inline void __iomem *ioremap_nocache(unsigned long offset, unsigned long size) |
b920de1b | 280 | { |
2ebf5d0d | 281 | return (void __iomem *) (offset | 0x20000000); |
b920de1b DH |
282 | } |
283 | ||
449f7650 | 284 | #define ioremap_wc ioremap_nocache |
556269c1 | 285 | #define ioremap_wt ioremap_nocache |
4c73e892 | 286 | #define ioremap_uc ioremap_nocache |
449f7650 | 287 | |
2ebf5d0d | 288 | static inline void iounmap(void __iomem *addr) |
b920de1b DH |
289 | { |
290 | } | |
291 | ||
292 | static inline void __iomem *ioport_map(unsigned long port, unsigned int nr) | |
293 | { | |
294 | return (void __iomem *) port; | |
295 | } | |
296 | ||
297 | static inline void ioport_unmap(void __iomem *p) | |
298 | { | |
299 | } | |
300 | ||
301 | #define xlate_dev_kmem_ptr(p) ((void *) (p)) | |
302 | #define xlate_dev_mem_ptr(p) ((void *) (p)) | |
303 | ||
304 | /* | |
305 | * PCI bus iomem addresses must be in the region 0x80000000-0x9fffffff | |
306 | */ | |
307 | static inline unsigned long virt_to_bus(volatile void *address) | |
308 | { | |
309 | return ((unsigned long) address) & ~0x20000000; | |
310 | } | |
311 | ||
312 | static inline void *bus_to_virt(unsigned long address) | |
313 | { | |
314 | return (void *) address; | |
315 | } | |
316 | ||
317 | #define page_to_bus page_to_phys | |
318 | ||
319 | #define memset_io(a, b, c) memset(__io_virt(a), (b), (c)) | |
320 | #define memcpy_fromio(a, b, c) memcpy((a), __io_virt(b), (c)) | |
321 | #define memcpy_toio(a, b, c) memcpy(__io_virt(a), (b), (c)) | |
322 | ||
323 | #endif /* __KERNEL__ */ | |
324 | ||
325 | #endif /* _ASM_IO_H */ |