projects / mirror_ubuntu-jammy-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| b920de1b DH |
1 | /* 16550 serial driver for gdbstub I/O |
| 2 | * | |
| 3 | * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. | |
| 4 | * Written by David Howells (dhowells@redhat.com) | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or | |
| 7 | * modify it under the terms of the GNU General Public Licence | |
| 8 | * as published by the Free Software Foundation; either version | |
| 9 | * 2 of the Licence, or (at your option) any later version. | |
| 10 | */ | |
| 11 | #include <linux/string.h> | |
| 12 | #include <linux/kernel.h> | |
| 13 | #include <linux/signal.h> | |
| 14 | #include <linux/sched.h> | |
| 15 | #include <linux/mm.h> | |
| 16 | #include <linux/console.h> | |
| 17 | #include <linux/init.h> | |
| 18 | #include <linux/nmi.h> | |
| 19 | ||
| 20 | #include <asm/pgtable.h> | |
| b920de1b DH |
21 | #include <asm/gdb-stub.h> |
| 22 | #include <asm/exceptions.h> | |
| 23 | #include <asm/serial-regs.h> | |
| 2f2a2132 | 24 | #include <unit/serial.h> |
| 368dd5ac | 25 | #include <asm/smp.h> |
| b920de1b DH |
26 | |
| 27 | /* | |
| 28 | * initialise the GDB stub | |
| 29 | */ | |
| 30 | void gdbstub_io_init(void) | |
| 31 | { | |
| 32 | u16 tmp; | |
| 33 | ||
| 34 | /* set up the serial port */ | |
| 35 | GDBPORT_SERIAL_LCR = UART_LCR_WLEN8; /* 1N8 */ | |
| 36 | GDBPORT_SERIAL_FCR = (UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | | |
| 37 | UART_FCR_CLEAR_XMIT); | |
| 38 | ||
| 39 | FLOWCTL_CLEAR(DTR); | |
| 40 | FLOWCTL_SET(RTS); | |
| 41 | ||
| 42 | gdbstub_io_set_baud(115200); | |
| 43 | ||
| 44 | /* we want to get serial receive interrupts */ | |
| 45 | XIRQxICR(GDBPORT_SERIAL_IRQ) = 0; | |
| 46 | tmp = XIRQxICR(GDBPORT_SERIAL_IRQ); | |
| 47 | ||
| 368dd5ac | 48 | #if CONFIG_GDBSTUB_IRQ_LEVEL == 0 |
| b920de1b | 49 | IVAR0 = EXCEP_IRQ_LEVEL0; |
| 368dd5ac AT |
50 | #elif CONFIG_GDBSTUB_IRQ_LEVEL == 1 |
| 51 | IVAR1 = EXCEP_IRQ_LEVEL1; | |
| 52 | #elif CONFIG_GDBSTUB_IRQ_LEVEL == 2 | |
| 53 | IVAR2 = EXCEP_IRQ_LEVEL2; | |
| 54 | #elif CONFIG_GDBSTUB_IRQ_LEVEL == 3 | |
| 55 | IVAR3 = EXCEP_IRQ_LEVEL3; | |
| 56 | #elif CONFIG_GDBSTUB_IRQ_LEVEL == 4 | |
| 57 | IVAR4 = EXCEP_IRQ_LEVEL4; | |
| 58 | #elif CONFIG_GDBSTUB_IRQ_LEVEL == 5 | |
| 59 | IVAR5 = EXCEP_IRQ_LEVEL5; | |
| 60 | #else | |
| 61 | #error "Unknown irq level for gdbstub." | |
| 62 | #endif | |
| 63 | ||
| 64 | set_intr_stub(NUM2EXCEP_IRQ_LEVEL(CONFIG_GDBSTUB_IRQ_LEVEL), | |
| 65 | gdbstub_io_rx_handler); | |
| b920de1b DH |
66 | |
| 67 | XIRQxICR(GDBPORT_SERIAL_IRQ) &= ~GxICR_REQUEST; | |
| 368dd5ac AT |
68 | XIRQxICR(GDBPORT_SERIAL_IRQ) = |
| 69 | GxICR_ENABLE | NUM2GxICR_LEVEL(CONFIG_GDBSTUB_IRQ_LEVEL); | |
| b920de1b DH |
70 | tmp = XIRQxICR(GDBPORT_SERIAL_IRQ); |
| 71 | ||
| 72 | GDBPORT_SERIAL_IER = UART_IER_RDI | UART_IER_RLSI; | |
| 73 | ||
| 74 | /* permit level 0 IRQs to take place */ | |
| 6142e05f DH |
75 | arch_local_change_intr_mask_level( |
| 76 | NUM2EPSW_IM(CONFIG_GDBSTUB_IRQ_LEVEL + 1)); | |
| b920de1b DH |
77 | } |
| 78 | ||
| 79 | /* | |
| 80 | * set up the GDB stub serial port baud rate timers | |
| 81 | */ | |
| 82 | void gdbstub_io_set_baud(unsigned baud) | |
| 83 | { | |
| 84 | unsigned value; | |
| 85 | u8 lcr; | |
| 86 | ||
| 87 | value = 18432000 / 16 / baud; | |
| 88 | ||
| 89 | lcr = GDBPORT_SERIAL_LCR; | |
| 90 | GDBPORT_SERIAL_LCR |= UART_LCR_DLAB; | |
| 91 | GDBPORT_SERIAL_DLL = value & 0xff; | |
| 92 | GDBPORT_SERIAL_DLM = (value >> 8) & 0xff; | |
| 93 | GDBPORT_SERIAL_LCR = lcr; | |
| 94 | } | |
| 95 | ||
| 96 | /* | |
| 97 | * wait for a character to come from the debugger | |
| 98 | */ | |
| 99 | int gdbstub_io_rx_char(unsigned char *_ch, int nonblock) | |
| 100 | { | |
| 101 | unsigned ix; | |
| 102 | u8 ch, st; | |
| 368dd5ac AT |
103 | #if defined(CONFIG_MN10300_WD_TIMER) |
| 104 | int cpu; | |
| 105 | #endif | |
| b920de1b DH |
106 | |
| 107 | *_ch = 0xff; | |
| 108 | ||
| 109 | if (gdbstub_rx_unget) { | |
| 110 | *_ch = gdbstub_rx_unget; | |
| 111 | gdbstub_rx_unget = 0; | |
| 112 | return 0; | |
| 113 | } | |
| 114 | ||
| 115 | try_again: | |
| 116 | /* pull chars out of the buffer */ | |
| 117 | ix = gdbstub_rx_outp; | |
| 004b50f4 | 118 | barrier(); |
| b920de1b DH |
119 | if (ix == gdbstub_rx_inp) { |
| 120 | if (nonblock) | |
| 121 | return -EAGAIN; | |
| 122 | #ifdef CONFIG_MN10300_WD_TIMER | |
| 368dd5ac AT |
123 | for (cpu = 0; cpu < NR_CPUS; cpu++) |
| 124 | watchdog_alert_counter[cpu] = 0; | |
| 125 | #endif | |
| b920de1b DH |
126 | goto try_again; |
| 127 | } | |
| 128 | ||
| 129 | ch = gdbstub_rx_buffer[ix++]; | |
| 130 | st = gdbstub_rx_buffer[ix++]; | |
| 004b50f4 | 131 | barrier(); |
| b920de1b DH |
132 | gdbstub_rx_outp = ix & 0x00000fff; |
| 133 | ||
| 134 | if (st & UART_LSR_BI) { | |
| 135 | gdbstub_proto("### GDB Rx Break Detected ###\n"); | |
| 136 | return -EINTR; | |
| 137 | } else if (st & (UART_LSR_FE | UART_LSR_OE | UART_LSR_PE)) { | |
| 138 | gdbstub_proto("### GDB Rx Error (st=%02x) ###\n", st); | |
| 139 | return -EIO; | |
| 140 | } else { | |
| 141 | gdbstub_proto("### GDB Rx %02x (st=%02x) ###\n", ch, st); | |
| 142 | *_ch = ch & 0x7f; | |
| 143 | return 0; | |
| 144 | } | |
| 145 | } | |
| 146 | ||
| 147 | /* | |
| 148 | * send a character to the debugger | |
| 149 | */ | |
| 150 | void gdbstub_io_tx_char(unsigned char ch) | |
| 151 | { | |
| 152 | FLOWCTL_SET(DTR); | |
| 153 | LSR_WAIT_FOR(THRE); | |
| 154 | /* FLOWCTL_WAIT_FOR(CTS); */ | |
| 155 | ||
| 156 | if (ch == 0x0a) { | |
| 157 | GDBPORT_SERIAL_TX = 0x0d; | |
| 158 | LSR_WAIT_FOR(THRE); | |
| 159 | /* FLOWCTL_WAIT_FOR(CTS); */ | |
| 160 | } | |
| 161 | GDBPORT_SERIAL_TX = ch; | |
| 162 | ||
| 163 | FLOWCTL_CLEAR(DTR); | |
| 164 | } | |
| 165 | ||
| 166 | /* | |
| 167 | * send a character to the debugger | |
| 168 | */ | |
| 169 | void gdbstub_io_tx_flush(void) | |
| 170 | { | |
| 171 | LSR_WAIT_FOR(TEMT); | |
| 172 | LSR_WAIT_FOR(THRE); | |
| 173 | FLOWCTL_CLEAR(DTR); | |
| 174 | } |