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1// SPDX-License-Identifier: GPL-2.0
2// Copyright (C) 2005-2017 Andes Technology Corporation
3
4#include <linux/module.h>
5#include <linux/personality.h>
6#include <linux/kallsyms.h>
7#include <linux/hardirq.h>
8#include <linux/kdebug.h>
9#include <linux/sched/task_stack.h>
10#include <linux/uaccess.h>
1e377ae9 11#include <linux/ftrace.h>
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12
13#include <asm/proc-fns.h>
14#include <asm/unistd.h>
e46bf83c 15#include <asm/fpu.h>
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16
17#include <linux/ptrace.h>
18#include <nds32_intrinsic.h>
19
20extern void show_pte(struct mm_struct *mm, unsigned long addr);
21
22/*
23 * Dump out the contents of some memory nicely...
24 */
25void dump_mem(const char *lvl, unsigned long bottom, unsigned long top)
26{
27 unsigned long first;
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28 int i;
29
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30 pr_emerg("%s(0x%08lx to 0x%08lx)\n", lvl, bottom, top);
31
32 for (first = bottom & ~31; first < top; first += 32) {
33 unsigned long p;
34 char str[sizeof(" 12345678") * 8 + 1];
35
36 memset(str, ' ', sizeof(str));
37 str[sizeof(str) - 1] = '\0';
38
39 for (p = first, i = 0; i < 8 && p < top; i++, p += 4) {
40 if (p >= bottom && p < top) {
41 unsigned long val;
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42
43 if (get_kernel_nofault(val,
44 (unsigned long *)p) == 0)
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45 sprintf(str + i * 9, " %08lx", val);
46 else
47 sprintf(str + i * 9, " ????????");
48 }
49 }
50 pr_emerg("%s%04lx:%s\n", lvl, first & 0xffff, str);
51 }
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52}
53
54EXPORT_SYMBOL(dump_mem);
55
2923f5ea 56#define LOOP_TIMES (100)
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57static void __dump(struct task_struct *tsk, unsigned long *base_reg,
58 const char *loglvl)
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59{
60 unsigned long ret_addr;
61 int cnt = LOOP_TIMES, graph = 0;
18a4753f 62 printk("%sCall Trace:\n", loglvl);
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63 if (!IS_ENABLED(CONFIG_FRAME_POINTER)) {
64 while (!kstack_end(base_reg)) {
65 ret_addr = *base_reg++;
66 if (__kernel_text_address(ret_addr)) {
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67 ret_addr = ftrace_graph_ret_addr(
68 tsk, &graph, ret_addr, NULL);
18a4753f 69 print_ip_sym(loglvl, ret_addr);
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70 }
71 if (--cnt < 0)
72 break;
73 }
74 } else {
75 while (!kstack_end((void *)base_reg) &&
76 !((unsigned long)base_reg & 0x3) &&
77 ((unsigned long)base_reg >= TASK_SIZE)) {
78 unsigned long next_fp;
95f93ed7 79 ret_addr = base_reg[LP_OFFSET];
2923f5ea 80 next_fp = base_reg[FP_OFFSET];
2923f5ea 81 if (__kernel_text_address(ret_addr)) {
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82
83 ret_addr = ftrace_graph_ret_addr(
84 tsk, &graph, ret_addr, NULL);
18a4753f 85 print_ip_sym(loglvl, ret_addr);
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86 }
87 if (--cnt < 0)
88 break;
89 base_reg = (unsigned long *)next_fp;
90 }
91 }
18a4753f 92 printk("%s\n", loglvl);
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93}
94
9cb8f069 95void show_stack(struct task_struct *tsk, unsigned long *sp, const char *loglvl)
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96{
97 unsigned long *base_reg;
98
99 if (!tsk)
100 tsk = current;
101 if (!IS_ENABLED(CONFIG_FRAME_POINTER)) {
102 if (tsk != current)
103 base_reg = (unsigned long *)(tsk->thread.cpu_context.sp);
104 else
105 __asm__ __volatile__("\tori\t%0, $sp, #0\n":"=r"(base_reg));
106 } else {
107 if (tsk != current)
108 base_reg = (unsigned long *)(tsk->thread.cpu_context.fp);
109 else
110 __asm__ __volatile__("\tori\t%0, $fp, #0\n":"=r"(base_reg));
111 }
18a4753f 112 __dump(tsk, base_reg, loglvl);
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113 barrier();
114}
115
116DEFINE_SPINLOCK(die_lock);
117
118/*
119 * This function is protected against re-entrancy.
120 */
121void die(const char *str, struct pt_regs *regs, int err)
122{
123 struct task_struct *tsk = current;
124 static int die_counter;
125
126 console_verbose();
127 spin_lock_irq(&die_lock);
128 bust_spinlocks(1);
129
130 pr_emerg("Internal error: %s: %x [#%d]\n", str, err, ++die_counter);
131 print_modules();
132 pr_emerg("CPU: %i\n", smp_processor_id());
133 show_regs(regs);
134 pr_emerg("Process %s (pid: %d, stack limit = 0x%p)\n",
487c4b23 135 tsk->comm, tsk->pid, end_of_stack(tsk));
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136
137 if (!user_mode(regs) || in_interrupt()) {
487c4b23 138 dump_mem("Stack: ", regs->sp, (regs->sp + PAGE_SIZE) & PAGE_MASK);
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139 dump_stack();
140 }
141
142 bust_spinlocks(0);
143 spin_unlock_irq(&die_lock);
144 do_exit(SIGSEGV);
145}
146
147EXPORT_SYMBOL(die);
148
149void die_if_kernel(const char *str, struct pt_regs *regs, int err)
150{
151 if (user_mode(regs))
152 return;
153
154 die(str, regs, err);
155}
156
157int bad_syscall(int n, struct pt_regs *regs)
158{
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159 if (current->personality != PER_LINUX) {
160 send_sig(SIGSEGV, current, 1);
161 return regs->uregs[0];
162 }
163
d808e918 164 force_sig_fault(SIGILL, ILL_ILLTRP,
2e1661d2 165 (void __user *)instruction_pointer(regs) - 4);
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166 die_if_kernel("Oops - bad syscall", regs, n);
167 return regs->uregs[0];
168}
169
170void __pte_error(const char *file, int line, unsigned long val)
171{
172 pr_emerg("%s:%d: bad pte %08lx.\n", file, line, val);
173}
174
175void __pmd_error(const char *file, int line, unsigned long val)
176{
177 pr_emerg("%s:%d: bad pmd %08lx.\n", file, line, val);
178}
179
180void __pgd_error(const char *file, int line, unsigned long val)
181{
182 pr_emerg("%s:%d: bad pgd %08lx.\n", file, line, val);
183}
184
185extern char *exception_vector, *exception_vector_end;
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186void __init early_trap_init(void)
187{
188 unsigned long ivb = 0;
189 unsigned long base = PAGE_OFFSET;
190
191 memcpy((unsigned long *)base, (unsigned long *)&exception_vector,
192 ((unsigned long)&exception_vector_end -
193 (unsigned long)&exception_vector));
194 ivb = __nds32__mfsr(NDS32_SR_IVB);
195 /* Check platform support. */
196 if (((ivb & IVB_mskNIVIC) >> IVB_offNIVIC) < 2)
197 panic
198 ("IVIC mode is not allowed on the platform with interrupt controller\n");
199 __nds32__mtsr((ivb & ~IVB_mskESZ) | (IVB_valESZ16 << IVB_offESZ) |
200 IVB_BASE, NDS32_SR_IVB);
201 __nds32__mtsr(INT_MASK_INITAIAL_VAL, NDS32_SR_INT_MASK);
202
203 /*
204 * 0x800 = 128 vectors * 16byte.
205 * It should be enough to flush a page.
206 */
207 cpu_cache_wbinval_page(base, true);
208}
209
07bd88a9 210static void send_sigtrap(struct pt_regs *regs, int error_code, int si_code)
2923f5ea 211{
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212 struct task_struct *tsk = current;
213
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214 tsk->thread.trap_no = ENTRY_DEBUG_RELATED;
215 tsk->thread.error_code = error_code;
216
d808e918 217 force_sig_fault(SIGTRAP, si_code,
2e1661d2 218 (void __user *)instruction_pointer(regs));
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219}
220
221void do_debug_trap(unsigned long entry, unsigned long addr,
222 unsigned long type, struct pt_regs *regs)
223{
224 if (notify_die(DIE_OOPS, "Oops", regs, addr, type, SIGTRAP)
225 == NOTIFY_STOP)
226 return;
227
228 if (user_mode(regs)) {
229 /* trap_signal */
07bd88a9 230 send_sigtrap(regs, 0, TRAP_BRKPT);
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231 } else {
232 /* kernel_trap */
233 if (!fixup_exception(regs))
234 die("unexpected kernel_trap", regs, 0);
235 }
236}
237
238void unhandled_interruption(struct pt_regs *regs)
239{
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240 pr_emerg("unhandled_interruption\n");
241 show_regs(regs);
242 if (!user_mode(regs))
243 do_exit(SIGKILL);
3cf5d076 244 force_sig(SIGKILL);
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245}
246
247void unhandled_exceptions(unsigned long entry, unsigned long addr,
248 unsigned long type, struct pt_regs *regs)
249{
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250 pr_emerg("Unhandled Exception: entry: %lx addr:%lx itype:%lx\n", entry,
251 addr, type);
252 show_regs(regs);
253 if (!user_mode(regs))
254 do_exit(SIGKILL);
3cf5d076 255 force_sig(SIGKILL);
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256}
257
258extern int do_page_fault(unsigned long entry, unsigned long addr,
259 unsigned int error_code, struct pt_regs *regs);
260
261/*
262 * 2:DEF dispatch for TLB MISC exception handler
263*/
264
265void do_dispatch_tlb_misc(unsigned long entry, unsigned long addr,
266 unsigned long type, struct pt_regs *regs)
267{
268 type = type & (ITYPE_mskINST | ITYPE_mskETYPE);
269 if ((type & ITYPE_mskETYPE) < 5) {
270 /* Permission exceptions */
271 do_page_fault(entry, addr, type, regs);
272 } else
273 unhandled_exceptions(entry, addr, type, regs);
274}
275
276void do_revinsn(struct pt_regs *regs)
277{
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278 pr_emerg("Reserved Instruction\n");
279 show_regs(regs);
280 if (!user_mode(regs))
281 do_exit(SIGILL);
3cf5d076 282 force_sig(SIGILL);
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283}
284
285#ifdef CONFIG_ALIGNMENT_TRAP
286extern int unalign_access_mode;
287extern int do_unaligned_access(unsigned long addr, struct pt_regs *regs);
288#endif
289void do_dispatch_general(unsigned long entry, unsigned long addr,
290 unsigned long itype, struct pt_regs *regs,
291 unsigned long oipc)
292{
293 unsigned int swid = itype >> ITYPE_offSWID;
294 unsigned long type = itype & (ITYPE_mskINST | ITYPE_mskETYPE);
295 if (type == ETYPE_ALIGNMENT_CHECK) {
296#ifdef CONFIG_ALIGNMENT_TRAP
297 /* Alignment check */
298 if (user_mode(regs) && unalign_access_mode) {
299 int ret;
300 ret = do_unaligned_access(addr, regs);
301
302 if (ret == 0)
303 return;
304
305 if (ret == -EFAULT)
306 pr_emerg
307 ("Unhandled unaligned access exception\n");
308 }
309#endif
310 do_page_fault(entry, addr, type, regs);
311 } else if (type == ETYPE_RESERVED_INSTRUCTION) {
312 /* Reserved instruction */
313 do_revinsn(regs);
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314 } else if (type == ETYPE_COPROCESSOR) {
315 /* Coprocessor */
316#if IS_ENABLED(CONFIG_FPU)
317 unsigned int fucop_exist = __nds32__mfsr(NDS32_SR_FUCOP_EXIST);
318 unsigned int cpid = ((itype & ITYPE_mskCPID) >> ITYPE_offCPID);
319
320 if ((cpid == FPU_CPID) &&
321 (fucop_exist & FUCOP_EXIST_mskCP0ISFPU)) {
322 unsigned int subtype = (itype & ITYPE_mskSTYPE);
323
324 if (true == do_fpu_exception(subtype, regs))
325 return;
326 }
327#endif
328 unhandled_exceptions(entry, addr, type, regs);
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329 } else if (type == ETYPE_TRAP && swid == SWID_RAISE_INTERRUPT_LEVEL) {
330 /* trap, used on v3 EDM target debugging workaround */
331 /*
332 * DIPC(OIPC) is passed as parameter before
333 * interrupt is enabled, so the DIPC will not be corrupted
334 * even though interrupts are coming in
335 */
336 /*
337 * 1. update ipc
338 * 2. update pt_regs ipc with oipc
339 * 3. update pt_regs ipsw (clear DEX)
340 */
341 __asm__ volatile ("mtsr %0, $IPC\n\t"::"r" (oipc));
342 regs->ipc = oipc;
343 if (regs->pipsw & PSW_mskDEX) {
344 pr_emerg
345 ("Nested Debug exception is possibly happened\n");
346 pr_emerg("ipc:%08x pipc:%08x\n",
347 (unsigned int)regs->ipc,
348 (unsigned int)regs->pipc);
349 }
350 do_debug_trap(entry, addr, itype, regs);
351 regs->ipsw &= ~PSW_mskDEX;
352 } else
353 unhandled_exceptions(entry, addr, type, regs);
354}