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b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
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2 | # |
3 | # For a description of the syntax of this configuration file, | |
cd238eff | 4 | # see Documentation/kbuild/kconfig-language.rst. |
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5 | # |
6 | ||
7 | config OPENRISC | |
8 | def_bool y | |
942fa985 | 9 | select ARCH_32BIT_OFF_T |
a4a4d11a CH |
10 | select ARCH_HAS_DMA_SET_UNCACHED |
11 | select ARCH_HAS_DMA_CLEAR_UNCACHED | |
5600779e | 12 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
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13 | select OF |
14 | select OF_EARLY_FLATTREE | |
b4c4c6ee | 15 | select IRQ_DOMAIN |
d1f6f28f | 16 | select HANDLE_DOMAIN_IRQ |
8636f344 | 17 | select GPIOLIB |
0ecdcaa6 | 18 | select HAVE_ARCH_TRACEHOOK |
c0fcaf55 | 19 | select SPARSE_IRQ |
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20 | select GENERIC_IRQ_CHIP |
21 | select GENERIC_IRQ_PROBE | |
22 | select GENERIC_IRQ_SHOW | |
23 | select GENERIC_IOMAP | |
9f13a1fd | 24 | select GENERIC_CPU_DEVICES |
04ea1e91 | 25 | select HAVE_UID16 |
0662d33a | 26 | select GENERIC_ATOMIC64 |
5bf8f6bf | 27 | select GENERIC_CLOCKEVENTS |
8e6d08e0 | 28 | select GENERIC_CLOCKEVENTS_BROADCAST |
603d6637 | 29 | select GENERIC_STRNCPY_FROM_USER |
b48b2c3e | 30 | select GENERIC_STRNLEN_USER |
8e6d08e0 | 31 | select GENERIC_SMP_IDLE_THREAD |
786d35d4 | 32 | select MODULES_USE_ELF_RELA |
d1a1dc0b | 33 | select HAVE_DEBUG_STACKOVERFLOW |
4db8e6d2 | 34 | select OR1K_PIC |
fff7fb0b | 35 | select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1 |
b5f82176 SH |
36 | select ARCH_USE_QUEUED_SPINLOCKS |
37 | select ARCH_USE_QUEUED_RWLOCKS | |
9b54470a | 38 | select OMPIC if SMP |
eecac38b | 39 | select ARCH_WANT_FRAME_POINTERS |
c5ca4560 | 40 | select GENERIC_IRQ_MULTI_HANDLER |
6137fed0 | 41 | select MMU_GATHER_NO_RANGE if MMU |
f8c4a270 | 42 | |
4c97a0c8 BM |
43 | config CPU_BIG_ENDIAN |
44 | def_bool y | |
45 | ||
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46 | config MMU |
47 | def_bool y | |
48 | ||
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49 | config GENERIC_HWEIGHT |
50 | def_bool y | |
51 | ||
ce816fa8 | 52 | config NO_IOPORT_MAP |
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53 | def_bool y |
54 | ||
f8c4a270 | 55 | config TRACE_IRQFLAGS_SUPPORT |
0ecdcaa6 | 56 | def_bool y |
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57 | |
58 | # For now, use generic checksum functions | |
59 | #These can be reimplemented in assembly later if so inclined | |
60 | config GENERIC_CSUM | |
0ecdcaa6 | 61 | def_bool y |
f8c4a270 | 62 | |
eecac38b SH |
63 | config STACKTRACE_SUPPORT |
64 | def_bool y | |
65 | ||
78cdfb5c SH |
66 | config LOCKDEP_SUPPORT |
67 | def_bool y | |
68 | ||
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69 | menu "Processor type and features" |
70 | ||
71 | choice | |
72 | prompt "Subarchitecture" | |
73 | default OR1K_1200 | |
74 | ||
75 | config OR1K_1200 | |
76 | bool "OR1200" | |
77 | help | |
78 | Generic OpenRISC 1200 architecture | |
79 | ||
80 | endchoice | |
81 | ||
4ee93d80 JHW |
82 | config DCACHE_WRITETHROUGH |
83 | bool "Have write through data caches" | |
84 | default n | |
85 | help | |
86 | Select this if your implementation features write through data caches. | |
87 | Selecting 'N' here will allow the kernel to force flushing of data | |
88 | caches at relevant times. Most OpenRISC implementations support write- | |
89 | through data caches. | |
90 | ||
91 | If unsure say N here | |
92 | ||
f8c4a270 | 93 | config OPENRISC_BUILTIN_DTB |
0ecdcaa6 KK |
94 | string "Builtin DTB" |
95 | default "" | |
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96 | |
97 | menu "Class II Instructions" | |
98 | ||
99 | config OPENRISC_HAVE_INST_FF1 | |
100 | bool "Have instruction l.ff1" | |
101 | default y | |
102 | help | |
103 | Select this if your implementation has the Class II instruction l.ff1 | |
104 | ||
105 | config OPENRISC_HAVE_INST_FL1 | |
106 | bool "Have instruction l.fl1" | |
107 | default y | |
108 | help | |
109 | Select this if your implementation has the Class II instruction l.fl1 | |
110 | ||
111 | config OPENRISC_HAVE_INST_MUL | |
112 | bool "Have instruction l.mul for hardware multiply" | |
113 | default y | |
114 | help | |
115 | Select this if your implementation has a hardware multiply instruction | |
116 | ||
117 | config OPENRISC_HAVE_INST_DIV | |
118 | bool "Have instruction l.div for hardware divide" | |
119 | default y | |
120 | help | |
121 | Select this if your implementation has a hardware divide instruction | |
122 | endmenu | |
123 | ||
34bbdcdc | 124 | config NR_CPUS |
8e6d08e0 SK |
125 | int "Maximum number of CPUs (2-32)" |
126 | range 2 32 | |
127 | depends on SMP | |
128 | default "2" | |
129 | ||
130 | config SMP | |
131 | bool "Symmetric Multi-Processing support" | |
132 | help | |
133 | This enables support for systems with more than one CPU. If you have | |
134 | a system with only one CPU, say N. If you have a system with more | |
135 | than one CPU, say Y. | |
136 | ||
137 | If you don't know what to do here, say N. | |
f8c4a270 | 138 | |
8636a1f9 | 139 | source "kernel/Kconfig.hz" |
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140 | |
141 | config OPENRISC_NO_SPR_SR_DSX | |
142 | bool "use SPR_SR_DSX software emulation" if OR1K_1200 | |
143 | default y | |
144 | help | |
145 | SPR_SR_DSX bit is status register bit indicating whether | |
146 | the last exception has happened in delay slot. | |
147 | ||
148 | OpenRISC architecture makes it optional to have it implemented | |
149 | in hardware and the OR1200 does not have it. | |
150 | ||
151 | Say N here if you know that your OpenRISC processor has | |
152 | SPR_SR_DSX bit implemented. Say Y if you are unsure. | |
153 | ||
91993c8c SK |
154 | config OPENRISC_HAVE_SHADOW_GPRS |
155 | bool "Support for shadow gpr files" if !SMP | |
156 | default y if SMP | |
157 | help | |
158 | Say Y here if your OpenRISC processor features shadowed | |
159 | register files. They will in such case be used as a | |
160 | scratch reg storage on exception entry. | |
161 | ||
162 | On SMP systems, this feature is mandatory. | |
163 | On a unicore system it's safe to say N here if you are unsure. | |
164 | ||
f8c4a270 | 165 | config CMDLINE |
0ecdcaa6 KK |
166 | string "Default kernel command string" |
167 | default "" | |
168 | help | |
169 | On some architectures there is currently no way for the boot loader | |
170 | to pass arguments to the kernel. For these architectures, you should | |
171 | supply some command-line options at build time by entering them | |
172 | here. | |
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173 | |
174 | menu "Debugging options" | |
175 | ||
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176 | config JUMP_UPON_UNHANDLED_EXCEPTION |
177 | bool "Try to die gracefully" | |
178 | default y | |
179 | help | |
180 | Now this puts kernel into infinite loop after first oops. Till | |
181 | your kernel crashes this doesn't have any influence. | |
182 | ||
183 | Say Y if you are unsure. | |
184 | ||
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185 | config OPENRISC_ESR_EXCEPTION_BUG_CHECK |
186 | bool "Check for possible ESR exception bug" | |
187 | default n | |
188 | help | |
189 | This option enables some checks that might expose some problems | |
0ecdcaa6 | 190 | in kernel. |
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191 | |
192 | Say N if you are unsure. | |
193 | ||
194 | endmenu | |
195 | ||
196 | endmenu |