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b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
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2 | # |
3 | # For a description of the syntax of this configuration file, | |
cd238eff | 4 | # see Documentation/kbuild/kconfig-language.rst. |
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5 | # |
6 | ||
7 | config OPENRISC | |
8 | def_bool y | |
942fa985 | 9 | select ARCH_32BIT_OFF_T |
5600779e | 10 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
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11 | select OF |
12 | select OF_EARLY_FLATTREE | |
b4c4c6ee | 13 | select IRQ_DOMAIN |
d1f6f28f | 14 | select HANDLE_DOMAIN_IRQ |
8636f344 | 15 | select GPIOLIB |
f8c4a270 | 16 | select HAVE_ARCH_TRACEHOOK |
c0fcaf55 | 17 | select SPARSE_IRQ |
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18 | select GENERIC_IRQ_CHIP |
19 | select GENERIC_IRQ_PROBE | |
20 | select GENERIC_IRQ_SHOW | |
21 | select GENERIC_IOMAP | |
9f13a1fd | 22 | select GENERIC_CPU_DEVICES |
04ea1e91 | 23 | select HAVE_UID16 |
0662d33a | 24 | select GENERIC_ATOMIC64 |
5bf8f6bf | 25 | select GENERIC_CLOCKEVENTS |
8e6d08e0 | 26 | select GENERIC_CLOCKEVENTS_BROADCAST |
603d6637 | 27 | select GENERIC_STRNCPY_FROM_USER |
b48b2c3e | 28 | select GENERIC_STRNLEN_USER |
8e6d08e0 | 29 | select GENERIC_SMP_IDLE_THREAD |
786d35d4 | 30 | select MODULES_USE_ELF_RELA |
d1a1dc0b | 31 | select HAVE_DEBUG_STACKOVERFLOW |
4db8e6d2 | 32 | select OR1K_PIC |
fff7fb0b | 33 | select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1 |
b5f82176 SH |
34 | select ARCH_USE_QUEUED_SPINLOCKS |
35 | select ARCH_USE_QUEUED_RWLOCKS | |
9b54470a | 36 | select OMPIC if SMP |
eecac38b | 37 | select ARCH_WANT_FRAME_POINTERS |
c5ca4560 | 38 | select GENERIC_IRQ_MULTI_HANDLER |
6137fed0 | 39 | select MMU_GATHER_NO_RANGE if MMU |
f8c4a270 | 40 | |
4c97a0c8 BM |
41 | config CPU_BIG_ENDIAN |
42 | def_bool y | |
43 | ||
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44 | config MMU |
45 | def_bool y | |
46 | ||
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47 | config GENERIC_HWEIGHT |
48 | def_bool y | |
49 | ||
ce816fa8 | 50 | config NO_IOPORT_MAP |
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51 | def_bool y |
52 | ||
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53 | config TRACE_IRQFLAGS_SUPPORT |
54 | def_bool y | |
55 | ||
56 | # For now, use generic checksum functions | |
57 | #These can be reimplemented in assembly later if so inclined | |
58 | config GENERIC_CSUM | |
59 | def_bool y | |
60 | ||
eecac38b SH |
61 | config STACKTRACE_SUPPORT |
62 | def_bool y | |
63 | ||
78cdfb5c SH |
64 | config LOCKDEP_SUPPORT |
65 | def_bool y | |
66 | ||
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67 | menu "Processor type and features" |
68 | ||
69 | choice | |
70 | prompt "Subarchitecture" | |
71 | default OR1K_1200 | |
72 | ||
73 | config OR1K_1200 | |
74 | bool "OR1200" | |
75 | help | |
76 | Generic OpenRISC 1200 architecture | |
77 | ||
78 | endchoice | |
79 | ||
4ee93d80 JHW |
80 | config DCACHE_WRITETHROUGH |
81 | bool "Have write through data caches" | |
82 | default n | |
83 | help | |
84 | Select this if your implementation features write through data caches. | |
85 | Selecting 'N' here will allow the kernel to force flushing of data | |
86 | caches at relevant times. Most OpenRISC implementations support write- | |
87 | through data caches. | |
88 | ||
89 | If unsure say N here | |
90 | ||
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91 | config OPENRISC_BUILTIN_DTB |
92 | string "Builtin DTB" | |
93 | default "" | |
94 | ||
95 | menu "Class II Instructions" | |
96 | ||
97 | config OPENRISC_HAVE_INST_FF1 | |
98 | bool "Have instruction l.ff1" | |
99 | default y | |
100 | help | |
101 | Select this if your implementation has the Class II instruction l.ff1 | |
102 | ||
103 | config OPENRISC_HAVE_INST_FL1 | |
104 | bool "Have instruction l.fl1" | |
105 | default y | |
106 | help | |
107 | Select this if your implementation has the Class II instruction l.fl1 | |
108 | ||
109 | config OPENRISC_HAVE_INST_MUL | |
110 | bool "Have instruction l.mul for hardware multiply" | |
111 | default y | |
112 | help | |
113 | Select this if your implementation has a hardware multiply instruction | |
114 | ||
115 | config OPENRISC_HAVE_INST_DIV | |
116 | bool "Have instruction l.div for hardware divide" | |
117 | default y | |
118 | help | |
119 | Select this if your implementation has a hardware divide instruction | |
120 | endmenu | |
121 | ||
34bbdcdc | 122 | config NR_CPUS |
8e6d08e0 SK |
123 | int "Maximum number of CPUs (2-32)" |
124 | range 2 32 | |
125 | depends on SMP | |
126 | default "2" | |
127 | ||
128 | config SMP | |
129 | bool "Symmetric Multi-Processing support" | |
130 | help | |
131 | This enables support for systems with more than one CPU. If you have | |
132 | a system with only one CPU, say N. If you have a system with more | |
133 | than one CPU, say Y. | |
134 | ||
135 | If you don't know what to do here, say N. | |
f8c4a270 | 136 | |
8636a1f9 | 137 | source "kernel/Kconfig.hz" |
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138 | |
139 | config OPENRISC_NO_SPR_SR_DSX | |
140 | bool "use SPR_SR_DSX software emulation" if OR1K_1200 | |
141 | default y | |
142 | help | |
143 | SPR_SR_DSX bit is status register bit indicating whether | |
144 | the last exception has happened in delay slot. | |
145 | ||
146 | OpenRISC architecture makes it optional to have it implemented | |
147 | in hardware and the OR1200 does not have it. | |
148 | ||
149 | Say N here if you know that your OpenRISC processor has | |
150 | SPR_SR_DSX bit implemented. Say Y if you are unsure. | |
151 | ||
91993c8c SK |
152 | config OPENRISC_HAVE_SHADOW_GPRS |
153 | bool "Support for shadow gpr files" if !SMP | |
154 | default y if SMP | |
155 | help | |
156 | Say Y here if your OpenRISC processor features shadowed | |
157 | register files. They will in such case be used as a | |
158 | scratch reg storage on exception entry. | |
159 | ||
160 | On SMP systems, this feature is mandatory. | |
161 | On a unicore system it's safe to say N here if you are unsure. | |
162 | ||
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163 | config CMDLINE |
164 | string "Default kernel command string" | |
165 | default "" | |
166 | help | |
167 | On some architectures there is currently no way for the boot loader | |
168 | to pass arguments to the kernel. For these architectures, you should | |
169 | supply some command-line options at build time by entering them | |
170 | here. | |
171 | ||
172 | menu "Debugging options" | |
173 | ||
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174 | config JUMP_UPON_UNHANDLED_EXCEPTION |
175 | bool "Try to die gracefully" | |
176 | default y | |
177 | help | |
178 | Now this puts kernel into infinite loop after first oops. Till | |
179 | your kernel crashes this doesn't have any influence. | |
180 | ||
181 | Say Y if you are unsure. | |
182 | ||
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183 | config OPENRISC_ESR_EXCEPTION_BUG_CHECK |
184 | bool "Check for possible ESR exception bug" | |
185 | default n | |
186 | help | |
187 | This option enables some checks that might expose some problems | |
188 | in kernel. | |
189 | ||
190 | Say N if you are unsure. | |
191 | ||
192 | endmenu | |
193 | ||
194 | endmenu |