]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | #ifndef _PARISC_CACHEFLUSH_H |
2 | #define _PARISC_CACHEFLUSH_H | |
3 | ||
1da177e4 | 4 | #include <linux/mm.h> |
210501aa | 5 | #include <linux/uaccess.h> |
b7d45818 | 6 | #include <asm/tlbflush.h> |
1da177e4 LT |
7 | |
8 | /* The usual comment is "Caches aren't brain-dead on the <architecture>". | |
9 | * Unfortunately, that doesn't apply to PA-RISC. */ | |
10 | ||
d6ce8626 RC |
11 | /* Internal implementation */ |
12 | void flush_data_cache_local(void *); /* flushes local data-cache only */ | |
13 | void flush_instruction_cache_local(void *); /* flushes local code-cache only */ | |
1da177e4 | 14 | #ifdef CONFIG_SMP |
d6ce8626 RC |
15 | void flush_data_cache(void); /* flushes data-cache only (all processors) */ |
16 | void flush_instruction_cache(void); /* flushes i-cache only (all processors) */ | |
1da177e4 | 17 | #else |
d6ce8626 RC |
18 | #define flush_data_cache() flush_data_cache_local(NULL) |
19 | #define flush_instruction_cache() flush_instruction_cache_local(NULL) | |
1da177e4 LT |
20 | #endif |
21 | ||
ec8c0446 RB |
22 | #define flush_cache_dup_mm(mm) flush_cache_mm(mm) |
23 | ||
d6ce8626 RC |
24 | void flush_user_icache_range_asm(unsigned long, unsigned long); |
25 | void flush_kernel_icache_range_asm(unsigned long, unsigned long); | |
26 | void flush_user_dcache_range_asm(unsigned long, unsigned long); | |
27 | void flush_kernel_dcache_range_asm(unsigned long, unsigned long); | |
28 | void flush_kernel_dcache_page_asm(void *); | |
29 | void flush_kernel_icache_page(void *); | |
3735313a MW |
30 | void flush_user_dcache_range(unsigned long, unsigned long); |
31 | void flush_user_icache_range(unsigned long, unsigned long); | |
1da177e4 | 32 | |
d6ce8626 | 33 | /* Cache flush operations */ |
1da177e4 | 34 | |
d6ce8626 RC |
35 | void flush_cache_all_local(void); |
36 | void flush_cache_all(void); | |
37 | void flush_cache_mm(struct mm_struct *mm); | |
1da177e4 | 38 | |
8e1964a9 JB |
39 | #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE |
40 | void flush_kernel_dcache_page_addr(void *addr); | |
41 | static inline void flush_kernel_dcache_page(struct page *page) | |
42 | { | |
43 | flush_kernel_dcache_page_addr(page_address(page)); | |
44 | } | |
45 | ||
d6ce8626 RC |
46 | #define flush_kernel_dcache_range(start,size) \ |
47 | flush_kernel_dcache_range_asm((start), (start)+(size)); | |
ef7cc35b JB |
48 | /* vmap range flushes and invalidates. Architecturally, we don't need |
49 | * the invalidate, because the CPU should refuse to speculate once an | |
50 | * area has been flushed, so invalidate is left empty */ | |
51 | static inline void flush_kernel_vmap_range(void *vaddr, int size) | |
52 | { | |
53 | unsigned long start = (unsigned long)vaddr; | |
54 | ||
55 | flush_kernel_dcache_range_asm(start, start + size); | |
56 | } | |
57 | static inline void invalidate_kernel_vmap_range(void *vaddr, int size) | |
58 | { | |
8e1964a9 JB |
59 | unsigned long start = (unsigned long)vaddr; |
60 | void *cursor = vaddr; | |
61 | ||
62 | for ( ; cursor < vaddr + size; cursor += PAGE_SIZE) { | |
63 | struct page *page = vmalloc_to_page(cursor); | |
64 | ||
65 | if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) | |
66 | flush_kernel_dcache_page(page); | |
67 | } | |
68 | flush_kernel_dcache_range_asm(start, start + size); | |
ef7cc35b | 69 | } |
1da177e4 LT |
70 | |
71 | #define flush_cache_vmap(start, end) flush_cache_all() | |
72 | #define flush_cache_vunmap(start, end) flush_cache_all() | |
73 | ||
2d4dc890 | 74 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 |
1da177e4 LT |
75 | extern void flush_dcache_page(struct page *page); |
76 | ||
77 | #define flush_dcache_mmap_lock(mapping) \ | |
19fd6231 | 78 | spin_lock_irq(&(mapping)->tree_lock) |
1da177e4 | 79 | #define flush_dcache_mmap_unlock(mapping) \ |
19fd6231 | 80 | spin_unlock_irq(&(mapping)->tree_lock) |
1da177e4 | 81 | |
d6ce8626 RC |
82 | #define flush_icache_page(vma,page) do { \ |
83 | flush_kernel_dcache_page(page); \ | |
84 | flush_kernel_icache_page(page_address(page)); \ | |
85 | } while (0) | |
1da177e4 | 86 | |
d6ce8626 RC |
87 | #define flush_icache_range(s,e) do { \ |
88 | flush_kernel_dcache_range_asm(s,e); \ | |
89 | flush_kernel_icache_range_asm(s,e); \ | |
90 | } while (0) | |
1da177e4 LT |
91 | |
92 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | |
93 | do { \ | |
94 | flush_cache_page(vma, vaddr, page_to_pfn(page)); \ | |
95 | memcpy(dst, src, len); \ | |
96 | flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); \ | |
97 | } while (0) | |
98 | ||
99 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | |
100 | do { \ | |
101 | flush_cache_page(vma, vaddr, page_to_pfn(page)); \ | |
102 | memcpy(dst, src, len); \ | |
103 | } while (0) | |
104 | ||
d6ce8626 RC |
105 | void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn); |
106 | void flush_cache_range(struct vm_area_struct *vma, | |
107 | unsigned long start, unsigned long end); | |
1bcdd854 | 108 | |
f311847c JB |
109 | /* defined in pacache.S exported in cache.c used by flush_anon_page */ |
110 | void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr); | |
111 | ||
d6ce8626 | 112 | #define ARCH_HAS_FLUSH_ANON_PAGE |
ab43227c | 113 | static inline void |
a6f36be3 | 114 | flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) |
ab43227c | 115 | { |
b7d45818 JB |
116 | if (PageAnon(page)) { |
117 | flush_tlb_page(vma, vmaddr); | |
027f27c4 | 118 | preempt_disable(); |
f311847c | 119 | flush_dcache_page_asm(page_to_phys(page), vmaddr); |
027f27c4 | 120 | preempt_enable(); |
b7d45818 | 121 | } |
ab43227c | 122 | } |
ab43227c | 123 | |
1bcdd854 HD |
124 | #ifdef CONFIG_DEBUG_RODATA |
125 | void mark_rodata_ro(void); | |
1da177e4 | 126 | #endif |
1bcdd854 | 127 | |
bb735019 KM |
128 | #include <asm/kmap_types.h> |
129 | ||
20f4d3cb JB |
130 | #define ARCH_HAS_KMAP |
131 | ||
20f4d3cb JB |
132 | static inline void *kmap(struct page *page) |
133 | { | |
134 | might_sleep(); | |
135 | return page_address(page); | |
136 | } | |
137 | ||
87be2f88 JDA |
138 | static inline void kunmap(struct page *page) |
139 | { | |
f8dae006 | 140 | flush_kernel_dcache_page_addr(page_address(page)); |
87be2f88 | 141 | } |
20f4d3cb | 142 | |
a24401bc | 143 | static inline void *kmap_atomic(struct page *page) |
210501aa | 144 | { |
2cb7c9cb | 145 | preempt_disable(); |
210501aa JDA |
146 | pagefault_disable(); |
147 | return page_address(page); | |
148 | } | |
20f4d3cb | 149 | |
765aaafe | 150 | static inline void __kunmap_atomic(void *addr) |
210501aa | 151 | { |
f8dae006 | 152 | flush_kernel_dcache_page_addr(addr); |
210501aa | 153 | pagefault_enable(); |
2cb7c9cb | 154 | preempt_enable(); |
210501aa | 155 | } |
20f4d3cb | 156 | |
765aaafe JB |
157 | #define kmap_atomic_prot(page, prot) kmap_atomic(page) |
158 | #define kmap_atomic_pfn(pfn) kmap_atomic(pfn_to_page(pfn)) | |
20f4d3cb | 159 | #define kmap_atomic_to_page(ptr) virt_to_page(ptr) |
20f4d3cb | 160 | |
1bcdd854 HD |
161 | #endif /* _PARISC_CACHEFLUSH_H */ |
162 |