]>
Commit | Line | Data |
---|---|---|
b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | #ifndef _PARISC_CACHEFLUSH_H |
3 | #define _PARISC_CACHEFLUSH_H | |
4 | ||
1da177e4 | 5 | #include <linux/mm.h> |
210501aa | 6 | #include <linux/uaccess.h> |
b7d45818 | 7 | #include <asm/tlbflush.h> |
1da177e4 LT |
8 | |
9 | /* The usual comment is "Caches aren't brain-dead on the <architecture>". | |
10 | * Unfortunately, that doesn't apply to PA-RISC. */ | |
11 | ||
d6ce8626 RC |
12 | /* Internal implementation */ |
13 | void flush_data_cache_local(void *); /* flushes local data-cache only */ | |
14 | void flush_instruction_cache_local(void *); /* flushes local code-cache only */ | |
1da177e4 | 15 | #ifdef CONFIG_SMP |
d6ce8626 RC |
16 | void flush_data_cache(void); /* flushes data-cache only (all processors) */ |
17 | void flush_instruction_cache(void); /* flushes i-cache only (all processors) */ | |
1da177e4 | 18 | #else |
d6ce8626 RC |
19 | #define flush_data_cache() flush_data_cache_local(NULL) |
20 | #define flush_instruction_cache() flush_instruction_cache_local(NULL) | |
1da177e4 LT |
21 | #endif |
22 | ||
ec8c0446 RB |
23 | #define flush_cache_dup_mm(mm) flush_cache_mm(mm) |
24 | ||
d6ce8626 RC |
25 | void flush_user_icache_range_asm(unsigned long, unsigned long); |
26 | void flush_kernel_icache_range_asm(unsigned long, unsigned long); | |
27 | void flush_user_dcache_range_asm(unsigned long, unsigned long); | |
28 | void flush_kernel_dcache_range_asm(unsigned long, unsigned long); | |
29 | void flush_kernel_dcache_page_asm(void *); | |
30 | void flush_kernel_icache_page(void *); | |
1da177e4 | 31 | |
d6ce8626 | 32 | /* Cache flush operations */ |
1da177e4 | 33 | |
d6ce8626 RC |
34 | void flush_cache_all_local(void); |
35 | void flush_cache_all(void); | |
36 | void flush_cache_mm(struct mm_struct *mm); | |
1da177e4 | 37 | |
8e1964a9 JB |
38 | #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE |
39 | void flush_kernel_dcache_page_addr(void *addr); | |
40 | static inline void flush_kernel_dcache_page(struct page *page) | |
41 | { | |
42 | flush_kernel_dcache_page_addr(page_address(page)); | |
43 | } | |
44 | ||
d6ce8626 RC |
45 | #define flush_kernel_dcache_range(start,size) \ |
46 | flush_kernel_dcache_range_asm((start), (start)+(size)); | |
8e1964a9 | 47 | |
316ec062 JDA |
48 | void flush_kernel_vmap_range(void *vaddr, int size); |
49 | void invalidate_kernel_vmap_range(void *vaddr, int size); | |
1da177e4 LT |
50 | |
51 | #define flush_cache_vmap(start, end) flush_cache_all() | |
52 | #define flush_cache_vunmap(start, end) flush_cache_all() | |
53 | ||
2d4dc890 | 54 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 |
1da177e4 LT |
55 | extern void flush_dcache_page(struct page *page); |
56 | ||
57 | #define flush_dcache_mmap_lock(mapping) \ | |
19fd6231 | 58 | spin_lock_irq(&(mapping)->tree_lock) |
1da177e4 | 59 | #define flush_dcache_mmap_unlock(mapping) \ |
19fd6231 | 60 | spin_unlock_irq(&(mapping)->tree_lock) |
1da177e4 | 61 | |
d6ce8626 RC |
62 | #define flush_icache_page(vma,page) do { \ |
63 | flush_kernel_dcache_page(page); \ | |
64 | flush_kernel_icache_page(page_address(page)); \ | |
65 | } while (0) | |
1da177e4 | 66 | |
d6ce8626 RC |
67 | #define flush_icache_range(s,e) do { \ |
68 | flush_kernel_dcache_range_asm(s,e); \ | |
69 | flush_kernel_icache_range_asm(s,e); \ | |
70 | } while (0) | |
1da177e4 LT |
71 | |
72 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | |
73 | do { \ | |
74 | flush_cache_page(vma, vaddr, page_to_pfn(page)); \ | |
75 | memcpy(dst, src, len); \ | |
76 | flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); \ | |
77 | } while (0) | |
78 | ||
79 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | |
80 | do { \ | |
81 | flush_cache_page(vma, vaddr, page_to_pfn(page)); \ | |
82 | memcpy(dst, src, len); \ | |
83 | } while (0) | |
84 | ||
d6ce8626 RC |
85 | void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn); |
86 | void flush_cache_range(struct vm_area_struct *vma, | |
87 | unsigned long start, unsigned long end); | |
1bcdd854 | 88 | |
f311847c JB |
89 | /* defined in pacache.S exported in cache.c used by flush_anon_page */ |
90 | void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr); | |
91 | ||
d6ce8626 | 92 | #define ARCH_HAS_FLUSH_ANON_PAGE |
ab43227c | 93 | static inline void |
a6f36be3 | 94 | flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) |
ab43227c | 95 | { |
b7d45818 JB |
96 | if (PageAnon(page)) { |
97 | flush_tlb_page(vma, vmaddr); | |
027f27c4 | 98 | preempt_disable(); |
f311847c | 99 | flush_dcache_page_asm(page_to_phys(page), vmaddr); |
027f27c4 | 100 | preempt_enable(); |
b7d45818 | 101 | } |
ab43227c | 102 | } |
ab43227c | 103 | |
bb735019 KM |
104 | #include <asm/kmap_types.h> |
105 | ||
20f4d3cb JB |
106 | #define ARCH_HAS_KMAP |
107 | ||
20f4d3cb JB |
108 | static inline void *kmap(struct page *page) |
109 | { | |
110 | might_sleep(); | |
111 | return page_address(page); | |
112 | } | |
113 | ||
87be2f88 JDA |
114 | static inline void kunmap(struct page *page) |
115 | { | |
f8dae006 | 116 | flush_kernel_dcache_page_addr(page_address(page)); |
87be2f88 | 117 | } |
20f4d3cb | 118 | |
a24401bc | 119 | static inline void *kmap_atomic(struct page *page) |
210501aa | 120 | { |
2cb7c9cb | 121 | preempt_disable(); |
210501aa JDA |
122 | pagefault_disable(); |
123 | return page_address(page); | |
124 | } | |
20f4d3cb | 125 | |
765aaafe | 126 | static inline void __kunmap_atomic(void *addr) |
210501aa | 127 | { |
f8dae006 | 128 | flush_kernel_dcache_page_addr(addr); |
210501aa | 129 | pagefault_enable(); |
2cb7c9cb | 130 | preempt_enable(); |
210501aa | 131 | } |
20f4d3cb | 132 | |
765aaafe JB |
133 | #define kmap_atomic_prot(page, prot) kmap_atomic(page) |
134 | #define kmap_atomic_pfn(pfn) kmap_atomic(pfn_to_page(pfn)) | |
20f4d3cb | 135 | |
1bcdd854 HD |
136 | #endif /* _PARISC_CACHEFLUSH_H */ |
137 |