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1da177e4 LT |
1 | #ifndef _PARISC_CACHEFLUSH_H |
2 | #define _PARISC_CACHEFLUSH_H | |
3 | ||
1da177e4 | 4 | #include <linux/mm.h> |
210501aa | 5 | #include <linux/uaccess.h> |
b7d45818 | 6 | #include <asm/tlbflush.h> |
1da177e4 LT |
7 | |
8 | /* The usual comment is "Caches aren't brain-dead on the <architecture>". | |
9 | * Unfortunately, that doesn't apply to PA-RISC. */ | |
10 | ||
d6ce8626 RC |
11 | /* Internal implementation */ |
12 | void flush_data_cache_local(void *); /* flushes local data-cache only */ | |
13 | void flush_instruction_cache_local(void *); /* flushes local code-cache only */ | |
1da177e4 | 14 | #ifdef CONFIG_SMP |
d6ce8626 RC |
15 | void flush_data_cache(void); /* flushes data-cache only (all processors) */ |
16 | void flush_instruction_cache(void); /* flushes i-cache only (all processors) */ | |
1da177e4 | 17 | #else |
d6ce8626 RC |
18 | #define flush_data_cache() flush_data_cache_local(NULL) |
19 | #define flush_instruction_cache() flush_instruction_cache_local(NULL) | |
1da177e4 LT |
20 | #endif |
21 | ||
ec8c0446 RB |
22 | #define flush_cache_dup_mm(mm) flush_cache_mm(mm) |
23 | ||
d6ce8626 RC |
24 | void flush_user_icache_range_asm(unsigned long, unsigned long); |
25 | void flush_kernel_icache_range_asm(unsigned long, unsigned long); | |
26 | void flush_user_dcache_range_asm(unsigned long, unsigned long); | |
27 | void flush_kernel_dcache_range_asm(unsigned long, unsigned long); | |
28 | void flush_kernel_dcache_page_asm(void *); | |
29 | void flush_kernel_icache_page(void *); | |
1da177e4 | 30 | |
d6ce8626 | 31 | /* Cache flush operations */ |
1da177e4 | 32 | |
d6ce8626 RC |
33 | void flush_cache_all_local(void); |
34 | void flush_cache_all(void); | |
35 | void flush_cache_mm(struct mm_struct *mm); | |
1da177e4 | 36 | |
8e1964a9 JB |
37 | #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE |
38 | void flush_kernel_dcache_page_addr(void *addr); | |
39 | static inline void flush_kernel_dcache_page(struct page *page) | |
40 | { | |
41 | flush_kernel_dcache_page_addr(page_address(page)); | |
42 | } | |
43 | ||
d6ce8626 RC |
44 | #define flush_kernel_dcache_range(start,size) \ |
45 | flush_kernel_dcache_range_asm((start), (start)+(size)); | |
8e1964a9 | 46 | |
316ec062 JDA |
47 | void flush_kernel_vmap_range(void *vaddr, int size); |
48 | void invalidate_kernel_vmap_range(void *vaddr, int size); | |
1da177e4 LT |
49 | |
50 | #define flush_cache_vmap(start, end) flush_cache_all() | |
51 | #define flush_cache_vunmap(start, end) flush_cache_all() | |
52 | ||
2d4dc890 | 53 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 |
1da177e4 LT |
54 | extern void flush_dcache_page(struct page *page); |
55 | ||
56 | #define flush_dcache_mmap_lock(mapping) \ | |
19fd6231 | 57 | spin_lock_irq(&(mapping)->tree_lock) |
1da177e4 | 58 | #define flush_dcache_mmap_unlock(mapping) \ |
19fd6231 | 59 | spin_unlock_irq(&(mapping)->tree_lock) |
1da177e4 | 60 | |
d6ce8626 RC |
61 | #define flush_icache_page(vma,page) do { \ |
62 | flush_kernel_dcache_page(page); \ | |
63 | flush_kernel_icache_page(page_address(page)); \ | |
64 | } while (0) | |
1da177e4 | 65 | |
d6ce8626 RC |
66 | #define flush_icache_range(s,e) do { \ |
67 | flush_kernel_dcache_range_asm(s,e); \ | |
68 | flush_kernel_icache_range_asm(s,e); \ | |
69 | } while (0) | |
1da177e4 LT |
70 | |
71 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | |
72 | do { \ | |
73 | flush_cache_page(vma, vaddr, page_to_pfn(page)); \ | |
74 | memcpy(dst, src, len); \ | |
75 | flush_kernel_dcache_range_asm((unsigned long)dst, (unsigned long)dst + len); \ | |
76 | } while (0) | |
77 | ||
78 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ | |
79 | do { \ | |
80 | flush_cache_page(vma, vaddr, page_to_pfn(page)); \ | |
81 | memcpy(dst, src, len); \ | |
82 | } while (0) | |
83 | ||
d6ce8626 RC |
84 | void flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long pfn); |
85 | void flush_cache_range(struct vm_area_struct *vma, | |
86 | unsigned long start, unsigned long end); | |
1bcdd854 | 87 | |
f311847c JB |
88 | /* defined in pacache.S exported in cache.c used by flush_anon_page */ |
89 | void flush_dcache_page_asm(unsigned long phys_addr, unsigned long vaddr); | |
90 | ||
d6ce8626 | 91 | #define ARCH_HAS_FLUSH_ANON_PAGE |
ab43227c | 92 | static inline void |
a6f36be3 | 93 | flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr) |
ab43227c | 94 | { |
b7d45818 JB |
95 | if (PageAnon(page)) { |
96 | flush_tlb_page(vma, vmaddr); | |
027f27c4 | 97 | preempt_disable(); |
f311847c | 98 | flush_dcache_page_asm(page_to_phys(page), vmaddr); |
027f27c4 | 99 | preempt_enable(); |
b7d45818 | 100 | } |
ab43227c | 101 | } |
ab43227c | 102 | |
bb735019 KM |
103 | #include <asm/kmap_types.h> |
104 | ||
20f4d3cb JB |
105 | #define ARCH_HAS_KMAP |
106 | ||
20f4d3cb JB |
107 | static inline void *kmap(struct page *page) |
108 | { | |
109 | might_sleep(); | |
110 | return page_address(page); | |
111 | } | |
112 | ||
87be2f88 JDA |
113 | static inline void kunmap(struct page *page) |
114 | { | |
f8dae006 | 115 | flush_kernel_dcache_page_addr(page_address(page)); |
87be2f88 | 116 | } |
20f4d3cb | 117 | |
a24401bc | 118 | static inline void *kmap_atomic(struct page *page) |
210501aa | 119 | { |
2cb7c9cb | 120 | preempt_disable(); |
210501aa JDA |
121 | pagefault_disable(); |
122 | return page_address(page); | |
123 | } | |
20f4d3cb | 124 | |
765aaafe | 125 | static inline void __kunmap_atomic(void *addr) |
210501aa | 126 | { |
f8dae006 | 127 | flush_kernel_dcache_page_addr(addr); |
210501aa | 128 | pagefault_enable(); |
2cb7c9cb | 129 | preempt_enable(); |
210501aa | 130 | } |
20f4d3cb | 131 | |
765aaafe JB |
132 | #define kmap_atomic_prot(page, prot) kmap_atomic(page) |
133 | #define kmap_atomic_pfn(pfn) kmap_atomic(pfn_to_page(pfn)) | |
20f4d3cb | 134 | |
1bcdd854 HD |
135 | #endif /* _PARISC_CACHEFLUSH_H */ |
136 |