[mirror_ubuntu-jammy-kernel.git] / arch / parisc / include / asm / io.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_IO_H
#define _ASM_IO_H

#include <linux/types.h>
#include <linux/pgtable.h>

#define virt_to_phys(a) ((unsigned long)__pa(a))
#define phys_to_virt(a) __va(a)
#define virt_to_bus virt_to_phys
#define bus_to_virt phys_to_virt

static inline unsigned long isa_bus_to_virt(unsigned long addr) {
	BUG();
	return 0;
}

static inline unsigned long isa_virt_to_bus(void *addr) {
	BUG();
	return 0;
}

/*
 * Memory mapped I/O
 *
 * readX()/writeX() do byteswapping and take an ioremapped address
 * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
 * gsc_*() don't byteswap and operate on physical addresses;
 *   eg dev->hpa or 0xfee00000.
 */

static inline unsigned char gsc_readb(unsigned long addr)
{
	long flags;
	unsigned char ret;

	__asm__ __volatile__(
	"	rsm	%3,%0\n"
	"	ldbx	0(%2),%1\n"
	"	mtsm	%0\n"
	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );

	return ret;
}

static inline unsigned short gsc_readw(unsigned long addr)
{
	long flags;
	unsigned short ret;

	__asm__ __volatile__(
	"	rsm	%3,%0\n"
	"	ldhx	0(%2),%1\n"
	"	mtsm	%0\n"
	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );

	return ret;
}

static inline unsigned int gsc_readl(unsigned long addr)
{
	u32 ret;

	__asm__ __volatile__(
	"	ldwax	0(%1),%0\n"
	: "=r" (ret) : "r" (addr) );

	return ret;
}

static inline unsigned long long gsc_readq(unsigned long addr)
{
	unsigned long long ret;

#ifdef CONFIG_64BIT
	__asm__ __volatile__(
	"	ldda	0(%1),%0\n"
	:  "=r" (ret) : "r" (addr) );
#else
	/* two reads may have side effects.. */
	ret = ((u64) gsc_readl(addr)) << 32;
	ret |= gsc_readl(addr+4);
#endif
	return ret;
}

static inline void gsc_writeb(unsigned char val, unsigned long addr)
{
	long flags;
	__asm__ __volatile__(
	"	rsm	%3,%0\n"
	"	stbs	%1,0(%2)\n"
	"	mtsm	%0\n"
	: "=&r" (flags) :  "r" (val), "r" (addr), "i" (PSW_SM_D) );
}

static inline void gsc_writew(unsigned short val, unsigned long addr)
{
	long flags;
	__asm__ __volatile__(
	"	rsm	%3,%0\n"
	"	sths	%1,0(%2)\n"
	"	mtsm	%0\n"
	: "=&r" (flags) :  "r" (val), "r" (addr), "i" (PSW_SM_D) );
}

static inline void gsc_writel(unsigned int val, unsigned long addr)
{
	__asm__ __volatile__(
	"	stwas	%0,0(%1)\n"
	: :  "r" (val), "r" (addr) );
}

static inline void gsc_writeq(unsigned long long val, unsigned long addr)
{
#ifdef CONFIG_64BIT
	__asm__ __volatile__(
	"	stda	%0,0(%1)\n"
	: :  "r" (val), "r" (addr) );
#else
	/* two writes may have side effects.. */
	gsc_writel(val >> 32, addr);
	gsc_writel(val, addr+4);
#endif
}

/*
 * The standard PCI ioremap interfaces
 */
void __iomem *ioremap(unsigned long offset, unsigned long size);
#define ioremap_wc			ioremap
#define ioremap_uc			ioremap

extern void iounmap(const volatile void __iomem *addr);

static inline unsigned char __raw_readb(const volatile void __iomem *addr)
{
	return (*(volatile unsigned char __force *) (addr));
}
static inline unsigned short __raw_readw(const volatile void __iomem *addr)
{
	return *(volatile unsigned short __force *) addr;
}
static inline unsigned int __raw_readl(const volatile void __iomem *addr)
{
	return *(volatile unsigned int __force *) addr;
}
static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
{
	return *(volatile unsigned long long __force *) addr;
}

static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
{
	*(volatile unsigned char __force *) addr = b;
}
static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
{
	*(volatile unsigned short __force *) addr = b;
}
static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
{
	*(volatile unsigned int __force *) addr = b;
}
static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
{
	*(volatile unsigned long long __force *) addr = b;
}

static inline unsigned char readb(const volatile void __iomem *addr)
{
	return __raw_readb(addr);
}
static inline unsigned short readw(const volatile void __iomem *addr)
{
	return le16_to_cpu((__le16 __force) __raw_readw(addr));
}
static inline unsigned int readl(const volatile void __iomem *addr)
{
	return le32_to_cpu((__le32 __force) __raw_readl(addr));
}
static inline unsigned long long readq(const volatile void __iomem *addr)
{
	return le64_to_cpu((__le64 __force) __raw_readq(addr));
}

static inline void writeb(unsigned char b, volatile void __iomem *addr)
{
	__raw_writeb(b, addr);
}
static inline void writew(unsigned short w, volatile void __iomem *addr)
{
	__raw_writew((__u16 __force) cpu_to_le16(w), addr);
}
static inline void writel(unsigned int l, volatile void __iomem *addr)
{
	__raw_writel((__u32 __force) cpu_to_le32(l), addr);
}
static inline void writeq(unsigned long long q, volatile void __iomem *addr)
{
	__raw_writeq((__u64 __force) cpu_to_le64(q), addr);
}

#define	readb	readb
#define	readw	readw
#define	readl	readl
#define readq	readq
#define writeb	writeb
#define writew	writew
#define writel	writel
#define writeq	writeq

#define readb_relaxed(addr)	readb(addr)
#define readw_relaxed(addr)	readw(addr)
#define readl_relaxed(addr)	readl(addr)
#define readq_relaxed(addr)	readq(addr)
#define writeb_relaxed(b, addr)	writeb(b, addr)
#define writew_relaxed(w, addr)	writew(w, addr)
#define writel_relaxed(l, addr)	writel(l, addr)
#define writeq_relaxed(q, addr)	writeq(q, addr)

void memset_io(volatile void __iomem *addr, unsigned char val, int count);
void memcpy_fromio(void *dst, const volatile void __iomem *src, int count);
void memcpy_toio(volatile void __iomem *dst, const void *src, int count);

/* Port-space IO */

#define inb_p inb
#define inw_p inw
#define inl_p inl
#define outb_p outb
#define outw_p outw
#define outl_p outl

extern unsigned char eisa_in8(unsigned short port);
extern unsigned short eisa_in16(unsigned short port);
extern unsigned int eisa_in32(unsigned short port);
extern void eisa_out8(unsigned char data, unsigned short port);
extern void eisa_out16(unsigned short data, unsigned short port);
extern void eisa_out32(unsigned int data, unsigned short port);

#if defined(CONFIG_PCI)
extern unsigned char inb(int addr);
extern unsigned short inw(int addr);
extern unsigned int inl(int addr);

extern void outb(unsigned char b, int addr);
extern void outw(unsigned short b, int addr);
extern void outl(unsigned int b, int addr);
#elif defined(CONFIG_EISA)
#define inb eisa_in8
#define inw eisa_in16
#define inl eisa_in32
#define outb eisa_out8
#define outw eisa_out16
#define outl eisa_out32
#else
static inline char inb(unsigned long addr)
{
	BUG();
	return -1;
}

static inline short inw(unsigned long addr)
{
	BUG();
	return -1;
}

static inline int inl(unsigned long addr)
{
	BUG();
	return -1;
}

#define outb(x, y)	BUG()
#define outw(x, y)	BUG()
#define outl(x, y)	BUG()
#endif

/*
 * String versions of in/out ops:
 */
extern void insb (unsigned long port, void *dst, unsigned long count);
extern void insw (unsigned long port, void *dst, unsigned long count);
extern void insl (unsigned long port, void *dst, unsigned long count);
extern void outsb (unsigned long port, const void *src, unsigned long count);
extern void outsw (unsigned long port, const void *src, unsigned long count);
extern void outsl (unsigned long port, const void *src, unsigned long count);


/* IO Port space is :      BBiiii   where BB is HBA number. */
#define IO_SPACE_LIMIT 0x00ffffff

/* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
 * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
 * mode (essentially just sign extending.  This macro takes in a 32
 * bit I/O address (still with the leading f) and outputs the correct
 * value for either 32 or 64 bit mode */
#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL)))

#define ioread64 ioread64
#define ioread64be ioread64be
#define iowrite64 iowrite64
#define iowrite64be iowrite64be
extern u64 ioread64(void __iomem *addr);
extern u64 ioread64be(void __iomem *addr);
extern void iowrite64(u64 val, void __iomem *addr);
extern void iowrite64be(u64 val, void __iomem *addr);

#include <asm-generic/iomap.h>

/*
 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 * access
 */
#define xlate_dev_mem_ptr(p)	__va(p)

/*
 * Convert a virtual cached pointer to an uncached pointer
 */
#define xlate_dev_kmem_ptr(p)	p

#endif
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4 LT	2	#ifndef _ASM_IO_H
	3	#define _ASM_IO_H
	4
1da177e4	5	#include <linux/types.h>
ca5999fd	6	#include <linux/pgtable.h>
1da177e4	7
1da177e4 LT	8	#define virt_to_phys(a) ((unsigned long)__pa(a))
	9	#define phys_to_virt(a) __va(a)
	10	#define virt_to_bus virt_to_phys
	11	#define bus_to_virt phys_to_virt
	12
fabb8ff4 KM	13	static inline unsigned long isa_bus_to_virt(unsigned long addr) {
	14	BUG();
	15	return 0;
	16	}
	17
	18	static inline unsigned long isa_virt_to_bus(void *addr) {
	19	BUG();
	20	return 0;
	21	}
	22
1da177e4 LT	23	/*
	24	* Memory mapped I/O
	25	*
	26	* readX()/writeX() do byteswapping and take an ioremapped address
	27	* __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address.
	28	* gsc_*() don't byteswap and operate on physical addresses;
	29	* eg dev->hpa or 0xfee00000.
	30	*/
	31
1da177e4 LT	32	static inline unsigned char gsc_readb(unsigned long addr)
	33	{
	34	long flags;
	35	unsigned char ret;
	36
1da177e4	37	__asm__ __volatile__(
3f4fb108	38	" rsm %3,%0\n"
1da177e4 LT	39	" ldbx 0(%2),%1\n"
1da177e4 LT	40	" mtsm %0\n"
3f4fb108	41	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
1da177e4 LT	42
	43	return ret;
	44	}
	45
	46	static inline unsigned short gsc_readw(unsigned long addr)
	47	{
	48	long flags;
	49	unsigned short ret;
	50
1da177e4	51	__asm__ __volatile__(
3f4fb108	52	" rsm %3,%0\n"
1da177e4 LT	53	" ldhx 0(%2),%1\n"
1da177e4 LT	54	" mtsm %0\n"
3f4fb108	55	: "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) );
1da177e4 LT	56
	57	return ret;
	58	}
	59
	60	static inline unsigned int gsc_readl(unsigned long addr)
	61	{
	62	u32 ret;
	63
1da177e4 LT	64	__asm__ __volatile__(
	65	" ldwax 0(%1),%0\n"
	66	: "=r" (ret) : "r" (addr) );
	67
	68	return ret;
	69	}
	70
	71	static inline unsigned long long gsc_readq(unsigned long addr)
	72	{
	73	unsigned long long ret;
1da177e4	74
513e7ecd	75	#ifdef CONFIG_64BIT
1da177e4 LT	76	__asm__ __volatile__(
	77	" ldda 0(%1),%0\n"
	78	: "=r" (ret) : "r" (addr) );
	79	#else
	80	/* two reads may have side effects.. */
	81	ret = ((u64) gsc_readl(addr)) << 32;
	82	ret \|= gsc_readl(addr+4);
	83	#endif
	84	return ret;
	85	}
	86
	87	static inline void gsc_writeb(unsigned char val, unsigned long addr)
	88	{
	89	long flags;
1da177e4	90	__asm__ __volatile__(
3f4fb108	91	" rsm %3,%0\n"
1da177e4 LT	92	" stbs %1,0(%2)\n"
1da177e4 LT	93	" mtsm %0\n"
3f4fb108	94	: "=&r" (flags) : "r" (val), "r" (addr), "i" (PSW_SM_D) );
1da177e4 LT	95	}
	96
	97	static inline void gsc_writew(unsigned short val, unsigned long addr)
	98	{
	99	long flags;
1da177e4	100	__asm__ __volatile__(
3f4fb108	101	" rsm %3,%0\n"
1da177e4 LT	102	" sths %1,0(%2)\n"
1da177e4 LT	103	" mtsm %0\n"
3f4fb108	104	: "=&r" (flags) : "r" (val), "r" (addr), "i" (PSW_SM_D) );
1da177e4 LT	105	}
	106
	107	static inline void gsc_writel(unsigned int val, unsigned long addr)
	108	{
1da177e4 LT	109	__asm__ __volatile__(
	110	" stwas %0,0(%1)\n"
	111	: : "r" (val), "r" (addr) );
	112	}
	113
	114	static inline void gsc_writeq(unsigned long long val, unsigned long addr)
	115	{
513e7ecd	116	#ifdef CONFIG_64BIT
1da177e4 LT	117	__asm__ __volatile__(
	118	" stda %0,0(%1)\n"
	119	: : "r" (val), "r" (addr) );
	120	#else
	121	/* two writes may have side effects.. */
	122	gsc_writel(val >> 32, addr);
	123	gsc_writel(val, addr+4);
	124	#endif
	125	}
	126
	127	/*
	128	* The standard PCI ioremap interfaces
	129	*/
a1fd79ad	130	void __iomem *ioremap(unsigned long offset, unsigned long size);
4bdc0d67 CH	131	#define ioremap_wc ioremap
4bdc0d67 CH	132	#define ioremap_uc ioremap
1da177e4	133
01232e93	134	extern void iounmap(const volatile void __iomem *addr);
1da177e4	135
1da177e4 LT	136	static inline unsigned char __raw_readb(const volatile void __iomem *addr)
	137	{
	138	return ((volatile unsigned char __force ) (addr));
	139	}
	140	static inline unsigned short __raw_readw(const volatile void __iomem *addr)
	141	{
	142	return (volatile unsigned short __force ) addr;
	143	}
	144	static inline unsigned int __raw_readl(const volatile void __iomem *addr)
	145	{
	146	return (volatile unsigned int __force ) addr;
	147	}
	148	static inline unsigned long long __raw_readq(const volatile void __iomem *addr)
	149	{
	150	return (volatile unsigned long long __force ) addr;
	151	}
	152
	153	static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr)
	154	{
	155	(volatile unsigned char __force ) addr = b;
	156	}
	157	static inline void __raw_writew(unsigned short b, volatile void __iomem *addr)
	158	{
	159	(volatile unsigned short __force ) addr = b;
	160	}
	161	static inline void __raw_writel(unsigned int b, volatile void __iomem *addr)
	162	{
	163	(volatile unsigned int __force ) addr = b;
	164	}
	165	static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr)
	166	{
	167	(volatile unsigned long long __force ) addr = b;
	168	}
1da177e4	169
9dfe914d KM	170	static inline unsigned char readb(const volatile void __iomem *addr)
	171	{
	172	return __raw_readb(addr);
	173	}
	174	static inline unsigned short readw(const volatile void __iomem *addr)
	175	{
184b922c	176	return le16_to_cpu((__le16 __force) __raw_readw(addr));
9dfe914d KM	177	}
	178	static inline unsigned int readl(const volatile void __iomem *addr)
	179	{
184b922c	180	return le32_to_cpu((__le32 __force) __raw_readl(addr));
9dfe914d KM	181	}
	182	static inline unsigned long long readq(const volatile void __iomem *addr)
	183	{
184b922c	184	return le64_to_cpu((__le64 __force) __raw_readq(addr));
9dfe914d KM	185	}
	186
	187	static inline void writeb(unsigned char b, volatile void __iomem *addr)
	188	{
	189	__raw_writeb(b, addr);
	190	}
	191	static inline void writew(unsigned short w, volatile void __iomem *addr)
	192	{
184b922c	193	__raw_writew((__u16 __force) cpu_to_le16(w), addr);
9dfe914d KM	194	}
	195	static inline void writel(unsigned int l, volatile void __iomem *addr)
	196	{
184b922c	197	__raw_writel((__u32 __force) cpu_to_le32(l), addr);
9dfe914d KM	198	}
	199	static inline void writeq(unsigned long long q, volatile void __iomem *addr)
	200	{
184b922c	201	__raw_writeq((__u64 __force) cpu_to_le64(q), addr);
9dfe914d	202	}
1da177e4	203
0cb385e3 KM	204	#define readb readb
	205	#define readw readw
	206	#define readl readl
	207	#define readq readq
	208	#define writeb writeb
	209	#define writew writew
	210	#define writel writel
	211	#define writeq writeq
	212
2f083481 WD	213	#define readb_relaxed(addr) readb(addr)
	214	#define readw_relaxed(addr) readw(addr)
	215	#define readl_relaxed(addr) readl(addr)
	216	#define readq_relaxed(addr) readq(addr)
	217	#define writeb_relaxed(b, addr) writeb(b, addr)
	218	#define writew_relaxed(w, addr) writew(w, addr)
	219	#define writel_relaxed(l, addr) writel(l, addr)
	220	#define writeq_relaxed(q, addr) writeq(q, addr)
1da177e4	221
1da177e4 LT	222	void memset_io(volatile void __iomem *addr, unsigned char val, int count);
	223	void memcpy_fromio(void dst, const volatile void __iomem src, int count);
	224	void memcpy_toio(volatile void __iomem dst, const void src, int count);
	225
1da177e4 LT	226	/* Port-space IO */
	227
	228	#define inb_p inb
	229	#define inw_p inw
	230	#define inl_p inl
	231	#define outb_p outb
	232	#define outw_p outw
	233	#define outl_p outl
	234
	235	extern unsigned char eisa_in8(unsigned short port);
	236	extern unsigned short eisa_in16(unsigned short port);
	237	extern unsigned int eisa_in32(unsigned short port);
	238	extern void eisa_out8(unsigned char data, unsigned short port);
	239	extern void eisa_out16(unsigned short data, unsigned short port);
	240	extern void eisa_out32(unsigned int data, unsigned short port);
	241
	242	#if defined(CONFIG_PCI)
	243	extern unsigned char inb(int addr);
	244	extern unsigned short inw(int addr);
	245	extern unsigned int inl(int addr);
	246
	247	extern void outb(unsigned char b, int addr);
	248	extern void outw(unsigned short b, int addr);
	249	extern void outl(unsigned int b, int addr);
	250	#elif defined(CONFIG_EISA)
	251	#define inb eisa_in8
	252	#define inw eisa_in16
	253	#define inl eisa_in32
	254	#define outb eisa_out8
	255	#define outw eisa_out16
	256	#define outl eisa_out32
	257	#else
	258	static inline char inb(unsigned long addr)
	259	{
	260	BUG();
	261	return -1;
	262	}
	263
	264	static inline short inw(unsigned long addr)
	265	{
	266	BUG();
	267	return -1;
	268	}
	269
	270	static inline int inl(unsigned long addr)
	271	{
	272	BUG();
	273	return -1;
	274	}
	275
	276	#define outb(x, y) BUG()
	277	#define outw(x, y) BUG()
	278	#define outl(x, y) BUG()
	279	#endif
	280
	281	/*
	282	* String versions of in/out ops:
	283	*/
	284	extern void insb (unsigned long port, void *dst, unsigned long count);
	285	extern void insw (unsigned long port, void *dst, unsigned long count);
	286	extern void insl (unsigned long port, void *dst, unsigned long count);
	287	extern void outsb (unsigned long port, const void *src, unsigned long count);
	288	extern void outsw (unsigned long port, const void *src, unsigned long count);
	289	extern void outsl (unsigned long port, const void *src, unsigned long count);
290
291
292	/* IO Port space is : BBiiii where BB is HBA number. */
293	#define IO_SPACE_LIMIT 0x00ffffff
294
1da177e4 LT	295	/* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32
	296	* bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit
	297	* mode (essentially just sign extending. This macro takes in a 32
	298	* bit I/O address (still with the leading f) and outputs the correct
	299	* value for either 32 or 64 bit mode */
	300	#define F_EXTEND(x) ((unsigned long)((x) \| (0xffffffff00000000ULL)))
	301
7d1689a2 LG	302	#define ioread64 ioread64
	303	#define ioread64be ioread64be
	304	#define iowrite64 iowrite64
	305	#define iowrite64be iowrite64be
	306	extern u64 ioread64(void __iomem *addr);
	307	extern u64 ioread64be(void __iomem *addr);
	308	extern void iowrite64(u64 val, void __iomem *addr);
	309	extern void iowrite64be(u64 val, void __iomem *addr);
	310
1da177e4 LT	311	#include <asm-generic/iomap.h>
	312
	313	/*
	314	* Convert a physical pointer to a virtual kernel pointer for /dev/mem
	315	* access
	316	*/
	317	#define xlate_dev_mem_ptr(p) __va(p)
	318
	319	/*
	320	* Convert a virtual cached pointer to an uncached pointer
	321	*/
	322	#define xlate_dev_kmem_ptr(p) p
	323
	324	#endif