[mirror_ubuntu-zesty-kernel.git] / arch / parisc / kernel / hpmc.S

/* 
 * HPMC (High Priority Machine Check) handler.
 *
 * Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org>
 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
 * Copyright (C) 2000 Hewlett-Packard (John Marvin)
 *
 *    This program is free software; you can redistribute it and/or modify
 *    it under the terms of the GNU General Public License as published by
 *    the Free Software Foundation; either version 2, or (at your option)
 *    any later version.
 *
 *    This program is distributed in the hope that it will be useful,
 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *    GNU General Public License for more details.
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */


/*
 * This HPMC handler retrieves the HPMC pim data, resets IO and
 * returns to the default trap handler with code set to 1 (HPMC).
 * The default trap handler calls handle interruption, which
 * does a stack and register dump. This at least allows kernel
 * developers to get back to C code in virtual mode, where they
 * have the option to examine and print values from memory that
 * would help in debugging an HPMC caused by a software bug.
 *
 * There is more to do here:
 *
 *      1) On MP systems we need to synchronize processors
 *         before calling pdc/iodc.
 *      2) We should be checking the system state and not
 *         returning to the fault handler if things are really
 *         bad.
 *
 */

	.level		1.1

#include <asm/assembly.h>
#include <asm/pdc.h>

#include <linux/linkage.h>
#include <linux/init.h>

	/*
	 * stack for os_hpmc, the HPMC handler.
	 * buffer for IODC procedures (for the HPMC handler).
	 *
	 * IODC requires 7K byte stack.  That leaves 1K byte for os_hpmc.
	 */

	__PAGE_ALIGNED_BSS
	.align 4096
hpmc_stack:
	.block 16384

#define HPMC_IODC_BUF_SIZE 0x8000

	__PAGE_ALIGNED_BSS
	.align 4096
hpmc_iodc_buf:
	.block HPMC_IODC_BUF_SIZE

	.section .bss
	.align 8
hpmc_raddr:
	.block 128

#define HPMC_PIM_DATA_SIZE 896 /* Enough to hold all architected 2.0 state */

	.section .bss
	.align 8
ENTRY(hpmc_pim_data)
	.block HPMC_PIM_DATA_SIZE
END(hpmc_pim_data)

	.text

	.import intr_save, code
ENTRY_CFI(os_hpmc)
.os_hpmc:

	/*
	 * registers modified:
	 *
	 *   Using callee saves registers without saving them.  The
	 *   original values are in the pim dump if we need them.
	 *
	 *   r2   (rp)  return pointer
	 *   r3   address of PDCE_PROC
	 *   r4   scratch
	 *   r5   scratch
	 *   r23  (arg3) procedure arg
	 *   r24  (arg2) procedure arg
	 *   r25  (arg1) procedure arg
	 *   r26  (arg0) procedure arg
	 *   r30  (sp)   stack pointer
	 *
	 * registers read:
	 *
	 *   r26  contains address of PDCE_PROC on entry
	 *   r28  (ret0) return value from procedure
	 */

	copy    arg0, %r3       /* save address of PDCE_PROC */

	/*
	 *  disable nested HPMCs
	 *
	 * Increment os_hpmc checksum to invalidate it.
	 * Do this before turning the PSW M bit off.
	 */

	mfctl   %cr14, %r4
	ldw     52(%r4),%r5
	addi    1,%r5,%r5
	stw     %r5,52(%r4)

	/* MP_FIXME: synchronize all processors. */

	/* Setup stack pointer. */

	load32	PA(hpmc_stack),sp
	
	ldo     128(sp),sp /* leave room for arguments */

	/*
	 * Most PDC routines require that the M bit be off.
	 * So turn on the Q bit and turn off the M bit.
	 */

	ldo     8(%r0),%r4                       /* PSW Q on, PSW M off */
	mtctl   %r4,ipsw
	mtctl   %r0,pcsq
	mtctl   %r0,pcsq
	load32	PA(os_hpmc_1),%r4
	mtctl   %r4,pcoq
	ldo     4(%r4),%r4
	mtctl   %r4,pcoq
	rfi
	nop

os_hpmc_1:

	/* Call PDC_PIM to get HPMC pim info */

	/*
	 * Note that on some newer boxes, PDC_PIM must be called
	 * before PDC_IO if you want IO to be reset. PDC_PIM sets
	 * a flag that PDC_IO examines.
	 */

	ldo     PDC_PIM(%r0), arg0
	ldo     PDC_PIM_HPMC(%r0),arg1          /* Transfer HPMC data */
	load32	PA(hpmc_raddr),arg2
	load32	PA(hpmc_pim_data),arg3
	load32	HPMC_PIM_DATA_SIZE,%r4
	stw     %r4,-52(sp)

	ldil    L%PA(os_hpmc_2), rp
	bv      (r3)                            /* call pdce_proc */
	ldo     R%PA(os_hpmc_2)(rp), rp

os_hpmc_2:
	comib,<>  0,ret0, os_hpmc_fail

	/* Reset IO by calling the hversion dependent PDC_IO routine */

	ldo     PDC_IO(%r0),arg0
	ldo     0(%r0),arg1                     /* log IO errors */
	ldo     0(%r0),arg2                     /* reserved */
	ldo     0(%r0),arg3                     /* reserved */
	stw     %r0,-52(sp)                     /* reserved */

	ldil    L%PA(os_hpmc_3),rp
	bv      (%r3)                           /* call pdce_proc */
	ldo     R%PA(os_hpmc_3)(rp),rp

os_hpmc_3:

	/* FIXME? Check for errors from PDC_IO (-1 might be OK) */

	/*
	 * Initialize the IODC console device (HPA,SPA, path etc.
	 * are stored on page 0.
	 */

	/*
	 * Load IODC into hpmc_iodc_buf by calling PDC_IODC.
	 * Note that PDC_IODC handles flushing the appropriate
	 * data and instruction cache lines.
	 */

	ldo     PDC_IODC(%r0),arg0
	ldo     PDC_IODC_READ(%r0),arg1
	load32	PA(hpmc_raddr),arg2
	ldw     BOOT_CONSOLE_HPA_OFFSET(%r0),arg3 /* console hpa */
	ldo     PDC_IODC_RI_INIT(%r0),%r4
	stw     %r4,-52(sp)
	load32	PA(hpmc_iodc_buf),%r4
	stw     %r4,-56(sp)
	load32	HPMC_IODC_BUF_SIZE,%r4
	stw     %r4,-60(sp)

	ldil    L%PA(os_hpmc_4),rp
	bv      (%r3)                            /* call pdce_proc */
	ldo     R%PA(os_hpmc_4)(rp),rp

os_hpmc_4:
	comib,<>  0,ret0,os_hpmc_fail

	/* Call the entry init (just loaded by PDC_IODC) */

	ldw     BOOT_CONSOLE_HPA_OFFSET(%r0),arg0  /* console hpa */
	ldo     ENTRY_INIT_MOD_DEV(%r0), arg1
	ldw     BOOT_CONSOLE_SPA_OFFSET(%r0),arg2  /* console spa */
	depi    0,31,11,arg2                       /* clear bits 21-31    */
	ldo     BOOT_CONSOLE_PATH_OFFSET(%r0),arg3 /* console path */
	load32	PA(hpmc_raddr),%r4
	stw     %r4, -52(sp)
	stw     %r0, -56(sp)                    /* HV                  */
	stw     %r0, -60(sp)                    /* HV                  */
	stw     %r0, -64(sp)                    /* HV                  */
	stw     %r0, -68(sp)                    /* lang, must be zero  */

	load32	PA(hpmc_iodc_buf),%r5
	ldil    L%PA(os_hpmc_5),rp
	bv      (%r5)
	ldo     R%PA(os_hpmc_5)(rp),rp

os_hpmc_5:
	comib,<>  0,ret0,os_hpmc_fail

	/* Prepare to call intr_save */

	/*
	 * Load kernel page directory (load into user also, since
	 * we don't intend to ever return to user land anyway)
	 */

	load32		PA(swapper_pg_dir),%r4
	mtctl		%r4,%cr24	/* Initialize kernel root pointer */
	mtctl		%r4,%cr25	/* Initialize user root pointer */

	/* Clear sr4-sr7 */

	mtsp	%r0, %sr4
	mtsp	%r0, %sr5
	mtsp	%r0, %sr6
	mtsp	%r0, %sr7

	tovirt_r1 %r30      /* make sp virtual */

	rsm 8,%r0           /* Clear Q bit */
	ldi     1,%r8       /* Set trap code to "1" for HPMC */
	load32	PA(intr_save),%r1
	be      0(%sr7,%r1)
	nop

os_hpmc_fail:

	/*
	 * Reset the system
	 *
	 * Some systems may lockup from a broadcast reset, so try the
	 * hversion PDC_BROADCAST_RESET() first.
	 * MP_FIXME: reset all processors if more than one central bus.
	 */

	/* PDC_BROADCAST_RESET() */

	ldo     PDC_BROADCAST_RESET(%r0),arg0
	ldo     0(%r0),arg1                     /* do reset */

	ldil    L%PA(os_hpmc_6),rp
	bv      (%r3)                           /* call pdce_proc */
	ldo     R%PA(os_hpmc_6)(rp),rp

os_hpmc_6:

	/*
	 * possible return values:
	 *  -1  non-existent procedure
	 *  -2  non-existent option
	 *  -16 unaligned stack
	 *
	 * If call returned, do a broadcast reset.
	 */

	ldil    L%0xfffc0000,%r4        /* IO_BROADCAST */
	ldo     5(%r0),%r5
	stw     %r5,48(%r4)             /*  CMD_RESET to IO_COMMAND offset */

	b .
	nop
ENDPROC_CFI(os_hpmc)
.os_hpmc_end:


	__INITRODATA
	.export os_hpmc_size
os_hpmc_size:
	.word .os_hpmc_end-.os_hpmc
Commit	Line	Data
1da177e4 LT	1	/*
	2	* HPMC (High Priority Machine Check) handler.
	3	*
	4	* Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org>
	5	* Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
	6	* Copyright (C) 2000 Hewlett-Packard (John Marvin)
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2, or (at your option)
	11	* any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	21	*/
	22
	23
	24	/*
	25	* This HPMC handler retrieves the HPMC pim data, resets IO and
	26	* returns to the default trap handler with code set to 1 (HPMC).
	27	* The default trap handler calls handle interruption, which
	28	* does a stack and register dump. This at least allows kernel
	29	* developers to get back to C code in virtual mode, where they
	30	* have the option to examine and print values from memory that
	31	* would help in debugging an HPMC caused by a software bug.
	32	*
	33	* There is more to do here:
	34	*
	35	* 1) On MP systems we need to synchronize processors
	36	* before calling pdc/iodc.
	37	* 2) We should be checking the system state and not
	38	* returning to the fault handler if things are really
	39	* bad.
	40	*
	41	*/
	42
	43	.level 1.1
1da177e4 LT	44
	45	#include <asm/assembly.h>
	46	#include <asm/pdc.h>
	47
8e9e9844	48	#include <linux/linkage.h>
2929e738	49	#include <linux/init.h>
8e9e9844	50
1da177e4 LT	51	/*
	52	* stack for os_hpmc, the HPMC handler.
	53	* buffer for IODC procedures (for the HPMC handler).
	54	*
	55	* IODC requires 7K byte stack. That leaves 1K byte for os_hpmc.
	56	*/
	57
2929e738	58	__PAGE_ALIGNED_BSS
6a45716a	59	.align 4096
1da177e4 LT	60	hpmc_stack:
	61	.block 16384
	62
	63	#define HPMC_IODC_BUF_SIZE 0x8000
	64
2929e738	65	__PAGE_ALIGNED_BSS
6a45716a	66	.align 4096
1da177e4 LT	67	hpmc_iodc_buf:
	68	.block HPMC_IODC_BUF_SIZE
	69
2929e738	70	.section .bss
1da177e4 LT	71	.align 8
	72	hpmc_raddr:
	73	.block 128
	74
	75	#define HPMC_PIM_DATA_SIZE 896 /* Enough to hold all architected 2.0 state */
	76
2929e738	77	.section .bss
1da177e4	78	.align 8
8e9e9844	79	ENTRY(hpmc_pim_data)
1da177e4	80	.block HPMC_PIM_DATA_SIZE
8e9e9844	81	END(hpmc_pim_data)
1da177e4	82
dfcf753b	83	.text
1da177e4	84
1da177e4	85	.import intr_save, code
f39cce65	86	ENTRY_CFI(os_hpmc)
ae16489e	87	.os_hpmc:
1da177e4 LT	88
	89	/*
	90	* registers modified:
	91	*
	92	* Using callee saves registers without saving them. The
	93	* original values are in the pim dump if we need them.
	94	*
	95	* r2 (rp) return pointer
	96	* r3 address of PDCE_PROC
	97	* r4 scratch
	98	* r5 scratch
	99	* r23 (arg3) procedure arg
	100	* r24 (arg2) procedure arg
	101	* r25 (arg1) procedure arg
	102	* r26 (arg0) procedure arg
	103	* r30 (sp) stack pointer
	104	*
	105	* registers read:
	106	*
	107	* r26 contains address of PDCE_PROC on entry
	108	* r28 (ret0) return value from procedure
	109	*/
	110
	111	copy arg0, %r3 /* save address of PDCE_PROC */
	112
	113	/*
	114	* disable nested HPMCs
	115	*
	116	* Increment os_hpmc checksum to invalidate it.
	117	* Do this before turning the PSW M bit off.
	118	*/
	119
	120	mfctl %cr14, %r4
	121	ldw 52(%r4),%r5
	122	addi 1,%r5,%r5
	123	stw %r5,52(%r4)
	124
	125	/* MP_FIXME: synchronize all processors. */
	126
	127	/* Setup stack pointer. */
	128
	129	load32 PA(hpmc_stack),sp
	130
	131	ldo 128(sp),sp /* leave room for arguments */
	132
	133	/*
	134	* Most PDC routines require that the M bit be off.
	135	* So turn on the Q bit and turn off the M bit.
	136	*/
	137
	138	ldo 8(%r0),%r4 /* PSW Q on, PSW M off */
	139	mtctl %r4,ipsw
	140	mtctl %r0,pcsq
	141	mtctl %r0,pcsq
	142	load32 PA(os_hpmc_1),%r4
	143	mtctl %r4,pcoq
	144	ldo 4(%r4),%r4
	145	mtctl %r4,pcoq
	146	rfi
	147	nop
	148
	149	os_hpmc_1:
	150
	151	/* Call PDC_PIM to get HPMC pim info */
152
153	/*
154	* Note that on some newer boxes, PDC_PIM must be called
155	* before PDC_IO if you want IO to be reset. PDC_PIM sets
156	* a flag that PDC_IO examines.
157	*/
158
159	ldo PDC_PIM(%r0), arg0
160	ldo PDC_PIM_HPMC(%r0),arg1 /* Transfer HPMC data */
161	load32 PA(hpmc_raddr),arg2
162	load32 PA(hpmc_pim_data),arg3
163	load32 HPMC_PIM_DATA_SIZE,%r4
164	stw %r4,-52(sp)
165
166	ldil L%PA(os_hpmc_2), rp
167	bv (r3) /* call pdce_proc */
168	ldo R%PA(os_hpmc_2)(rp), rp
169
170	os_hpmc_2:
171	comib,<> 0,ret0, os_hpmc_fail
172
173	/* Reset IO by calling the hversion dependent PDC_IO routine */
174
175	ldo PDC_IO(%r0),arg0
176	ldo 0(%r0),arg1 /* log IO errors */
177	ldo 0(%r0),arg2 /* reserved */
178	ldo 0(%r0),arg3 /* reserved */
179	stw %r0,-52(sp) /* reserved */
180
181	ldil L%PA(os_hpmc_3),rp
182	bv (%r3) /* call pdce_proc */
183	ldo R%PA(os_hpmc_3)(rp),rp
184
185	os_hpmc_3:
186
187	/* FIXME? Check for errors from PDC_IO (-1 might be OK) */
188
189	/*
190	* Initialize the IODC console device (HPA,SPA, path etc.
191	* are stored on page 0.
192	*/
193
194	/*
195	* Load IODC into hpmc_iodc_buf by calling PDC_IODC.
196	* Note that PDC_IODC handles flushing the appropriate
197	* data and instruction cache lines.
198	*/
199
200	ldo PDC_IODC(%r0),arg0
201	ldo PDC_IODC_READ(%r0),arg1
202	load32 PA(hpmc_raddr),arg2
203	ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg3 /* console hpa */
204	ldo PDC_IODC_RI_INIT(%r0),%r4
205	stw %r4,-52(sp)
206	load32 PA(hpmc_iodc_buf),%r4
207	stw %r4,-56(sp)
208	load32 HPMC_IODC_BUF_SIZE,%r4
209	stw %r4,-60(sp)
210
211	ldil L%PA(os_hpmc_4),rp
212	bv (%r3) /* call pdce_proc */
213	ldo R%PA(os_hpmc_4)(rp),rp
214
215	os_hpmc_4:
216	comib,<> 0,ret0,os_hpmc_fail
217
218	/* Call the entry init (just loaded by PDC_IODC) */
219
220	ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg0 /* console hpa */
221	ldo ENTRY_INIT_MOD_DEV(%r0), arg1
222	ldw BOOT_CONSOLE_SPA_OFFSET(%r0),arg2 /* console spa */
223	depi 0,31,11,arg2 /* clear bits 21-31 */
224	ldo BOOT_CONSOLE_PATH_OFFSET(%r0),arg3 /* console path */
225	load32 PA(hpmc_raddr),%r4
226	stw %r4, -52(sp)
227	stw %r0, -56(sp) /* HV */
228	stw %r0, -60(sp) /* HV */
229	stw %r0, -64(sp) /* HV */
230	stw %r0, -68(sp) /* lang, must be zero */
231
232	load32 PA(hpmc_iodc_buf),%r5
233	ldil L%PA(os_hpmc_5),rp
234	bv (%r5)
235	ldo R%PA(os_hpmc_5)(rp),rp
236
237	os_hpmc_5:
238	comib,<> 0,ret0,os_hpmc_fail
239
240	/* Prepare to call intr_save */
241
242	/*
243	* Load kernel page directory (load into user also, since
244	* we don't intend to ever return to user land anyway)
245	*/
246
247	load32 PA(swapper_pg_dir),%r4
248	mtctl %r4,%cr24 /* Initialize kernel root pointer */
249	mtctl %r4,%cr25 /* Initialize user root pointer */
250
251	/* Clear sr4-sr7 */
252
253	mtsp %r0, %sr4
254	mtsp %r0, %sr5
255	mtsp %r0, %sr6
256	mtsp %r0, %sr7
257
258	tovirt_r1 %r30 /* make sp virtual */
259
260	rsm 8,%r0 /* Clear Q bit */
261	ldi 1,%r8 /* Set trap code to "1" for HPMC */
262	load32 PA(intr_save),%r1
263	be 0(%sr7,%r1)
264	nop
265
266	os_hpmc_fail:
267
268	/*
269	* Reset the system
270	*
271	* Some systems may lockup from a broadcast reset, so try the
272	* hversion PDC_BROADCAST_RESET() first.
273	* MP_FIXME: reset all processors if more than one central bus.
274	*/
275
276	/* PDC_BROADCAST_RESET() */
277
278	ldo PDC_BROADCAST_RESET(%r0),arg0
279	ldo 0(%r0),arg1 /* do reset */
280
281	ldil L%PA(os_hpmc_6),rp
282	bv (%r3) /* call pdce_proc */
283	ldo R%PA(os_hpmc_6)(rp),rp
284
285	os_hpmc_6:
286
287	/*
288	* possible return values:
289	* -1 non-existent procedure
290	* -2 non-existent option
291	* -16 unaligned stack
292	*
293	* If call returned, do a broadcast reset.
294	*/
295
296	ldil L%0xfffc0000,%r4 /* IO_BROADCAST */
297	ldo 5(%r0),%r5
298	stw %r5,48(%r4) /* CMD_RESET to IO_COMMAND offset */
299
300	b .
301	nop
f39cce65	302	ENDPROC_CFI(os_hpmc)
ae16489e	303	.os_hpmc_end:
2929e738 HD	304
	305
	306	__INITRODATA
ae16489e KM	307	.export os_hpmc_size
	308	os_hpmc_size:
	309	.word .os_hpmc_end-.os_hpmc