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1da177e4 LT |
1 | /* |
2 | * HPMC (High Priority Machine Check) handler. | |
3 | * | |
4 | * Copyright (C) 1999 Philipp Rumpf <prumpf@tux.org> | |
5 | * Copyright (C) 1999 Hewlett-Packard (Frank Rowand) | |
6 | * Copyright (C) 2000 Hewlett-Packard (John Marvin) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2, or (at your option) | |
11 | * any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | */ | |
22 | ||
23 | ||
24 | /* | |
25 | * This HPMC handler retrieves the HPMC pim data, resets IO and | |
26 | * returns to the default trap handler with code set to 1 (HPMC). | |
27 | * The default trap handler calls handle interruption, which | |
28 | * does a stack and register dump. This at least allows kernel | |
29 | * developers to get back to C code in virtual mode, where they | |
30 | * have the option to examine and print values from memory that | |
31 | * would help in debugging an HPMC caused by a software bug. | |
32 | * | |
33 | * There is more to do here: | |
34 | * | |
35 | * 1) On MP systems we need to synchronize processors | |
36 | * before calling pdc/iodc. | |
37 | * 2) We should be checking the system state and not | |
38 | * returning to the fault handler if things are really | |
39 | * bad. | |
40 | * | |
41 | */ | |
42 | ||
43 | .level 1.1 | |
44 | .data | |
45 | ||
46 | #include <asm/assembly.h> | |
47 | #include <asm/pdc.h> | |
48 | ||
8e9e9844 HD |
49 | #include <linux/linkage.h> |
50 | ||
1da177e4 LT |
51 | /* |
52 | * stack for os_hpmc, the HPMC handler. | |
53 | * buffer for IODC procedures (for the HPMC handler). | |
54 | * | |
55 | * IODC requires 7K byte stack. That leaves 1K byte for os_hpmc. | |
56 | */ | |
57 | ||
873d50e2 | 58 | .align PAGE_SIZE |
1da177e4 LT |
59 | hpmc_stack: |
60 | .block 16384 | |
61 | ||
62 | #define HPMC_IODC_BUF_SIZE 0x8000 | |
63 | ||
873d50e2 | 64 | .align PAGE_SIZE |
1da177e4 LT |
65 | hpmc_iodc_buf: |
66 | .block HPMC_IODC_BUF_SIZE | |
67 | ||
68 | .align 8 | |
69 | hpmc_raddr: | |
70 | .block 128 | |
71 | ||
72 | #define HPMC_PIM_DATA_SIZE 896 /* Enough to hold all architected 2.0 state */ | |
73 | ||
1da177e4 | 74 | .align 8 |
8e9e9844 | 75 | ENTRY(hpmc_pim_data) |
1da177e4 | 76 | .block HPMC_PIM_DATA_SIZE |
8e9e9844 | 77 | END(hpmc_pim_data) |
1da177e4 | 78 | |
dfcf753b | 79 | .text |
1da177e4 | 80 | |
1da177e4 | 81 | .import intr_save, code |
8e9e9844 | 82 | ENTRY(os_hpmc) |
ae16489e | 83 | .os_hpmc: |
1da177e4 LT |
84 | |
85 | /* | |
86 | * registers modified: | |
87 | * | |
88 | * Using callee saves registers without saving them. The | |
89 | * original values are in the pim dump if we need them. | |
90 | * | |
91 | * r2 (rp) return pointer | |
92 | * r3 address of PDCE_PROC | |
93 | * r4 scratch | |
94 | * r5 scratch | |
95 | * r23 (arg3) procedure arg | |
96 | * r24 (arg2) procedure arg | |
97 | * r25 (arg1) procedure arg | |
98 | * r26 (arg0) procedure arg | |
99 | * r30 (sp) stack pointer | |
100 | * | |
101 | * registers read: | |
102 | * | |
103 | * r26 contains address of PDCE_PROC on entry | |
104 | * r28 (ret0) return value from procedure | |
105 | */ | |
106 | ||
107 | copy arg0, %r3 /* save address of PDCE_PROC */ | |
108 | ||
109 | /* | |
110 | * disable nested HPMCs | |
111 | * | |
112 | * Increment os_hpmc checksum to invalidate it. | |
113 | * Do this before turning the PSW M bit off. | |
114 | */ | |
115 | ||
116 | mfctl %cr14, %r4 | |
117 | ldw 52(%r4),%r5 | |
118 | addi 1,%r5,%r5 | |
119 | stw %r5,52(%r4) | |
120 | ||
121 | /* MP_FIXME: synchronize all processors. */ | |
122 | ||
123 | /* Setup stack pointer. */ | |
124 | ||
125 | load32 PA(hpmc_stack),sp | |
126 | ||
127 | ldo 128(sp),sp /* leave room for arguments */ | |
128 | ||
129 | /* | |
130 | * Most PDC routines require that the M bit be off. | |
131 | * So turn on the Q bit and turn off the M bit. | |
132 | */ | |
133 | ||
134 | ldo 8(%r0),%r4 /* PSW Q on, PSW M off */ | |
135 | mtctl %r4,ipsw | |
136 | mtctl %r0,pcsq | |
137 | mtctl %r0,pcsq | |
138 | load32 PA(os_hpmc_1),%r4 | |
139 | mtctl %r4,pcoq | |
140 | ldo 4(%r4),%r4 | |
141 | mtctl %r4,pcoq | |
142 | rfi | |
143 | nop | |
144 | ||
145 | os_hpmc_1: | |
146 | ||
147 | /* Call PDC_PIM to get HPMC pim info */ | |
148 | ||
149 | /* | |
150 | * Note that on some newer boxes, PDC_PIM must be called | |
151 | * before PDC_IO if you want IO to be reset. PDC_PIM sets | |
152 | * a flag that PDC_IO examines. | |
153 | */ | |
154 | ||
155 | ldo PDC_PIM(%r0), arg0 | |
156 | ldo PDC_PIM_HPMC(%r0),arg1 /* Transfer HPMC data */ | |
157 | load32 PA(hpmc_raddr),arg2 | |
158 | load32 PA(hpmc_pim_data),arg3 | |
159 | load32 HPMC_PIM_DATA_SIZE,%r4 | |
160 | stw %r4,-52(sp) | |
161 | ||
162 | ldil L%PA(os_hpmc_2), rp | |
163 | bv (r3) /* call pdce_proc */ | |
164 | ldo R%PA(os_hpmc_2)(rp), rp | |
165 | ||
166 | os_hpmc_2: | |
167 | comib,<> 0,ret0, os_hpmc_fail | |
168 | ||
169 | /* Reset IO by calling the hversion dependent PDC_IO routine */ | |
170 | ||
171 | ldo PDC_IO(%r0),arg0 | |
172 | ldo 0(%r0),arg1 /* log IO errors */ | |
173 | ldo 0(%r0),arg2 /* reserved */ | |
174 | ldo 0(%r0),arg3 /* reserved */ | |
175 | stw %r0,-52(sp) /* reserved */ | |
176 | ||
177 | ldil L%PA(os_hpmc_3),rp | |
178 | bv (%r3) /* call pdce_proc */ | |
179 | ldo R%PA(os_hpmc_3)(rp),rp | |
180 | ||
181 | os_hpmc_3: | |
182 | ||
183 | /* FIXME? Check for errors from PDC_IO (-1 might be OK) */ | |
184 | ||
185 | /* | |
186 | * Initialize the IODC console device (HPA,SPA, path etc. | |
187 | * are stored on page 0. | |
188 | */ | |
189 | ||
190 | /* | |
191 | * Load IODC into hpmc_iodc_buf by calling PDC_IODC. | |
192 | * Note that PDC_IODC handles flushing the appropriate | |
193 | * data and instruction cache lines. | |
194 | */ | |
195 | ||
196 | ldo PDC_IODC(%r0),arg0 | |
197 | ldo PDC_IODC_READ(%r0),arg1 | |
198 | load32 PA(hpmc_raddr),arg2 | |
199 | ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg3 /* console hpa */ | |
200 | ldo PDC_IODC_RI_INIT(%r0),%r4 | |
201 | stw %r4,-52(sp) | |
202 | load32 PA(hpmc_iodc_buf),%r4 | |
203 | stw %r4,-56(sp) | |
204 | load32 HPMC_IODC_BUF_SIZE,%r4 | |
205 | stw %r4,-60(sp) | |
206 | ||
207 | ldil L%PA(os_hpmc_4),rp | |
208 | bv (%r3) /* call pdce_proc */ | |
209 | ldo R%PA(os_hpmc_4)(rp),rp | |
210 | ||
211 | os_hpmc_4: | |
212 | comib,<> 0,ret0,os_hpmc_fail | |
213 | ||
214 | /* Call the entry init (just loaded by PDC_IODC) */ | |
215 | ||
216 | ldw BOOT_CONSOLE_HPA_OFFSET(%r0),arg0 /* console hpa */ | |
217 | ldo ENTRY_INIT_MOD_DEV(%r0), arg1 | |
218 | ldw BOOT_CONSOLE_SPA_OFFSET(%r0),arg2 /* console spa */ | |
219 | depi 0,31,11,arg2 /* clear bits 21-31 */ | |
220 | ldo BOOT_CONSOLE_PATH_OFFSET(%r0),arg3 /* console path */ | |
221 | load32 PA(hpmc_raddr),%r4 | |
222 | stw %r4, -52(sp) | |
223 | stw %r0, -56(sp) /* HV */ | |
224 | stw %r0, -60(sp) /* HV */ | |
225 | stw %r0, -64(sp) /* HV */ | |
226 | stw %r0, -68(sp) /* lang, must be zero */ | |
227 | ||
228 | load32 PA(hpmc_iodc_buf),%r5 | |
229 | ldil L%PA(os_hpmc_5),rp | |
230 | bv (%r5) | |
231 | ldo R%PA(os_hpmc_5)(rp),rp | |
232 | ||
233 | os_hpmc_5: | |
234 | comib,<> 0,ret0,os_hpmc_fail | |
235 | ||
236 | /* Prepare to call intr_save */ | |
237 | ||
238 | /* | |
239 | * Load kernel page directory (load into user also, since | |
240 | * we don't intend to ever return to user land anyway) | |
241 | */ | |
242 | ||
243 | load32 PA(swapper_pg_dir),%r4 | |
244 | mtctl %r4,%cr24 /* Initialize kernel root pointer */ | |
245 | mtctl %r4,%cr25 /* Initialize user root pointer */ | |
246 | ||
247 | /* Clear sr4-sr7 */ | |
248 | ||
249 | mtsp %r0, %sr4 | |
250 | mtsp %r0, %sr5 | |
251 | mtsp %r0, %sr6 | |
252 | mtsp %r0, %sr7 | |
253 | ||
254 | tovirt_r1 %r30 /* make sp virtual */ | |
255 | ||
256 | rsm 8,%r0 /* Clear Q bit */ | |
257 | ldi 1,%r8 /* Set trap code to "1" for HPMC */ | |
258 | load32 PA(intr_save),%r1 | |
259 | be 0(%sr7,%r1) | |
260 | nop | |
261 | ||
262 | os_hpmc_fail: | |
263 | ||
264 | /* | |
265 | * Reset the system | |
266 | * | |
267 | * Some systems may lockup from a broadcast reset, so try the | |
268 | * hversion PDC_BROADCAST_RESET() first. | |
269 | * MP_FIXME: reset all processors if more than one central bus. | |
270 | */ | |
271 | ||
272 | /* PDC_BROADCAST_RESET() */ | |
273 | ||
274 | ldo PDC_BROADCAST_RESET(%r0),arg0 | |
275 | ldo 0(%r0),arg1 /* do reset */ | |
276 | ||
277 | ldil L%PA(os_hpmc_6),rp | |
278 | bv (%r3) /* call pdce_proc */ | |
279 | ldo R%PA(os_hpmc_6)(rp),rp | |
280 | ||
281 | os_hpmc_6: | |
282 | ||
283 | /* | |
284 | * possible return values: | |
285 | * -1 non-existent procedure | |
286 | * -2 non-existent option | |
287 | * -16 unaligned stack | |
288 | * | |
289 | * If call returned, do a broadcast reset. | |
290 | */ | |
291 | ||
292 | ldil L%0xfffc0000,%r4 /* IO_BROADCAST */ | |
293 | ldo 5(%r0),%r5 | |
294 | stw %r5,48(%r4) /* CMD_RESET to IO_COMMAND offset */ | |
295 | ||
296 | b . | |
297 | nop | |
8e9e9844 | 298 | ENDPROC(os_hpmc) |
ae16489e | 299 | .os_hpmc_end: |
1da177e4 | 300 | nop |
ae16489e KM |
301 | .data |
302 | .align 4 | |
303 | .export os_hpmc_size | |
304 | os_hpmc_size: | |
305 | .word .os_hpmc_end-.os_hpmc |