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Commit | Line | Data |
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071327ec | 1 | /* |
1da177e4 LT |
2 | * Initial setup-routines for HP 9000 based hardware. |
3 | * | |
4 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds | |
ef017beb | 5 | * Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de> |
1da177e4 LT |
6 | * Modifications copyright 1999 SuSE GmbH (Philipp Rumpf) |
7 | * Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net> | |
8 | * Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org> | |
9 | * Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net> | |
10 | * | |
11 | * Initial PA-RISC Version: 04-23-1999 by Helge Deller | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License as published by | |
15 | * the Free Software Foundation; either version 2, or (at your option) | |
16 | * any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, write to the Free Software | |
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
26 | * | |
27 | */ | |
1da177e4 LT |
28 | #include <linux/delay.h> |
29 | #include <linux/init.h> | |
30 | #include <linux/mm.h> | |
31 | #include <linux/module.h> | |
32 | #include <linux/seq_file.h> | |
33 | #include <linux/slab.h> | |
34 | #include <linux/cpu.h> | |
e8edc6e0 | 35 | #include <asm/param.h> |
1da177e4 LT |
36 | #include <asm/cache.h> |
37 | #include <asm/hardware.h> /* for register_parisc_driver() stuff */ | |
38 | #include <asm/processor.h> | |
39 | #include <asm/page.h> | |
40 | #include <asm/pdc.h> | |
41 | #include <asm/pdcpat.h> | |
42 | #include <asm/irq.h> /* for struct irq_region */ | |
43 | #include <asm/parisc-device.h> | |
44 | ||
8039de10 | 45 | struct system_cpuinfo_parisc boot_cpu_data __read_mostly; |
1da177e4 | 46 | EXPORT_SYMBOL(boot_cpu_data); |
fc632575 HD |
47 | #ifdef CONFIG_PA8X00 |
48 | int _parisc_requires_coherency __read_mostly; | |
49 | EXPORT_SYMBOL(_parisc_requires_coherency); | |
50 | #endif | |
1da177e4 | 51 | |
ef017beb | 52 | DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data); |
1da177e4 LT |
53 | |
54 | /* | |
55 | ** PARISC CPU driver - claim "device" and initialize CPU data structures. | |
56 | ** | |
57 | ** Consolidate per CPU initialization into (mostly) one module. | |
58 | ** Monarch CPU will initialize boot_cpu_data which shouldn't | |
59 | ** change once the system has booted. | |
60 | ** | |
61 | ** The callback *should* do per-instance initialization of | |
62 | ** everything including the monarch. "Per CPU" init code in | |
63 | ** setup.c:start_parisc() has migrated here and start_parisc() | |
64 | ** will call register_parisc_driver(&cpu_driver) before calling do_inventory(). | |
65 | ** | |
66 | ** The goal of consolidating CPU initialization into one place is | |
7022672e | 67 | ** to make sure all CPUs get initialized the same way. |
1da177e4 LT |
68 | ** The code path not shared is how PDC hands control of the CPU to the OS. |
69 | ** The initialization of OS data structures is the same (done below). | |
70 | */ | |
71 | ||
ef017beb HD |
72 | /** |
73 | * init_cpu_profiler - enable/setup per cpu profiling hooks. | |
74 | * @cpunum: The processor instance. | |
75 | * | |
76 | * FIXME: doesn't do much yet... | |
77 | */ | |
60ffef06 | 78 | static void |
ef017beb HD |
79 | init_percpu_prof(unsigned long cpunum) |
80 | { | |
ef017beb HD |
81 | } |
82 | ||
83 | ||
1da177e4 LT |
84 | /** |
85 | * processor_probe - Determine if processor driver should claim this device. | |
86 | * @dev: The device which has been found. | |
87 | * | |
88 | * Determine if processor driver should claim this chip (return 0) or not | |
89 | * (return 1). If so, initialize the chip and tell other partners in crime | |
90 | * they have work to do. | |
91 | */ | |
60ffef06 | 92 | static int processor_probe(struct parisc_device *dev) |
1da177e4 LT |
93 | { |
94 | unsigned long txn_addr; | |
95 | unsigned long cpuid; | |
96 | struct cpuinfo_parisc *p; | |
637250cc | 97 | struct pdc_pat_cpu_num cpu_info __maybe_unused; |
1da177e4 | 98 | |
f8b9e594 | 99 | #ifdef CONFIG_SMP |
bd071e1a RR |
100 | if (num_online_cpus() >= nr_cpu_ids) { |
101 | printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n"); | |
f8b9e594 KM |
102 | return 1; |
103 | } | |
104 | #else | |
1da177e4 LT |
105 | if (boot_cpu_data.cpu_count > 0) { |
106 | printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n"); | |
107 | return 1; | |
108 | } | |
109 | #endif | |
110 | ||
111 | /* logical CPU ID and update global counter | |
112 | * May get overwritten by PAT code. | |
113 | */ | |
114 | cpuid = boot_cpu_data.cpu_count; | |
53f01bba | 115 | txn_addr = dev->hpa.start; /* for legacy PDC */ |
1da177e4 | 116 | |
a8f44e38 | 117 | #ifdef CONFIG_64BIT |
1da177e4 LT |
118 | if (is_pdc_pat()) { |
119 | ulong status; | |
120 | unsigned long bytecnt; | |
64a0cdb0 | 121 | pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell; |
1da177e4 | 122 | |
64a0cdb0 KM |
123 | pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL); |
124 | if (!pa_pdc_cell) | |
125 | panic("couldn't allocate memory for PDC_PAT_CELL!"); | |
126 | ||
1da177e4 | 127 | status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc, |
64a0cdb0 | 128 | dev->mod_index, PA_VIEW, pa_pdc_cell); |
1da177e4 LT |
129 | |
130 | BUG_ON(PDC_OK != status); | |
131 | ||
132 | /* verify it's the same as what do_pat_inventory() found */ | |
64a0cdb0 KM |
133 | BUG_ON(dev->mod_info != pa_pdc_cell->mod_info); |
134 | BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location); | |
135 | ||
136 | txn_addr = pa_pdc_cell->mod[0]; /* id_eid for IO sapic */ | |
1da177e4 | 137 | |
64a0cdb0 | 138 | kfree(pa_pdc_cell); |
1da177e4 | 139 | |
637250cc HD |
140 | /* get the cpu number */ |
141 | status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start); | |
142 | BUG_ON(PDC_OK != status); | |
143 | ||
144 | pr_info("Logical CPU #%lu is physical cpu #%lu at location " | |
145 | "0x%lx with hpa %pa\n", | |
146 | cpuid, cpu_info.cpu_num, cpu_info.cpu_loc, | |
147 | &dev->hpa.start); | |
148 | ||
149 | #undef USE_PAT_CPUID | |
1da177e4 LT |
150 | #ifdef USE_PAT_CPUID |
151 | /* We need contiguous numbers for cpuid. Firmware's notion | |
152 | * of cpuid is for physical CPUs and we just don't care yet. | |
153 | * We'll care when we need to query PAT PDC about a CPU *after* | |
154 | * boot time (ie shutdown a CPU from an OS perspective). | |
155 | */ | |
1da177e4 | 156 | if (cpu_info.cpu_num >= NR_CPUS) { |
637250cc | 157 | printk(KERN_WARNING "IGNORING CPU at %pa," |
1da177e4 LT |
158 | " cpu_slot_id > NR_CPUS" |
159 | " (%ld > %d)\n", | |
637250cc | 160 | &dev->hpa.start, cpu_info.cpu_num, NR_CPUS); |
1da177e4 LT |
161 | /* Ignore CPU since it will only crash */ |
162 | boot_cpu_data.cpu_count--; | |
163 | return 1; | |
164 | } else { | |
165 | cpuid = cpu_info.cpu_num; | |
166 | } | |
167 | #endif | |
168 | } | |
169 | #endif | |
170 | ||
ef017beb | 171 | p = &per_cpu(cpu_data, cpuid); |
1da177e4 LT |
172 | boot_cpu_data.cpu_count++; |
173 | ||
7908a0c7 GG |
174 | /* initialize counters - CPU 0 gets it_value set in time_init() */ |
175 | if (cpuid) | |
176 | memset(p, 0, sizeof(struct cpuinfo_parisc)); | |
1da177e4 LT |
177 | |
178 | p->loops_per_jiffy = loops_per_jiffy; | |
179 | p->dev = dev; /* Save IODC data in case we need it */ | |
53f01bba | 180 | p->hpa = dev->hpa.start; /* save CPU hpa */ |
1da177e4 LT |
181 | p->cpuid = cpuid; /* save CPU id */ |
182 | p->txn_addr = txn_addr; /* save CPU IRQ address */ | |
183 | #ifdef CONFIG_SMP | |
1da177e4 LT |
184 | /* |
185 | ** FIXME: review if any other initialization is clobbered | |
ef017beb | 186 | ** for boot_cpu by the above memset(). |
1da177e4 | 187 | */ |
ef017beb | 188 | init_percpu_prof(cpuid); |
1da177e4 LT |
189 | #endif |
190 | ||
191 | /* | |
7022672e | 192 | ** CONFIG_SMP: init_smp_config() will attempt to get CPUs into |
1da177e4 LT |
193 | ** OS control. RENDEZVOUS is the default state - see mem_set above. |
194 | ** p->state = STATE_RENDEZVOUS; | |
195 | */ | |
196 | ||
197 | #if 0 | |
198 | /* CPU 0 IRQ table is statically allocated/initialized */ | |
199 | if (cpuid) { | |
200 | struct irqaction actions[]; | |
201 | ||
202 | /* | |
203 | ** itimer and ipi IRQ handlers are statically initialized in | |
204 | ** arch/parisc/kernel/irq.c. ie Don't need to register them. | |
205 | */ | |
206 | actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC); | |
207 | if (!actions) { | |
208 | /* not getting it's own table, share with monarch */ | |
209 | actions = cpu_irq_actions[0]; | |
210 | } | |
211 | ||
212 | cpu_irq_actions[cpuid] = actions; | |
213 | } | |
214 | #endif | |
215 | ||
216 | /* | |
217 | * Bring this CPU up now! (ignore bootstrap cpuid == 0) | |
218 | */ | |
219 | #ifdef CONFIG_SMP | |
220 | if (cpuid) { | |
9bc181d8 | 221 | set_cpu_present(cpuid, true); |
1da177e4 LT |
222 | cpu_up(cpuid); |
223 | } | |
224 | #endif | |
225 | ||
226 | return 0; | |
227 | } | |
228 | ||
229 | /** | |
230 | * collect_boot_cpu_data - Fill the boot_cpu_data structure. | |
231 | * | |
232 | * This function collects and stores the generic processor information | |
233 | * in the boot_cpu_data structure. | |
234 | */ | |
235 | void __init collect_boot_cpu_data(void) | |
236 | { | |
237 | memset(&boot_cpu_data, 0, sizeof(boot_cpu_data)); | |
238 | ||
239 | boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */ | |
240 | ||
241 | /* get CPU-Model Information... */ | |
242 | #define p ((unsigned long *)&boot_cpu_data.pdc.model) | |
243 | if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) | |
244 | printk(KERN_INFO | |
245 | "model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", | |
246 | p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]); | |
247 | #undef p | |
248 | ||
249 | if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) | |
250 | printk(KERN_INFO "vers %08lx\n", | |
251 | boot_cpu_data.pdc.versions); | |
252 | ||
253 | if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK) | |
254 | printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n", | |
255 | (boot_cpu_data.pdc.cpuid >> 5) & 127, | |
256 | boot_cpu_data.pdc.cpuid & 31, | |
257 | boot_cpu_data.pdc.cpuid); | |
258 | ||
259 | if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK) | |
260 | printk(KERN_INFO "capabilities 0x%lx\n", | |
261 | boot_cpu_data.pdc.capabilities); | |
262 | ||
263 | if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK) | |
264 | printk(KERN_INFO "model %s\n", | |
265 | boot_cpu_data.pdc.sys_model_name); | |
266 | ||
267 | boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion; | |
268 | boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion; | |
269 | ||
270 | boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion); | |
271 | boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0]; | |
272 | boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1]; | |
1da177e4 | 273 | |
fc632575 HD |
274 | #ifdef CONFIG_PA8X00 |
275 | _parisc_requires_coherency = (boot_cpu_data.cpu_type == mako) || | |
276 | (boot_cpu_data.cpu_type == mako2); | |
277 | #endif | |
278 | } | |
1da177e4 | 279 | |
1da177e4 LT |
280 | |
281 | /** | |
282 | * init_per_cpu - Handle individual processor initializations. | |
283 | * @cpunum: logical processor number. | |
284 | * | |
285 | * This function handles initialization for *every* CPU | |
286 | * in the system: | |
287 | * | |
288 | * o Set "default" CPU width for trap handlers | |
289 | * | |
290 | * o Enable FP coprocessor | |
291 | * REVISIT: this could be done in the "code 22" trap handler. | |
292 | * (frowands idea - that way we know which processes need FP | |
293 | * registers saved on the interrupt stack.) | |
294 | * NEWS FLASH: wide kernels need FP coprocessor enabled to handle | |
295 | * formatted printing of %lx for example (double divides I think) | |
296 | * | |
297 | * o Enable CPU profiling hooks. | |
298 | */ | |
60ffef06 | 299 | int init_per_cpu(int cpunum) |
1da177e4 LT |
300 | { |
301 | int ret; | |
302 | struct pdc_coproc_cfg coproc_cfg; | |
303 | ||
304 | set_firmware_width(); | |
305 | ret = pdc_coproc_cfg(&coproc_cfg); | |
306 | ||
307 | if(ret >= 0 && coproc_cfg.ccr_functional) { | |
308 | mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */ | |
309 | ||
310 | /* FWIW, FP rev/model is a more accurate way to determine | |
311 | ** CPU type. CPU rev/model has some ambiguous cases. | |
312 | */ | |
ef017beb HD |
313 | per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision; |
314 | per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model; | |
1da177e4 | 315 | |
0032c088 HD |
316 | if (cpunum == 0) |
317 | printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n", | |
318 | cpunum, coproc_cfg.revision, coproc_cfg.model); | |
1da177e4 LT |
319 | |
320 | /* | |
321 | ** store status register to stack (hopefully aligned) | |
322 | ** and clear the T-bit. | |
323 | */ | |
324 | asm volatile ("fstd %fr0,8(%sp)"); | |
325 | ||
326 | } else { | |
327 | printk(KERN_WARNING "WARNING: No FP CoProcessor?!" | |
328 | " (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n" | |
a8f44e38 | 329 | #ifdef CONFIG_64BIT |
1da177e4 LT |
330 | "Halting Machine - FP required\n" |
331 | #endif | |
332 | , coproc_cfg.ccr_functional); | |
a8f44e38 | 333 | #ifdef CONFIG_64BIT |
1da177e4 LT |
334 | mdelay(100); /* previous chars get pushed to console */ |
335 | panic("FP CoProc not reported"); | |
336 | #endif | |
337 | } | |
338 | ||
339 | /* FUTURE: Enable Performance Monitor : ccr bit 0x20 */ | |
340 | init_percpu_prof(cpunum); | |
341 | ||
342 | return ret; | |
343 | } | |
344 | ||
345 | /* | |
7022672e | 346 | * Display CPU info for all CPUs. |
1da177e4 LT |
347 | */ |
348 | int | |
349 | show_cpuinfo (struct seq_file *m, void *v) | |
350 | { | |
ef017beb | 351 | unsigned long cpu; |
1da177e4 | 352 | |
ef017beb HD |
353 | for_each_online_cpu(cpu) { |
354 | const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu); | |
1da177e4 | 355 | #ifdef CONFIG_SMP |
ef017beb | 356 | if (0 == cpuinfo->hpa) |
1da177e4 | 357 | continue; |
1da177e4 | 358 | #endif |
ef017beb | 359 | seq_printf(m, "processor\t: %lu\n" |
1da177e4 | 360 | "cpu family\t: PA-RISC %s\n", |
ef017beb | 361 | cpu, boot_cpu_data.family_name); |
1da177e4 LT |
362 | |
363 | seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name ); | |
364 | ||
365 | /* cpu MHz */ | |
366 | seq_printf(m, "cpu MHz\t\t: %d.%06d\n", | |
367 | boot_cpu_data.cpu_hz / 1000000, | |
368 | boot_cpu_data.cpu_hz % 1000000 ); | |
369 | ||
445c088f CW |
370 | seq_printf(m, "capabilities\t:"); |
371 | if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32) | |
30a9f0b2 | 372 | seq_puts(m, " os32"); |
445c088f | 373 | if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64) |
30a9f0b2 HD |
374 | seq_puts(m, " os64"); |
375 | if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC) | |
376 | seq_puts(m, " iopdir_fdc"); | |
377 | switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) { | |
378 | case PDC_MODEL_NVA_SUPPORTED: | |
379 | seq_puts(m, " nva_supported"); | |
380 | break; | |
381 | case PDC_MODEL_NVA_SLOW: | |
382 | seq_puts(m, " nva_slow"); | |
383 | break; | |
384 | case PDC_MODEL_NVA_UNSUPPORTED: | |
385 | seq_puts(m, " needs_equivalent_aliasing"); | |
386 | break; | |
387 | } | |
388 | seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities); | |
445c088f | 389 | |
1da177e4 LT |
390 | seq_printf(m, "model\t\t: %s\n" |
391 | "model name\t: %s\n", | |
392 | boot_cpu_data.pdc.sys_model_name, | |
ef017beb HD |
393 | cpuinfo->dev ? |
394 | cpuinfo->dev->name : "Unknown"); | |
1da177e4 LT |
395 | |
396 | seq_printf(m, "hversion\t: 0x%08x\n" | |
397 | "sversion\t: 0x%08x\n", | |
398 | boot_cpu_data.hversion, | |
399 | boot_cpu_data.sversion ); | |
400 | ||
401 | /* print cachesize info */ | |
402 | show_cache_info(m); | |
403 | ||
404 | seq_printf(m, "bogomips\t: %lu.%02lu\n", | |
ef017beb HD |
405 | cpuinfo->loops_per_jiffy / (500000 / HZ), |
406 | (cpuinfo->loops_per_jiffy / (5000 / HZ)) % 100); | |
1da177e4 LT |
407 | |
408 | seq_printf(m, "software id\t: %ld\n\n", | |
409 | boot_cpu_data.pdc.model.sw_id); | |
410 | } | |
411 | return 0; | |
412 | } | |
413 | ||
e9541d0c | 414 | static const struct parisc_device_id processor_tbl[] = { |
1da177e4 LT |
415 | { HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID }, |
416 | { 0, } | |
417 | }; | |
418 | ||
e9541d0c | 419 | static struct parisc_driver cpu_driver = { |
1da177e4 LT |
420 | .name = "CPU", |
421 | .id_table = processor_tbl, | |
422 | .probe = processor_probe | |
423 | }; | |
424 | ||
425 | /** | |
7022672e | 426 | * processor_init - Processor initialization procedure. |
1da177e4 LT |
427 | * |
428 | * Register this driver. | |
429 | */ | |
430 | void __init processor_init(void) | |
431 | { | |
432 | register_parisc_driver(&cpu_driver); | |
433 | } |