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b2441318 1// SPDX-License-Identifier: GPL-2.0
1da177e4
LT
2/*
3 * linux/arch/parisc/traps.c
4 *
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Copyright (C) 1999, 2000 Philipp Rumpf <prumpf@tux.org>
7 */
8
9/*
10 * 'Traps.c' handles hardware traps and faults after we have saved some
11 * state in 'asm.s'.
12 */
13
1da177e4 14#include <linux/sched.h>
b17b0153 15#include <linux/sched/debug.h>
1da177e4
LT
16#include <linux/kernel.h>
17#include <linux/string.h>
18#include <linux/errno.h>
19#include <linux/ptrace.h>
20#include <linux/timer.h>
22fced88 21#include <linux/delay.h>
1da177e4
LT
22#include <linux/mm.h>
23#include <linux/module.h>
24#include <linux/smp.h>
1da177e4
LT
25#include <linux/spinlock.h>
26#include <linux/init.h>
27#include <linux/interrupt.h>
28#include <linux/console.h>
6891f8a1 29#include <linux/bug.h>
fef47e2a 30#include <linux/ratelimit.h>
70ffdb93 31#include <linux/uaccess.h>
ec4d396b 32#include <linux/kdebug.h>
1da177e4
LT
33
34#include <asm/assembly.h>
1da177e4
LT
35#include <asm/io.h>
36#include <asm/irq.h>
37#include <asm/traps.h>
38#include <asm/unaligned.h>
60063497 39#include <linux/atomic.h>
1da177e4
LT
40#include <asm/smp.h>
41#include <asm/pdc.h>
42#include <asm/pdc_chassis.h>
43#include <asm/unwind.h>
d6ce8626
RC
44#include <asm/tlbflush.h>
45#include <asm/cacheflush.h>
eacbfce1 46#include <linux/kgdb.h>
8858ac8e 47#include <linux/kprobes.h>
1da177e4
LT
48
49#include "../math-emu/math-emu.h" /* for handle_fpe() */
50
9e0d5c45 51static void parisc_show_stack(struct task_struct *task,
3481d31b 52 struct pt_regs *regs, const char *loglvl);
dc39455e 53
6891f8a1 54static int printbinary(char *buf, unsigned long x, int nbits)
1da177e4
LT
55{
56 unsigned long mask = 1UL << (nbits - 1);
57 while (mask != 0) {
58 *buf++ = (mask & x ? '1' : '0');
59 mask >>= 1;
60 }
61 *buf = '\0';
62
63 return nbits;
64}
65
a8f44e38 66#ifdef CONFIG_64BIT
1da177e4
LT
67#define RFMT "%016lx"
68#else
69#define RFMT "%08lx"
70#endif
1c63b4b8 71#define FFMT "%016llx" /* fpregs are 64-bit always */
1da177e4 72
1c63b4b8
KM
73#define PRINTREGS(lvl,r,f,fmt,x) \
74 printk("%s%s%02d-%02d " fmt " " fmt " " fmt " " fmt "\n", \
75 lvl, f, (x), (x+3), (r)[(x)+0], (r)[(x)+1], \
76 (r)[(x)+2], (r)[(x)+3])
77
e2693ec1 78static void print_gr(const char *level, struct pt_regs *regs)
1da177e4
LT
79{
80 int i;
1c63b4b8 81 char buf[64];
1da177e4 82
1c63b4b8 83 printk("%s\n", level);
1da177e4
LT
84 printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level);
85 printbinary(buf, regs->gr[0], 32);
86 printk("%sPSW: %s %s\n", level, buf, print_tainted());
87
1c63b4b8
KM
88 for (i = 0; i < 32; i += 4)
89 PRINTREGS(level, regs->gr, "r", RFMT, i);
90}
1da177e4 91
e2693ec1 92static void print_fr(const char *level, struct pt_regs *regs)
1c63b4b8
KM
93{
94 int i;
95 char buf[64];
96 struct { u32 sw[2]; } s;
1da177e4 97
eba91727
TV
98 /* FR are 64bit everywhere. Need to use asm to get the content
99 * of fpsr/fper1, and we assume that we won't have a FP Identify
100 * in our way, otherwise we're screwed.
101 * The fldd is used to restore the T-bit if there was one, as the
102 * store clears it anyway.
1c63b4b8
KM
103 * PA2.0 book says "thou shall not use fstw on FPSR/FPERs" - T-Bone */
104 asm volatile ("fstd %%fr0,0(%1) \n\t"
105 "fldd 0(%1),%%fr0 \n\t"
106 : "=m" (s) : "r" (&s) : "r0");
eba91727
TV
107
108 printk("%s\n", level);
109 printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level);
110 printbinary(buf, s.sw[0], 32);
111 printk("%sFPSR: %s\n", level, buf);
112 printk("%sFPER1: %08x\n", level, s.sw[1]);
113
114 /* here we'll print fr0 again, tho it'll be meaningless */
1c63b4b8
KM
115 for (i = 0; i < 32; i += 4)
116 PRINTREGS(level, regs->fr, "fr", FFMT, i);
117}
118
119void show_regs(struct pt_regs *regs)
120{
7a3f5134 121 int i, user;
e2693ec1 122 const char *level;
1c63b4b8
KM
123 unsigned long cr30, cr31;
124
7a3f5134
HD
125 user = user_mode(regs);
126 level = user ? KERN_DEBUG : KERN_CRIT;
1c63b4b8 127
a43cb95d
TH
128 show_regs_print_info(level);
129
1c63b4b8
KM
130 print_gr(level, regs);
131
132 for (i = 0; i < 8; i += 4)
133 PRINTREGS(level, regs->sr, "sr", RFMT, i);
134
7a3f5134 135 if (user)
1c63b4b8 136 print_fr(level, regs);
1da177e4
LT
137
138 cr30 = mfctl(30);
139 cr31 = mfctl(31);
140 printk("%s\n", level);
141 printk("%sIASQ: " RFMT " " RFMT " IAOQ: " RFMT " " RFMT "\n",
142 level, regs->iasq[0], regs->iasq[1], regs->iaoq[0], regs->iaoq[1]);
143 printk("%s IIR: %08lx ISR: " RFMT " IOR: " RFMT "\n",
144 level, regs->iir, regs->isr, regs->ior);
145 printk("%s CPU: %8d CR30: " RFMT " CR31: " RFMT "\n",
146 level, current_thread_info()->cpu, cr30, cr31);
147 printk("%s ORIG_R28: " RFMT "\n", level, regs->orig_r28);
7a3f5134
HD
148
149 if (user) {
150 printk("%s IAOQ[0]: " RFMT "\n", level, regs->iaoq[0]);
151 printk("%s IAOQ[1]: " RFMT "\n", level, regs->iaoq[1]);
152 printk("%s RP(r2): " RFMT "\n", level, regs->gr[2]);
153 } else {
154 printk("%s IAOQ[0]: %pS\n", level, (void *) regs->iaoq[0]);
155 printk("%s IAOQ[1]: %pS\n", level, (void *) regs->iaoq[1]);
156 printk("%s RP(r2): %pS\n", level, (void *) regs->gr[2]);
157
3481d31b 158 parisc_show_stack(current, regs, KERN_DEFAULT);
7a3f5134 159 }
1da177e4
LT
160}
161
fef47e2a
HD
162static DEFINE_RATELIMIT_STATE(_hppa_rs,
163 DEFAULT_RATELIMIT_INTERVAL, DEFAULT_RATELIMIT_BURST);
164
165#define parisc_printk_ratelimited(critical, regs, fmt, ...) { \
166 if ((critical || show_unhandled_signals) && __ratelimit(&_hppa_rs)) { \
167 printk(fmt, ##__VA_ARGS__); \
168 show_regs(regs); \
169 } \
170}
171
172
3481d31b 173static void do_show_stack(struct unwind_frame_info *info, const char *loglvl)
1da177e4
LT
174{
175 int i = 1;
176
3481d31b 177 printk("%sBacktrace:\n", loglvl);
c8921d72 178 while (i <= MAX_UNWIND_ENTRIES) {
1da177e4
LT
179 if (unwind_once(info) < 0 || info->ip == 0)
180 break;
181
182 if (__kernel_text_address(info->ip)) {
3481d31b
DS
183 printk("%s [<" RFMT ">] %pS\n",
184 loglvl, info->ip, (void *) info->ip);
1da177e4
LT
185 i++;
186 }
187 }
3481d31b 188 printk("%s\n", loglvl);
1da177e4
LT
189}
190
9e0d5c45 191static void parisc_show_stack(struct task_struct *task,
3481d31b 192 struct pt_regs *regs, const char *loglvl)
1da177e4
LT
193{
194 struct unwind_frame_info info;
dc39455e 195
9e0d5c45 196 unwind_frame_init_task(&info, task, regs);
1da177e4 197
3481d31b
DS
198 do_show_stack(&info, loglvl);
199}
200
9cb8f069 201void show_stack(struct task_struct *t, unsigned long *sp, const char *loglvl)
3481d31b
DS
202{
203 parisc_show_stack(t, NULL, loglvl);
1da177e4
LT
204}
205
6891f8a1
HD
206int is_valid_bugaddr(unsigned long iaoq)
207{
208 return 1;
209}
210
1da177e4
LT
211void die_if_kernel(char *str, struct pt_regs *regs, long err)
212{
213 if (user_mode(regs)) {
214 if (err == 0)
215 return; /* STFU */
216
fef47e2a
HD
217 parisc_printk_ratelimited(1, regs,
218 KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n",
19c5870c 219 current->comm, task_pid_nr(current), str, err, regs->iaoq[0]);
fef47e2a 220
1da177e4
LT
221 return;
222 }
223
c288ac97 224 bust_spinlocks(1);
1da177e4 225
c48faf86
HD
226 oops_enter();
227
1da177e4 228 /* Amuse the user in a SPARC fashion */
ad361c98
JP
229 if (err) printk(KERN_CRIT
230 " _______________________________ \n"
231 " < Your System ate a SPARC! Gah! >\n"
232 " ------------------------------- \n"
233 " \\ ^__^\n"
234 " (__)\\ )\\/\\\n"
235 " U ||----w |\n"
236 " || ||\n");
1da177e4
LT
237
238 /* unlock the pdc lock if necessary */
239 pdc_emergency_unlock();
240
241 /* maybe the kernel hasn't booted very far yet and hasn't been able
242 * to initialize the serial or STI console. In that case we should
243 * re-enable the pdc console, so that the user will be able to
244 * identify the problem. */
245 if (!console_drivers)
246 pdc_console_restart();
247
6891f8a1
HD
248 if (err)
249 printk(KERN_CRIT "%s (pid %d): %s (code %ld)\n",
19c5870c 250 current->comm, task_pid_nr(current), str, err);
bd83bcff 251
0bbdac08
HD
252 /* Wot's wrong wif bein' racy? */
253 if (current->thread.flags & PARISC_KERNEL_DEATH) {
91bae23c 254 printk(KERN_CRIT "%s() recursion detected.\n", __func__);
0bbdac08
HD
255 local_irq_enable();
256 while (1);
257 }
258 current->thread.flags |= PARISC_KERNEL_DEATH;
259
1da177e4 260 show_regs(regs);
0bbdac08 261 dump_stack();
373d4d09 262 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
1da177e4 263
22fced88
HD
264 if (in_interrupt())
265 panic("Fatal exception in interrupt");
266
c95a23da 267 if (panic_on_oops)
22fced88 268 panic("Fatal exception");
22fced88 269
c48faf86 270 oops_exit();
1da177e4
LT
271 do_exit(SIGSEGV);
272}
273
1da177e4
LT
274/* gdb uses break 4,8 */
275#define GDB_BREAK_INSN 0x10004
6891f8a1 276static void handle_gdb_break(struct pt_regs *regs, int wot)
1da177e4 277{
ccf75290 278 force_sig_fault(SIGTRAP, wot,
2e1661d2 279 (void __user *) (regs->iaoq[0] & ~3));
1da177e4
LT
280}
281
6891f8a1 282static void handle_break(struct pt_regs *regs)
1da177e4 283{
6891f8a1
HD
284 unsigned iir = regs->iir;
285
286 if (unlikely(iir == PARISC_BUG_BREAK_INSN && !user_mode(regs))) {
287 /* check if a BUG() or WARN() trapped here. */
288 enum bug_trap_type tt;
608e2619 289 tt = report_bug(regs->iaoq[0] & ~3, regs);
6891f8a1
HD
290 if (tt == BUG_TRAP_TYPE_WARN) {
291 regs->iaoq[0] += 4;
292 regs->iaoq[1] += 4;
293 return; /* return to next instruction when WARN_ON(). */
294 }
295 die_if_kernel("Unknown kernel breakpoint", regs,
296 (tt == BUG_TRAP_TYPE_NONE) ? 9 : 0);
297 }
1da177e4 298
8858ac8e
SS
299#ifdef CONFIG_KPROBES
300 if (unlikely(iir == PARISC_KPROBES_BREAK_INSN)) {
301 parisc_kprobe_break_handler(regs);
302 return;
303 }
304
305#endif
306
eacbfce1
SS
307#ifdef CONFIG_KGDB
308 if (unlikely(iir == PARISC_KGDB_COMPILED_BREAK_INSN ||
309 iir == PARISC_KGDB_BREAK_INSN)) {
310 kgdb_handle_exception(9, SIGTRAP, 0, regs);
311 return;
312 }
313#endif
314
fef47e2a
HD
315 if (unlikely(iir != GDB_BREAK_INSN))
316 parisc_printk_ratelimited(0, regs,
317 KERN_DEBUG "break %d,%d: pid=%d command='%s'\n",
df47b438 318 iir & 31, (iir>>13) & ((1<<13)-1),
19c5870c 319 task_pid_nr(current), current->comm);
1da177e4 320
6891f8a1
HD
321 /* send standard GDB signal */
322 handle_gdb_break(regs, TRAP_BRKPT);
1da177e4
LT
323}
324
325static void default_trap(int code, struct pt_regs *regs)
326{
327 printk(KERN_ERR "Trap %d on CPU %d\n", code, smp_processor_id());
328 show_regs(regs);
329}
330
6891f8a1 331void (*cpu_lpmc) (int code, struct pt_regs *regs) __read_mostly = default_trap;
1da177e4
LT
332
333
334void transfer_pim_to_trap_frame(struct pt_regs *regs)
335{
336 register int i;
337 extern unsigned int hpmc_pim_data[];
338 struct pdc_hpmc_pim_11 *pim_narrow;
339 struct pdc_hpmc_pim_20 *pim_wide;
340
341 if (boot_cpu_data.cpu_type >= pcxu) {
342
343 pim_wide = (struct pdc_hpmc_pim_20 *)hpmc_pim_data;
344
345 /*
346 * Note: The following code will probably generate a
347 * bunch of truncation error warnings from the compiler.
348 * Could be handled with an ifdef, but perhaps there
349 * is a better way.
350 */
351
352 regs->gr[0] = pim_wide->cr[22];
353
354 for (i = 1; i < 32; i++)
355 regs->gr[i] = pim_wide->gr[i];
356
357 for (i = 0; i < 32; i++)
358 regs->fr[i] = pim_wide->fr[i];
359
360 for (i = 0; i < 8; i++)
361 regs->sr[i] = pim_wide->sr[i];
362
363 regs->iasq[0] = pim_wide->cr[17];
364 regs->iasq[1] = pim_wide->iasq_back;
365 regs->iaoq[0] = pim_wide->cr[18];
366 regs->iaoq[1] = pim_wide->iaoq_back;
367
368 regs->sar = pim_wide->cr[11];
369 regs->iir = pim_wide->cr[19];
370 regs->isr = pim_wide->cr[20];
371 regs->ior = pim_wide->cr[21];
372 }
373 else {
374 pim_narrow = (struct pdc_hpmc_pim_11 *)hpmc_pim_data;
375
376 regs->gr[0] = pim_narrow->cr[22];
377
378 for (i = 1; i < 32; i++)
379 regs->gr[i] = pim_narrow->gr[i];
380
381 for (i = 0; i < 32; i++)
382 regs->fr[i] = pim_narrow->fr[i];
383
384 for (i = 0; i < 8; i++)
385 regs->sr[i] = pim_narrow->sr[i];
386
387 regs->iasq[0] = pim_narrow->cr[17];
388 regs->iasq[1] = pim_narrow->iasq_back;
389 regs->iaoq[0] = pim_narrow->cr[18];
390 regs->iaoq[1] = pim_narrow->iaoq_back;
391
392 regs->sar = pim_narrow->cr[11];
393 regs->iir = pim_narrow->cr[19];
394 regs->isr = pim_narrow->cr[20];
395 regs->ior = pim_narrow->cr[21];
396 }
397
398 /*
399 * The following fields only have meaning if we came through
400 * another path. So just zero them here.
401 */
402
403 regs->ksp = 0;
404 regs->kpc = 0;
405 regs->orig_r28 = 0;
406}
407
408
409/*
410 * This routine is called as a last resort when everything else
411 * has gone clearly wrong. We get called for faults in kernel space,
412 * and HPMC's.
413 */
414void parisc_terminate(char *msg, struct pt_regs *regs, int code, unsigned long offset)
415{
416 static DEFINE_SPINLOCK(terminate_lock);
417
ec4d396b 418 (void)notify_die(DIE_OOPS, msg, regs, 0, code, SIGTRAP);
c288ac97 419 bust_spinlocks(1);
1da177e4
LT
420
421 set_eiem(0);
422 local_irq_disable();
423 spin_lock(&terminate_lock);
424
425 /* unlock the pdc lock if necessary */
426 pdc_emergency_unlock();
427
428 /* restart pdc console if necessary */
429 if (!console_drivers)
430 pdc_console_restart();
431
432 /* Not all paths will gutter the processor... */
433 switch(code){
434
435 case 1:
436 transfer_pim_to_trap_frame(regs);
437 break;
438
439 default:
1da177e4
LT
440 break;
441
442 }
443
444 {
445 /* show_stack(NULL, (unsigned long *)regs->gr[30]); */
446 struct unwind_frame_info info;
447 unwind_frame_init(&info, current, regs);
3481d31b 448 do_show_stack(&info, KERN_CRIT);
1da177e4
LT
449 }
450
451 printk("\n");
e98bc5ee
HD
452 pr_crit("%s: Code=%d (%s) at addr " RFMT "\n",
453 msg, code, trap_name(code), offset);
1da177e4
LT
454 show_regs(regs);
455
456 spin_unlock(&terminate_lock);
457
458 /* put soft power button back under hardware control;
459 * if the user had pressed it once at any time, the
460 * system will shut down immediately right here. */
461 pdc_soft_power_button(0);
462
463 /* Call kernel panic() so reboot timeouts work properly
464 * FIXME: This function should be on the list of
465 * panic notifiers, and we should call panic
466 * directly from the location that we wish.
467 * e.g. We should not call panic from
468 * parisc_terminate, but rather the oter way around.
469 * This hack works, prints the panic message twice,
470 * and it enables reboot timers!
471 */
472 panic(msg);
473}
474
d75f054a 475void notrace handle_interruption(int code, struct pt_regs *regs)
1da177e4
LT
476{
477 unsigned long fault_address = 0;
478 unsigned long fault_space = 0;
ccf75290 479 int si_code;
1da177e4
LT
480
481 if (code == 1)
482 pdc_console_restart(); /* switch back to pdc if HPMC */
483 else
484 local_irq_enable();
485
486 /* Security check:
487 * If the priority level is still user, and the
488 * faulting space is not equal to the active space
489 * then the user is attempting something in a space
490 * that does not belong to them. Kill the process.
491 *
492 * This is normally the situation when the user
493 * attempts to jump into the kernel space at the
494 * wrong offset, be it at the gateway page or a
495 * random location.
496 *
497 * We cannot normally signal the process because it
498 * could *be* on the gateway page, and processes
499 * executing on the gateway page can't have signals
500 * delivered.
501 *
502 * We merely readjust the address into the users
503 * space, at a destination address of zero, and
504 * allow processing to continue.
505 */
506 if (((unsigned long)regs->iaoq[0] & 3) &&
507 ((unsigned long)regs->iasq[0] != (unsigned long)regs->sr[7])) {
a39e6bea
REB
508 /* Kill the user process later */
509 regs->iaoq[0] = 0 | 3;
1da177e4 510 regs->iaoq[1] = regs->iaoq[0] + 4;
a39e6bea 511 regs->iasq[0] = regs->iasq[1] = regs->sr[7];
1da177e4
LT
512 regs->gr[0] &= ~PSW_B;
513 return;
514 }
515
516#if 0
517 printk(KERN_CRIT "Interruption # %d\n", code);
518#endif
519
520 switch(code) {
521
522 case 1:
523 /* High-priority machine check (HPMC) */
524
525 /* set up a new led state on systems shipped with a LED State panel */
526 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_HPMC);
a39e6bea
REB
527
528 parisc_terminate("High Priority Machine Check (HPMC)",
1da177e4
LT
529 regs, code, 0);
530 /* NOT REACHED */
531
532 case 2:
533 /* Power failure interrupt */
534 printk(KERN_CRIT "Power failure interrupt !\n");
535 return;
536
537 case 3:
538 /* Recovery counter trap */
539 regs->gr[0] &= ~PSW_R;
eacbfce1 540
8858ac8e
SS
541#ifdef CONFIG_KPROBES
542 if (parisc_kprobe_ss_handler(regs))
543 return;
544#endif
545
eacbfce1
SS
546#ifdef CONFIG_KGDB
547 if (kgdb_single_step) {
548 kgdb_handle_exception(0, SIGTRAP, 0, regs);
549 return;
550 }
551#endif
552
1da177e4
LT
553 if (user_space(regs))
554 handle_gdb_break(regs, TRAP_TRACE);
555 /* else this must be the start of a syscall - just let it run */
556 return;
557
558 case 5:
559 /* Low-priority machine check */
560 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_LPMC);
561
d6ce8626
RC
562 flush_cache_all();
563 flush_tlb_all();
1da177e4
LT
564 cpu_lpmc(5, regs);
565 return;
566
5b00ca0b 567 case PARISC_ITLB_TRAP:
1da177e4
LT
568 /* Instruction TLB miss fault/Instruction page fault */
569 fault_address = regs->iaoq[0];
570 fault_space = regs->iasq[0];
571 break;
572
573 case 8:
574 /* Illegal instruction trap */
575 die_if_kernel("Illegal instruction", regs, code);
ccf75290 576 si_code = ILL_ILLOPC;
1da177e4
LT
577 goto give_sigill;
578
579 case 9:
580 /* Break instruction trap */
6891f8a1 581 handle_break(regs);
1da177e4 582 return;
a39e6bea 583
1da177e4
LT
584 case 10:
585 /* Privileged operation trap */
586 die_if_kernel("Privileged operation", regs, code);
ccf75290 587 si_code = ILL_PRVOPC;
1da177e4 588 goto give_sigill;
a39e6bea 589
1da177e4
LT
590 case 11:
591 /* Privileged register trap */
592 if ((regs->iir & 0xffdfffe0) == 0x034008a0) {
593
594 /* This is a MFCTL cr26/cr27 to gr instruction.
595 * PCXS traps on this, so we need to emulate it.
596 */
597
598 if (regs->iir & 0x00200000)
599 regs->gr[regs->iir & 0x1f] = mfctl(27);
600 else
601 regs->gr[regs->iir & 0x1f] = mfctl(26);
602
603 regs->iaoq[0] = regs->iaoq[1];
604 regs->iaoq[1] += 4;
605 regs->iasq[0] = regs->iasq[1];
606 return;
607 }
608
609 die_if_kernel("Privileged register usage", regs, code);
ccf75290 610 si_code = ILL_PRVREG;
1da177e4 611 give_sigill:
ccf75290 612 force_sig_fault(SIGILL, si_code,
2e1661d2 613 (void __user *) regs->iaoq[0]);
1da177e4
LT
614 return;
615
616 case 12:
617 /* Overflow Trap, let the userland signal handler do the cleanup */
ccf75290 618 force_sig_fault(SIGFPE, FPE_INTOVF,
2e1661d2 619 (void __user *) regs->iaoq[0]);
1da177e4
LT
620 return;
621
622 case 13:
623 /* Conditional Trap
7022672e 624 The condition succeeds in an instruction which traps
1da177e4
LT
625 on condition */
626 if(user_mode(regs)){
75abf642
HD
627 /* Let userspace app figure it out from the insn pointed
628 * to by si_addr.
629 */
ccf75290 630 force_sig_fault(SIGFPE, FPE_CONDTRAP,
2e1661d2 631 (void __user *) regs->iaoq[0]);
1da177e4
LT
632 return;
633 }
634 /* The kernel doesn't want to handle condition codes */
635 break;
636
637 case 14:
638 /* Assist Exception Trap, i.e. floating point exception. */
639 die_if_kernel("Floating point exception", regs, 0); /* quiet */
d0c3be80 640 __inc_irq_stat(irq_fpassist_count);
1da177e4
LT
641 handle_fpe(regs);
642 return;
a39e6bea 643
1da177e4
LT
644 case 15:
645 /* Data TLB miss fault/Data page fault */
df561f66 646 fallthrough;
1da177e4
LT
647 case 16:
648 /* Non-access instruction TLB miss fault */
649 /* The instruction TLB entry needed for the target address of the FIC
650 is absent, and hardware can't find it, so we get to cleanup */
df561f66 651 fallthrough;
1da177e4
LT
652 case 17:
653 /* Non-access data TLB miss fault/Non-access data page fault */
654 /* FIXME:
a39e6bea
REB
655 Still need to add slow path emulation code here!
656 If the insn used a non-shadow register, then the tlb
1da177e4
LT
657 handlers could not have their side-effect (e.g. probe
658 writing to a target register) emulated since rfir would
659 erase the changes to said register. Instead we have to
660 setup everything, call this function we are in, and emulate
661 by hand. Technically we need to emulate:
662 fdc,fdce,pdc,"fic,4f",prober,probeir,probew, probeiw
a39e6bea 663 */
1da177e4
LT
664 fault_address = regs->ior;
665 fault_space = regs->isr;
666 break;
667
668 case 18:
669 /* PCXS only -- later cpu's split this into types 26,27 & 28 */
670 /* Check for unaligned access */
671 if (check_unaligned(regs)) {
672 handle_unaligned(regs);
673 return;
674 }
df561f66 675 fallthrough;
1da177e4
LT
676 case 26:
677 /* PCXL: Data memory access rights trap */
678 fault_address = regs->ior;
679 fault_space = regs->isr;
680 break;
681
682 case 19:
683 /* Data memory break trap */
684 regs->gr[0] |= PSW_X; /* So we can single-step over the trap */
df561f66 685 fallthrough;
1da177e4
LT
686 case 21:
687 /* Page reference trap */
688 handle_gdb_break(regs, TRAP_HWBKPT);
689 return;
690
691 case 25:
692 /* Taken branch trap */
693 regs->gr[0] &= ~PSW_T;
694 if (user_space(regs))
695 handle_gdb_break(regs, TRAP_BRANCH);
696 /* else this must be the start of a syscall - just let it
697 * run.
698 */
699 return;
700
701 case 7:
702 /* Instruction access rights */
703 /* PCXL: Instruction memory protection trap */
704
705 /*
706 * This could be caused by either: 1) a process attempting
707 * to execute within a vma that does not have execute
708 * permission, or 2) an access rights violation caused by a
709 * flush only translation set up by ptep_get_and_clear().
710 * So we check the vma permissions to differentiate the two.
711 * If the vma indicates we have execute permission, then
712 * the cause is the latter one. In this case, we need to
713 * call do_page_fault() to fix the problem.
714 */
715
716 if (user_mode(regs)) {
717 struct vm_area_struct *vma;
718
d8ed45c5 719 mmap_read_lock(current->mm);
1da177e4
LT
720 vma = find_vma(current->mm,regs->iaoq[0]);
721 if (vma && (regs->iaoq[0] >= vma->vm_start)
722 && (vma->vm_flags & VM_EXEC)) {
723
724 fault_address = regs->iaoq[0];
725 fault_space = regs->iasq[0];
726
d8ed45c5 727 mmap_read_unlock(current->mm);
1da177e4
LT
728 break; /* call do_page_fault() */
729 }
d8ed45c5 730 mmap_read_unlock(current->mm);
1da177e4 731 }
df561f66 732 fallthrough;
1da177e4
LT
733 case 27:
734 /* Data memory protection ID trap */
c61c25eb
KM
735 if (code == 27 && !user_mode(regs) &&
736 fixup_exception(regs))
737 return;
738
1da177e4 739 die_if_kernel("Protection id trap", regs, code);
ccf75290
EB
740 force_sig_fault(SIGSEGV, SEGV_MAPERR,
741 (code == 7)?
742 ((void __user *) regs->iaoq[0]) :
2e1661d2 743 ((void __user *) regs->ior));
1da177e4
LT
744 return;
745
746 case 28:
747 /* Unaligned data reference trap */
748 handle_unaligned(regs);
749 return;
750
751 default:
752 if (user_mode(regs)) {
fef47e2a
HD
753 parisc_printk_ratelimited(0, regs, KERN_DEBUG
754 "handle_interruption() pid=%d command='%s'\n",
755 task_pid_nr(current), current->comm);
1da177e4 756 /* SIGBUS, for lack of a better one. */
ccf75290 757 force_sig_fault(SIGBUS, BUS_OBJERR,
2e1661d2 758 (void __user *)regs->ior);
1da177e4
LT
759 return;
760 }
761 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
762
763 parisc_terminate("Unexpected interruption", regs, code, 0);
764 /* NOT REACHED */
765 }
766
767 if (user_mode(regs)) {
768 if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) {
fef47e2a
HD
769 parisc_printk_ratelimited(0, regs, KERN_DEBUG
770 "User fault %d on space 0x%08lx, pid=%d command='%s'\n",
771 code, fault_space,
772 task_pid_nr(current), current->comm);
ccf75290 773 force_sig_fault(SIGSEGV, SEGV_MAPERR,
2e1661d2 774 (void __user *)regs->ior);
1da177e4
LT
775 return;
776 }
777 }
778 else {
779
780 /*
59b33f14
HD
781 * The kernel should never fault on its own address space,
782 * unless pagefault_disable() was called before.
1da177e4
LT
783 */
784
70ffdb93 785 if (fault_space == 0 && !faulthandler_disabled())
1da177e4 786 {
ef72f311
HD
787 /* Clean up and return if in exception table. */
788 if (fixup_exception(regs))
789 return;
1da177e4
LT
790 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC);
791 parisc_terminate("Kernel Fault", regs, code, fault_address);
1da177e4
LT
792 }
793 }
794
795 do_page_fault(regs, code, fault_address);
796}
797
798
4182d0cd 799void __init initialize_ivt(const void *iva)
1da177e4 800{
c3d4ed4e 801 extern const u32 os_hpmc[];
c3d4ed4e 802
1da177e4
LT
803 int i;
804 u32 check = 0;
805 u32 *ivap;
806 u32 *hpmcp;
c70919bd 807 u32 instr;
1da177e4 808
4182d0cd
HD
809 if (strcmp((const char *)iva, "cows can fly"))
810 panic("IVT invalid");
1da177e4
LT
811
812 ivap = (u32 *)iva;
813
814 for (i = 0; i < 8; i++)
815 *ivap++ = 0;
816
8d771b14
HD
817 /*
818 * Use PDC_INSTR firmware function to get instruction that invokes
819 * PDCE_CHECK in HPMC handler. See programming note at page 1-31 of
820 * the PA 1.1 Firmware Architecture document.
821 */
822 if (pdc_instr(&instr) == PDC_OK)
823 ivap[0] = instr;
824
41dbee81
HD
825 /*
826 * Rules for the checksum of the HPMC handler:
827 * 1. The IVA does not point to PDC/PDH space (ie: the OS has installed
828 * its own IVA).
829 * 2. The word at IVA + 32 is nonzero.
830 * 3. If Length (IVA + 60) is not zero, then Length (IVA + 60) and
831 * Address (IVA + 56) are word-aligned.
832 * 4. The checksum of the 8 words starting at IVA + 32 plus the sum of
833 * the Length/4 words starting at Address is zero.
834 */
835
1138b671
JDA
836 /* Setup IVA and compute checksum for HPMC handler */
837 ivap[6] = (u32)__pa(os_hpmc);
1da177e4
LT
838
839 hpmcp = (u32 *)os_hpmc;
840
1da177e4
LT
841 for (i=0; i<8; i++)
842 check += ivap[i];
843
844 ivap[5] = -check;
c70919bd 845 pr_debug("initialize_ivt: IVA[6] = 0x%08x\n", ivap[6]);
1da177e4
LT
846}
847
1da177e4 848
4182d0cd
HD
849/* early_trap_init() is called before we set up kernel mappings and
850 * write-protect the kernel */
851void __init early_trap_init(void)
1da177e4 852{
4182d0cd 853 extern const void fault_vector_20;
1da177e4 854
4182d0cd
HD
855#ifndef CONFIG_64BIT
856 extern const void fault_vector_11;
857 initialize_ivt(&fault_vector_11);
1da177e4
LT
858#endif
859
4182d0cd
HD
860 initialize_ivt(&fault_vector_20);
861}