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Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 LT |
2 | /* |
3 | * linux/arch/parisc/traps.c | |
4 | * | |
5 | * Copyright (C) 1991, 1992 Linus Torvalds | |
6 | * Copyright (C) 1999, 2000 Philipp Rumpf <prumpf@tux.org> | |
7 | */ | |
8 | ||
9 | /* | |
10 | * 'Traps.c' handles hardware traps and faults after we have saved some | |
11 | * state in 'asm.s'. | |
12 | */ | |
13 | ||
1da177e4 | 14 | #include <linux/sched.h> |
b17b0153 | 15 | #include <linux/sched/debug.h> |
1da177e4 LT |
16 | #include <linux/kernel.h> |
17 | #include <linux/string.h> | |
18 | #include <linux/errno.h> | |
19 | #include <linux/ptrace.h> | |
20 | #include <linux/timer.h> | |
22fced88 | 21 | #include <linux/delay.h> |
1da177e4 LT |
22 | #include <linux/mm.h> |
23 | #include <linux/module.h> | |
24 | #include <linux/smp.h> | |
1da177e4 LT |
25 | #include <linux/spinlock.h> |
26 | #include <linux/init.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/console.h> | |
6891f8a1 | 29 | #include <linux/bug.h> |
fef47e2a | 30 | #include <linux/ratelimit.h> |
70ffdb93 | 31 | #include <linux/uaccess.h> |
ec4d396b | 32 | #include <linux/kdebug.h> |
1da177e4 LT |
33 | |
34 | #include <asm/assembly.h> | |
1da177e4 LT |
35 | #include <asm/io.h> |
36 | #include <asm/irq.h> | |
37 | #include <asm/traps.h> | |
38 | #include <asm/unaligned.h> | |
60063497 | 39 | #include <linux/atomic.h> |
1da177e4 LT |
40 | #include <asm/smp.h> |
41 | #include <asm/pdc.h> | |
42 | #include <asm/pdc_chassis.h> | |
43 | #include <asm/unwind.h> | |
d6ce8626 RC |
44 | #include <asm/tlbflush.h> |
45 | #include <asm/cacheflush.h> | |
eacbfce1 | 46 | #include <linux/kgdb.h> |
8858ac8e | 47 | #include <linux/kprobes.h> |
1da177e4 LT |
48 | |
49 | #include "../math-emu/math-emu.h" /* for handle_fpe() */ | |
50 | ||
9e0d5c45 | 51 | static void parisc_show_stack(struct task_struct *task, |
3481d31b | 52 | struct pt_regs *regs, const char *loglvl); |
dc39455e | 53 | |
6891f8a1 | 54 | static int printbinary(char *buf, unsigned long x, int nbits) |
1da177e4 LT |
55 | { |
56 | unsigned long mask = 1UL << (nbits - 1); | |
57 | while (mask != 0) { | |
58 | *buf++ = (mask & x ? '1' : '0'); | |
59 | mask >>= 1; | |
60 | } | |
61 | *buf = '\0'; | |
62 | ||
63 | return nbits; | |
64 | } | |
65 | ||
a8f44e38 | 66 | #ifdef CONFIG_64BIT |
1da177e4 LT |
67 | #define RFMT "%016lx" |
68 | #else | |
69 | #define RFMT "%08lx" | |
70 | #endif | |
1c63b4b8 | 71 | #define FFMT "%016llx" /* fpregs are 64-bit always */ |
1da177e4 | 72 | |
1c63b4b8 KM |
73 | #define PRINTREGS(lvl,r,f,fmt,x) \ |
74 | printk("%s%s%02d-%02d " fmt " " fmt " " fmt " " fmt "\n", \ | |
75 | lvl, f, (x), (x+3), (r)[(x)+0], (r)[(x)+1], \ | |
76 | (r)[(x)+2], (r)[(x)+3]) | |
77 | ||
78 | static void print_gr(char *level, struct pt_regs *regs) | |
1da177e4 LT |
79 | { |
80 | int i; | |
1c63b4b8 | 81 | char buf[64]; |
1da177e4 | 82 | |
1c63b4b8 | 83 | printk("%s\n", level); |
1da177e4 LT |
84 | printk("%s YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI\n", level); |
85 | printbinary(buf, regs->gr[0], 32); | |
86 | printk("%sPSW: %s %s\n", level, buf, print_tainted()); | |
87 | ||
1c63b4b8 KM |
88 | for (i = 0; i < 32; i += 4) |
89 | PRINTREGS(level, regs->gr, "r", RFMT, i); | |
90 | } | |
1da177e4 | 91 | |
1c63b4b8 KM |
92 | static void print_fr(char *level, struct pt_regs *regs) |
93 | { | |
94 | int i; | |
95 | char buf[64]; | |
96 | struct { u32 sw[2]; } s; | |
1da177e4 | 97 | |
eba91727 TV |
98 | /* FR are 64bit everywhere. Need to use asm to get the content |
99 | * of fpsr/fper1, and we assume that we won't have a FP Identify | |
100 | * in our way, otherwise we're screwed. | |
101 | * The fldd is used to restore the T-bit if there was one, as the | |
102 | * store clears it anyway. | |
1c63b4b8 KM |
103 | * PA2.0 book says "thou shall not use fstw on FPSR/FPERs" - T-Bone */ |
104 | asm volatile ("fstd %%fr0,0(%1) \n\t" | |
105 | "fldd 0(%1),%%fr0 \n\t" | |
106 | : "=m" (s) : "r" (&s) : "r0"); | |
eba91727 TV |
107 | |
108 | printk("%s\n", level); | |
109 | printk("%s VZOUICununcqcqcqcqcqcrmunTDVZOUI\n", level); | |
110 | printbinary(buf, s.sw[0], 32); | |
111 | printk("%sFPSR: %s\n", level, buf); | |
112 | printk("%sFPER1: %08x\n", level, s.sw[1]); | |
113 | ||
114 | /* here we'll print fr0 again, tho it'll be meaningless */ | |
1c63b4b8 KM |
115 | for (i = 0; i < 32; i += 4) |
116 | PRINTREGS(level, regs->fr, "fr", FFMT, i); | |
117 | } | |
118 | ||
119 | void show_regs(struct pt_regs *regs) | |
120 | { | |
7a3f5134 | 121 | int i, user; |
1c63b4b8 KM |
122 | char *level; |
123 | unsigned long cr30, cr31; | |
124 | ||
7a3f5134 HD |
125 | user = user_mode(regs); |
126 | level = user ? KERN_DEBUG : KERN_CRIT; | |
1c63b4b8 | 127 | |
a43cb95d TH |
128 | show_regs_print_info(level); |
129 | ||
1c63b4b8 KM |
130 | print_gr(level, regs); |
131 | ||
132 | for (i = 0; i < 8; i += 4) | |
133 | PRINTREGS(level, regs->sr, "sr", RFMT, i); | |
134 | ||
7a3f5134 | 135 | if (user) |
1c63b4b8 | 136 | print_fr(level, regs); |
1da177e4 LT |
137 | |
138 | cr30 = mfctl(30); | |
139 | cr31 = mfctl(31); | |
140 | printk("%s\n", level); | |
141 | printk("%sIASQ: " RFMT " " RFMT " IAOQ: " RFMT " " RFMT "\n", | |
142 | level, regs->iasq[0], regs->iasq[1], regs->iaoq[0], regs->iaoq[1]); | |
143 | printk("%s IIR: %08lx ISR: " RFMT " IOR: " RFMT "\n", | |
144 | level, regs->iir, regs->isr, regs->ior); | |
145 | printk("%s CPU: %8d CR30: " RFMT " CR31: " RFMT "\n", | |
146 | level, current_thread_info()->cpu, cr30, cr31); | |
147 | printk("%s ORIG_R28: " RFMT "\n", level, regs->orig_r28); | |
7a3f5134 HD |
148 | |
149 | if (user) { | |
150 | printk("%s IAOQ[0]: " RFMT "\n", level, regs->iaoq[0]); | |
151 | printk("%s IAOQ[1]: " RFMT "\n", level, regs->iaoq[1]); | |
152 | printk("%s RP(r2): " RFMT "\n", level, regs->gr[2]); | |
153 | } else { | |
154 | printk("%s IAOQ[0]: %pS\n", level, (void *) regs->iaoq[0]); | |
155 | printk("%s IAOQ[1]: %pS\n", level, (void *) regs->iaoq[1]); | |
156 | printk("%s RP(r2): %pS\n", level, (void *) regs->gr[2]); | |
157 | ||
3481d31b | 158 | parisc_show_stack(current, regs, KERN_DEFAULT); |
7a3f5134 | 159 | } |
1da177e4 LT |
160 | } |
161 | ||
fef47e2a HD |
162 | static DEFINE_RATELIMIT_STATE(_hppa_rs, |
163 | DEFAULT_RATELIMIT_INTERVAL, DEFAULT_RATELIMIT_BURST); | |
164 | ||
165 | #define parisc_printk_ratelimited(critical, regs, fmt, ...) { \ | |
166 | if ((critical || show_unhandled_signals) && __ratelimit(&_hppa_rs)) { \ | |
167 | printk(fmt, ##__VA_ARGS__); \ | |
168 | show_regs(regs); \ | |
169 | } \ | |
170 | } | |
171 | ||
172 | ||
3481d31b | 173 | static void do_show_stack(struct unwind_frame_info *info, const char *loglvl) |
1da177e4 LT |
174 | { |
175 | int i = 1; | |
176 | ||
3481d31b | 177 | printk("%sBacktrace:\n", loglvl); |
c8921d72 | 178 | while (i <= MAX_UNWIND_ENTRIES) { |
1da177e4 LT |
179 | if (unwind_once(info) < 0 || info->ip == 0) |
180 | break; | |
181 | ||
182 | if (__kernel_text_address(info->ip)) { | |
3481d31b DS |
183 | printk("%s [<" RFMT ">] %pS\n", |
184 | loglvl, info->ip, (void *) info->ip); | |
1da177e4 LT |
185 | i++; |
186 | } | |
187 | } | |
3481d31b | 188 | printk("%s\n", loglvl); |
1da177e4 LT |
189 | } |
190 | ||
9e0d5c45 | 191 | static void parisc_show_stack(struct task_struct *task, |
3481d31b | 192 | struct pt_regs *regs, const char *loglvl) |
1da177e4 LT |
193 | { |
194 | struct unwind_frame_info info; | |
dc39455e | 195 | |
9e0d5c45 | 196 | unwind_frame_init_task(&info, task, regs); |
1da177e4 | 197 | |
3481d31b DS |
198 | do_show_stack(&info, loglvl); |
199 | } | |
200 | ||
201 | void show_stack_loglvl(struct task_struct *t, unsigned long *sp, | |
202 | const char *loglvl) | |
203 | { | |
204 | parisc_show_stack(t, NULL, loglvl); | |
1da177e4 LT |
205 | } |
206 | ||
dc39455e KM |
207 | void show_stack(struct task_struct *t, unsigned long *sp) |
208 | { | |
3481d31b | 209 | show_stack_loglvl(t, sp, KERN_CRIT) |
dc39455e KM |
210 | } |
211 | ||
6891f8a1 HD |
212 | int is_valid_bugaddr(unsigned long iaoq) |
213 | { | |
214 | return 1; | |
215 | } | |
216 | ||
1da177e4 LT |
217 | void die_if_kernel(char *str, struct pt_regs *regs, long err) |
218 | { | |
219 | if (user_mode(regs)) { | |
220 | if (err == 0) | |
221 | return; /* STFU */ | |
222 | ||
fef47e2a HD |
223 | parisc_printk_ratelimited(1, regs, |
224 | KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n", | |
19c5870c | 225 | current->comm, task_pid_nr(current), str, err, regs->iaoq[0]); |
fef47e2a | 226 | |
1da177e4 LT |
227 | return; |
228 | } | |
229 | ||
c288ac97 | 230 | bust_spinlocks(1); |
1da177e4 | 231 | |
c48faf86 HD |
232 | oops_enter(); |
233 | ||
1da177e4 | 234 | /* Amuse the user in a SPARC fashion */ |
ad361c98 JP |
235 | if (err) printk(KERN_CRIT |
236 | " _______________________________ \n" | |
237 | " < Your System ate a SPARC! Gah! >\n" | |
238 | " ------------------------------- \n" | |
239 | " \\ ^__^\n" | |
240 | " (__)\\ )\\/\\\n" | |
241 | " U ||----w |\n" | |
242 | " || ||\n"); | |
1da177e4 LT |
243 | |
244 | /* unlock the pdc lock if necessary */ | |
245 | pdc_emergency_unlock(); | |
246 | ||
247 | /* maybe the kernel hasn't booted very far yet and hasn't been able | |
248 | * to initialize the serial or STI console. In that case we should | |
249 | * re-enable the pdc console, so that the user will be able to | |
250 | * identify the problem. */ | |
251 | if (!console_drivers) | |
252 | pdc_console_restart(); | |
253 | ||
6891f8a1 HD |
254 | if (err) |
255 | printk(KERN_CRIT "%s (pid %d): %s (code %ld)\n", | |
19c5870c | 256 | current->comm, task_pid_nr(current), str, err); |
bd83bcff | 257 | |
0bbdac08 HD |
258 | /* Wot's wrong wif bein' racy? */ |
259 | if (current->thread.flags & PARISC_KERNEL_DEATH) { | |
91bae23c | 260 | printk(KERN_CRIT "%s() recursion detected.\n", __func__); |
0bbdac08 HD |
261 | local_irq_enable(); |
262 | while (1); | |
263 | } | |
264 | current->thread.flags |= PARISC_KERNEL_DEATH; | |
265 | ||
1da177e4 | 266 | show_regs(regs); |
0bbdac08 | 267 | dump_stack(); |
373d4d09 | 268 | add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE); |
1da177e4 | 269 | |
22fced88 HD |
270 | if (in_interrupt()) |
271 | panic("Fatal exception in interrupt"); | |
272 | ||
c95a23da | 273 | if (panic_on_oops) |
22fced88 | 274 | panic("Fatal exception"); |
22fced88 | 275 | |
c48faf86 | 276 | oops_exit(); |
1da177e4 LT |
277 | do_exit(SIGSEGV); |
278 | } | |
279 | ||
1da177e4 LT |
280 | /* gdb uses break 4,8 */ |
281 | #define GDB_BREAK_INSN 0x10004 | |
6891f8a1 | 282 | static void handle_gdb_break(struct pt_regs *regs, int wot) |
1da177e4 | 283 | { |
ccf75290 | 284 | force_sig_fault(SIGTRAP, wot, |
2e1661d2 | 285 | (void __user *) (regs->iaoq[0] & ~3)); |
1da177e4 LT |
286 | } |
287 | ||
6891f8a1 | 288 | static void handle_break(struct pt_regs *regs) |
1da177e4 | 289 | { |
6891f8a1 HD |
290 | unsigned iir = regs->iir; |
291 | ||
292 | if (unlikely(iir == PARISC_BUG_BREAK_INSN && !user_mode(regs))) { | |
293 | /* check if a BUG() or WARN() trapped here. */ | |
294 | enum bug_trap_type tt; | |
608e2619 | 295 | tt = report_bug(regs->iaoq[0] & ~3, regs); |
6891f8a1 HD |
296 | if (tt == BUG_TRAP_TYPE_WARN) { |
297 | regs->iaoq[0] += 4; | |
298 | regs->iaoq[1] += 4; | |
299 | return; /* return to next instruction when WARN_ON(). */ | |
300 | } | |
301 | die_if_kernel("Unknown kernel breakpoint", regs, | |
302 | (tt == BUG_TRAP_TYPE_NONE) ? 9 : 0); | |
303 | } | |
1da177e4 | 304 | |
8858ac8e SS |
305 | #ifdef CONFIG_KPROBES |
306 | if (unlikely(iir == PARISC_KPROBES_BREAK_INSN)) { | |
307 | parisc_kprobe_break_handler(regs); | |
308 | return; | |
309 | } | |
310 | ||
311 | #endif | |
312 | ||
eacbfce1 SS |
313 | #ifdef CONFIG_KGDB |
314 | if (unlikely(iir == PARISC_KGDB_COMPILED_BREAK_INSN || | |
315 | iir == PARISC_KGDB_BREAK_INSN)) { | |
316 | kgdb_handle_exception(9, SIGTRAP, 0, regs); | |
317 | return; | |
318 | } | |
319 | #endif | |
320 | ||
fef47e2a HD |
321 | if (unlikely(iir != GDB_BREAK_INSN)) |
322 | parisc_printk_ratelimited(0, regs, | |
323 | KERN_DEBUG "break %d,%d: pid=%d command='%s'\n", | |
df47b438 | 324 | iir & 31, (iir>>13) & ((1<<13)-1), |
19c5870c | 325 | task_pid_nr(current), current->comm); |
1da177e4 | 326 | |
6891f8a1 HD |
327 | /* send standard GDB signal */ |
328 | handle_gdb_break(regs, TRAP_BRKPT); | |
1da177e4 LT |
329 | } |
330 | ||
331 | static void default_trap(int code, struct pt_regs *regs) | |
332 | { | |
333 | printk(KERN_ERR "Trap %d on CPU %d\n", code, smp_processor_id()); | |
334 | show_regs(regs); | |
335 | } | |
336 | ||
6891f8a1 | 337 | void (*cpu_lpmc) (int code, struct pt_regs *regs) __read_mostly = default_trap; |
1da177e4 LT |
338 | |
339 | ||
340 | void transfer_pim_to_trap_frame(struct pt_regs *regs) | |
341 | { | |
342 | register int i; | |
343 | extern unsigned int hpmc_pim_data[]; | |
344 | struct pdc_hpmc_pim_11 *pim_narrow; | |
345 | struct pdc_hpmc_pim_20 *pim_wide; | |
346 | ||
347 | if (boot_cpu_data.cpu_type >= pcxu) { | |
348 | ||
349 | pim_wide = (struct pdc_hpmc_pim_20 *)hpmc_pim_data; | |
350 | ||
351 | /* | |
352 | * Note: The following code will probably generate a | |
353 | * bunch of truncation error warnings from the compiler. | |
354 | * Could be handled with an ifdef, but perhaps there | |
355 | * is a better way. | |
356 | */ | |
357 | ||
358 | regs->gr[0] = pim_wide->cr[22]; | |
359 | ||
360 | for (i = 1; i < 32; i++) | |
361 | regs->gr[i] = pim_wide->gr[i]; | |
362 | ||
363 | for (i = 0; i < 32; i++) | |
364 | regs->fr[i] = pim_wide->fr[i]; | |
365 | ||
366 | for (i = 0; i < 8; i++) | |
367 | regs->sr[i] = pim_wide->sr[i]; | |
368 | ||
369 | regs->iasq[0] = pim_wide->cr[17]; | |
370 | regs->iasq[1] = pim_wide->iasq_back; | |
371 | regs->iaoq[0] = pim_wide->cr[18]; | |
372 | regs->iaoq[1] = pim_wide->iaoq_back; | |
373 | ||
374 | regs->sar = pim_wide->cr[11]; | |
375 | regs->iir = pim_wide->cr[19]; | |
376 | regs->isr = pim_wide->cr[20]; | |
377 | regs->ior = pim_wide->cr[21]; | |
378 | } | |
379 | else { | |
380 | pim_narrow = (struct pdc_hpmc_pim_11 *)hpmc_pim_data; | |
381 | ||
382 | regs->gr[0] = pim_narrow->cr[22]; | |
383 | ||
384 | for (i = 1; i < 32; i++) | |
385 | regs->gr[i] = pim_narrow->gr[i]; | |
386 | ||
387 | for (i = 0; i < 32; i++) | |
388 | regs->fr[i] = pim_narrow->fr[i]; | |
389 | ||
390 | for (i = 0; i < 8; i++) | |
391 | regs->sr[i] = pim_narrow->sr[i]; | |
392 | ||
393 | regs->iasq[0] = pim_narrow->cr[17]; | |
394 | regs->iasq[1] = pim_narrow->iasq_back; | |
395 | regs->iaoq[0] = pim_narrow->cr[18]; | |
396 | regs->iaoq[1] = pim_narrow->iaoq_back; | |
397 | ||
398 | regs->sar = pim_narrow->cr[11]; | |
399 | regs->iir = pim_narrow->cr[19]; | |
400 | regs->isr = pim_narrow->cr[20]; | |
401 | regs->ior = pim_narrow->cr[21]; | |
402 | } | |
403 | ||
404 | /* | |
405 | * The following fields only have meaning if we came through | |
406 | * another path. So just zero them here. | |
407 | */ | |
408 | ||
409 | regs->ksp = 0; | |
410 | regs->kpc = 0; | |
411 | regs->orig_r28 = 0; | |
412 | } | |
413 | ||
414 | ||
415 | /* | |
416 | * This routine is called as a last resort when everything else | |
417 | * has gone clearly wrong. We get called for faults in kernel space, | |
418 | * and HPMC's. | |
419 | */ | |
420 | void parisc_terminate(char *msg, struct pt_regs *regs, int code, unsigned long offset) | |
421 | { | |
422 | static DEFINE_SPINLOCK(terminate_lock); | |
423 | ||
ec4d396b | 424 | (void)notify_die(DIE_OOPS, msg, regs, 0, code, SIGTRAP); |
c288ac97 | 425 | bust_spinlocks(1); |
1da177e4 LT |
426 | |
427 | set_eiem(0); | |
428 | local_irq_disable(); | |
429 | spin_lock(&terminate_lock); | |
430 | ||
431 | /* unlock the pdc lock if necessary */ | |
432 | pdc_emergency_unlock(); | |
433 | ||
434 | /* restart pdc console if necessary */ | |
435 | if (!console_drivers) | |
436 | pdc_console_restart(); | |
437 | ||
438 | /* Not all paths will gutter the processor... */ | |
439 | switch(code){ | |
440 | ||
441 | case 1: | |
442 | transfer_pim_to_trap_frame(regs); | |
443 | break; | |
444 | ||
445 | default: | |
446 | /* Fall through */ | |
447 | break; | |
448 | ||
449 | } | |
450 | ||
451 | { | |
452 | /* show_stack(NULL, (unsigned long *)regs->gr[30]); */ | |
453 | struct unwind_frame_info info; | |
454 | unwind_frame_init(&info, current, regs); | |
3481d31b | 455 | do_show_stack(&info, KERN_CRIT); |
1da177e4 LT |
456 | } |
457 | ||
458 | printk("\n"); | |
e98bc5ee HD |
459 | pr_crit("%s: Code=%d (%s) at addr " RFMT "\n", |
460 | msg, code, trap_name(code), offset); | |
1da177e4 LT |
461 | show_regs(regs); |
462 | ||
463 | spin_unlock(&terminate_lock); | |
464 | ||
465 | /* put soft power button back under hardware control; | |
466 | * if the user had pressed it once at any time, the | |
467 | * system will shut down immediately right here. */ | |
468 | pdc_soft_power_button(0); | |
469 | ||
470 | /* Call kernel panic() so reboot timeouts work properly | |
471 | * FIXME: This function should be on the list of | |
472 | * panic notifiers, and we should call panic | |
473 | * directly from the location that we wish. | |
474 | * e.g. We should not call panic from | |
475 | * parisc_terminate, but rather the oter way around. | |
476 | * This hack works, prints the panic message twice, | |
477 | * and it enables reboot timers! | |
478 | */ | |
479 | panic(msg); | |
480 | } | |
481 | ||
d75f054a | 482 | void notrace handle_interruption(int code, struct pt_regs *regs) |
1da177e4 LT |
483 | { |
484 | unsigned long fault_address = 0; | |
485 | unsigned long fault_space = 0; | |
ccf75290 | 486 | int si_code; |
1da177e4 LT |
487 | |
488 | if (code == 1) | |
489 | pdc_console_restart(); /* switch back to pdc if HPMC */ | |
490 | else | |
491 | local_irq_enable(); | |
492 | ||
493 | /* Security check: | |
494 | * If the priority level is still user, and the | |
495 | * faulting space is not equal to the active space | |
496 | * then the user is attempting something in a space | |
497 | * that does not belong to them. Kill the process. | |
498 | * | |
499 | * This is normally the situation when the user | |
500 | * attempts to jump into the kernel space at the | |
501 | * wrong offset, be it at the gateway page or a | |
502 | * random location. | |
503 | * | |
504 | * We cannot normally signal the process because it | |
505 | * could *be* on the gateway page, and processes | |
506 | * executing on the gateway page can't have signals | |
507 | * delivered. | |
508 | * | |
509 | * We merely readjust the address into the users | |
510 | * space, at a destination address of zero, and | |
511 | * allow processing to continue. | |
512 | */ | |
513 | if (((unsigned long)regs->iaoq[0] & 3) && | |
514 | ((unsigned long)regs->iasq[0] != (unsigned long)regs->sr[7])) { | |
a39e6bea REB |
515 | /* Kill the user process later */ |
516 | regs->iaoq[0] = 0 | 3; | |
1da177e4 | 517 | regs->iaoq[1] = regs->iaoq[0] + 4; |
a39e6bea | 518 | regs->iasq[0] = regs->iasq[1] = regs->sr[7]; |
1da177e4 LT |
519 | regs->gr[0] &= ~PSW_B; |
520 | return; | |
521 | } | |
522 | ||
523 | #if 0 | |
524 | printk(KERN_CRIT "Interruption # %d\n", code); | |
525 | #endif | |
526 | ||
527 | switch(code) { | |
528 | ||
529 | case 1: | |
530 | /* High-priority machine check (HPMC) */ | |
531 | ||
532 | /* set up a new led state on systems shipped with a LED State panel */ | |
533 | pdc_chassis_send_status(PDC_CHASSIS_DIRECT_HPMC); | |
a39e6bea REB |
534 | |
535 | parisc_terminate("High Priority Machine Check (HPMC)", | |
1da177e4 LT |
536 | regs, code, 0); |
537 | /* NOT REACHED */ | |
538 | ||
539 | case 2: | |
540 | /* Power failure interrupt */ | |
541 | printk(KERN_CRIT "Power failure interrupt !\n"); | |
542 | return; | |
543 | ||
544 | case 3: | |
545 | /* Recovery counter trap */ | |
546 | regs->gr[0] &= ~PSW_R; | |
eacbfce1 | 547 | |
8858ac8e SS |
548 | #ifdef CONFIG_KPROBES |
549 | if (parisc_kprobe_ss_handler(regs)) | |
550 | return; | |
551 | #endif | |
552 | ||
eacbfce1 SS |
553 | #ifdef CONFIG_KGDB |
554 | if (kgdb_single_step) { | |
555 | kgdb_handle_exception(0, SIGTRAP, 0, regs); | |
556 | return; | |
557 | } | |
558 | #endif | |
559 | ||
1da177e4 LT |
560 | if (user_space(regs)) |
561 | handle_gdb_break(regs, TRAP_TRACE); | |
562 | /* else this must be the start of a syscall - just let it run */ | |
563 | return; | |
564 | ||
565 | case 5: | |
566 | /* Low-priority machine check */ | |
567 | pdc_chassis_send_status(PDC_CHASSIS_DIRECT_LPMC); | |
568 | ||
d6ce8626 RC |
569 | flush_cache_all(); |
570 | flush_tlb_all(); | |
1da177e4 LT |
571 | cpu_lpmc(5, regs); |
572 | return; | |
573 | ||
5b00ca0b | 574 | case PARISC_ITLB_TRAP: |
1da177e4 LT |
575 | /* Instruction TLB miss fault/Instruction page fault */ |
576 | fault_address = regs->iaoq[0]; | |
577 | fault_space = regs->iasq[0]; | |
578 | break; | |
579 | ||
580 | case 8: | |
581 | /* Illegal instruction trap */ | |
582 | die_if_kernel("Illegal instruction", regs, code); | |
ccf75290 | 583 | si_code = ILL_ILLOPC; |
1da177e4 LT |
584 | goto give_sigill; |
585 | ||
586 | case 9: | |
587 | /* Break instruction trap */ | |
6891f8a1 | 588 | handle_break(regs); |
1da177e4 | 589 | return; |
a39e6bea | 590 | |
1da177e4 LT |
591 | case 10: |
592 | /* Privileged operation trap */ | |
593 | die_if_kernel("Privileged operation", regs, code); | |
ccf75290 | 594 | si_code = ILL_PRVOPC; |
1da177e4 | 595 | goto give_sigill; |
a39e6bea | 596 | |
1da177e4 LT |
597 | case 11: |
598 | /* Privileged register trap */ | |
599 | if ((regs->iir & 0xffdfffe0) == 0x034008a0) { | |
600 | ||
601 | /* This is a MFCTL cr26/cr27 to gr instruction. | |
602 | * PCXS traps on this, so we need to emulate it. | |
603 | */ | |
604 | ||
605 | if (regs->iir & 0x00200000) | |
606 | regs->gr[regs->iir & 0x1f] = mfctl(27); | |
607 | else | |
608 | regs->gr[regs->iir & 0x1f] = mfctl(26); | |
609 | ||
610 | regs->iaoq[0] = regs->iaoq[1]; | |
611 | regs->iaoq[1] += 4; | |
612 | regs->iasq[0] = regs->iasq[1]; | |
613 | return; | |
614 | } | |
615 | ||
616 | die_if_kernel("Privileged register usage", regs, code); | |
ccf75290 | 617 | si_code = ILL_PRVREG; |
1da177e4 | 618 | give_sigill: |
ccf75290 | 619 | force_sig_fault(SIGILL, si_code, |
2e1661d2 | 620 | (void __user *) regs->iaoq[0]); |
1da177e4 LT |
621 | return; |
622 | ||
623 | case 12: | |
624 | /* Overflow Trap, let the userland signal handler do the cleanup */ | |
ccf75290 | 625 | force_sig_fault(SIGFPE, FPE_INTOVF, |
2e1661d2 | 626 | (void __user *) regs->iaoq[0]); |
1da177e4 LT |
627 | return; |
628 | ||
629 | case 13: | |
630 | /* Conditional Trap | |
7022672e | 631 | The condition succeeds in an instruction which traps |
1da177e4 LT |
632 | on condition */ |
633 | if(user_mode(regs)){ | |
75abf642 HD |
634 | /* Let userspace app figure it out from the insn pointed |
635 | * to by si_addr. | |
636 | */ | |
ccf75290 | 637 | force_sig_fault(SIGFPE, FPE_CONDTRAP, |
2e1661d2 | 638 | (void __user *) regs->iaoq[0]); |
1da177e4 LT |
639 | return; |
640 | } | |
641 | /* The kernel doesn't want to handle condition codes */ | |
642 | break; | |
643 | ||
644 | case 14: | |
645 | /* Assist Exception Trap, i.e. floating point exception. */ | |
646 | die_if_kernel("Floating point exception", regs, 0); /* quiet */ | |
d0c3be80 | 647 | __inc_irq_stat(irq_fpassist_count); |
1da177e4 LT |
648 | handle_fpe(regs); |
649 | return; | |
a39e6bea | 650 | |
1da177e4 LT |
651 | case 15: |
652 | /* Data TLB miss fault/Data page fault */ | |
653 | /* Fall through */ | |
654 | case 16: | |
655 | /* Non-access instruction TLB miss fault */ | |
656 | /* The instruction TLB entry needed for the target address of the FIC | |
657 | is absent, and hardware can't find it, so we get to cleanup */ | |
658 | /* Fall through */ | |
659 | case 17: | |
660 | /* Non-access data TLB miss fault/Non-access data page fault */ | |
661 | /* FIXME: | |
a39e6bea REB |
662 | Still need to add slow path emulation code here! |
663 | If the insn used a non-shadow register, then the tlb | |
1da177e4 LT |
664 | handlers could not have their side-effect (e.g. probe |
665 | writing to a target register) emulated since rfir would | |
666 | erase the changes to said register. Instead we have to | |
667 | setup everything, call this function we are in, and emulate | |
668 | by hand. Technically we need to emulate: | |
669 | fdc,fdce,pdc,"fic,4f",prober,probeir,probew, probeiw | |
a39e6bea | 670 | */ |
1da177e4 LT |
671 | fault_address = regs->ior; |
672 | fault_space = regs->isr; | |
673 | break; | |
674 | ||
675 | case 18: | |
676 | /* PCXS only -- later cpu's split this into types 26,27 & 28 */ | |
677 | /* Check for unaligned access */ | |
678 | if (check_unaligned(regs)) { | |
679 | handle_unaligned(regs); | |
680 | return; | |
681 | } | |
682 | /* Fall Through */ | |
683 | case 26: | |
684 | /* PCXL: Data memory access rights trap */ | |
685 | fault_address = regs->ior; | |
686 | fault_space = regs->isr; | |
687 | break; | |
688 | ||
689 | case 19: | |
690 | /* Data memory break trap */ | |
691 | regs->gr[0] |= PSW_X; /* So we can single-step over the trap */ | |
692 | /* fall thru */ | |
693 | case 21: | |
694 | /* Page reference trap */ | |
695 | handle_gdb_break(regs, TRAP_HWBKPT); | |
696 | return; | |
697 | ||
698 | case 25: | |
699 | /* Taken branch trap */ | |
700 | regs->gr[0] &= ~PSW_T; | |
701 | if (user_space(regs)) | |
702 | handle_gdb_break(regs, TRAP_BRANCH); | |
703 | /* else this must be the start of a syscall - just let it | |
704 | * run. | |
705 | */ | |
706 | return; | |
707 | ||
708 | case 7: | |
709 | /* Instruction access rights */ | |
710 | /* PCXL: Instruction memory protection trap */ | |
711 | ||
712 | /* | |
713 | * This could be caused by either: 1) a process attempting | |
714 | * to execute within a vma that does not have execute | |
715 | * permission, or 2) an access rights violation caused by a | |
716 | * flush only translation set up by ptep_get_and_clear(). | |
717 | * So we check the vma permissions to differentiate the two. | |
718 | * If the vma indicates we have execute permission, then | |
719 | * the cause is the latter one. In this case, we need to | |
720 | * call do_page_fault() to fix the problem. | |
721 | */ | |
722 | ||
723 | if (user_mode(regs)) { | |
724 | struct vm_area_struct *vma; | |
725 | ||
726 | down_read(¤t->mm->mmap_sem); | |
727 | vma = find_vma(current->mm,regs->iaoq[0]); | |
728 | if (vma && (regs->iaoq[0] >= vma->vm_start) | |
729 | && (vma->vm_flags & VM_EXEC)) { | |
730 | ||
731 | fault_address = regs->iaoq[0]; | |
732 | fault_space = regs->iasq[0]; | |
733 | ||
734 | up_read(¤t->mm->mmap_sem); | |
735 | break; /* call do_page_fault() */ | |
736 | } | |
737 | up_read(¤t->mm->mmap_sem); | |
738 | } | |
739 | /* Fall Through */ | |
740 | case 27: | |
741 | /* Data memory protection ID trap */ | |
c61c25eb KM |
742 | if (code == 27 && !user_mode(regs) && |
743 | fixup_exception(regs)) | |
744 | return; | |
745 | ||
1da177e4 | 746 | die_if_kernel("Protection id trap", regs, code); |
ccf75290 EB |
747 | force_sig_fault(SIGSEGV, SEGV_MAPERR, |
748 | (code == 7)? | |
749 | ((void __user *) regs->iaoq[0]) : | |
2e1661d2 | 750 | ((void __user *) regs->ior)); |
1da177e4 LT |
751 | return; |
752 | ||
753 | case 28: | |
754 | /* Unaligned data reference trap */ | |
755 | handle_unaligned(regs); | |
756 | return; | |
757 | ||
758 | default: | |
759 | if (user_mode(regs)) { | |
fef47e2a HD |
760 | parisc_printk_ratelimited(0, regs, KERN_DEBUG |
761 | "handle_interruption() pid=%d command='%s'\n", | |
762 | task_pid_nr(current), current->comm); | |
1da177e4 | 763 | /* SIGBUS, for lack of a better one. */ |
ccf75290 | 764 | force_sig_fault(SIGBUS, BUS_OBJERR, |
2e1661d2 | 765 | (void __user *)regs->ior); |
1da177e4 LT |
766 | return; |
767 | } | |
768 | pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC); | |
769 | ||
770 | parisc_terminate("Unexpected interruption", regs, code, 0); | |
771 | /* NOT REACHED */ | |
772 | } | |
773 | ||
774 | if (user_mode(regs)) { | |
775 | if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) { | |
fef47e2a HD |
776 | parisc_printk_ratelimited(0, regs, KERN_DEBUG |
777 | "User fault %d on space 0x%08lx, pid=%d command='%s'\n", | |
778 | code, fault_space, | |
779 | task_pid_nr(current), current->comm); | |
ccf75290 | 780 | force_sig_fault(SIGSEGV, SEGV_MAPERR, |
2e1661d2 | 781 | (void __user *)regs->ior); |
1da177e4 LT |
782 | return; |
783 | } | |
784 | } | |
785 | else { | |
786 | ||
787 | /* | |
59b33f14 HD |
788 | * The kernel should never fault on its own address space, |
789 | * unless pagefault_disable() was called before. | |
1da177e4 LT |
790 | */ |
791 | ||
70ffdb93 | 792 | if (fault_space == 0 && !faulthandler_disabled()) |
1da177e4 | 793 | { |
ef72f311 HD |
794 | /* Clean up and return if in exception table. */ |
795 | if (fixup_exception(regs)) | |
796 | return; | |
1da177e4 LT |
797 | pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC); |
798 | parisc_terminate("Kernel Fault", regs, code, fault_address); | |
1da177e4 LT |
799 | } |
800 | } | |
801 | ||
802 | do_page_fault(regs, code, fault_address); | |
803 | } | |
804 | ||
805 | ||
4182d0cd | 806 | void __init initialize_ivt(const void *iva) |
1da177e4 | 807 | { |
ae16489e | 808 | extern u32 os_hpmc_size; |
c3d4ed4e | 809 | extern const u32 os_hpmc[]; |
c3d4ed4e | 810 | |
1da177e4 LT |
811 | int i; |
812 | u32 check = 0; | |
813 | u32 *ivap; | |
814 | u32 *hpmcp; | |
8d771b14 | 815 | u32 length, instr; |
1da177e4 | 816 | |
4182d0cd HD |
817 | if (strcmp((const char *)iva, "cows can fly")) |
818 | panic("IVT invalid"); | |
1da177e4 LT |
819 | |
820 | ivap = (u32 *)iva; | |
821 | ||
822 | for (i = 0; i < 8; i++) | |
823 | *ivap++ = 0; | |
824 | ||
8d771b14 HD |
825 | /* |
826 | * Use PDC_INSTR firmware function to get instruction that invokes | |
827 | * PDCE_CHECK in HPMC handler. See programming note at page 1-31 of | |
828 | * the PA 1.1 Firmware Architecture document. | |
829 | */ | |
830 | if (pdc_instr(&instr) == PDC_OK) | |
831 | ivap[0] = instr; | |
832 | ||
41dbee81 HD |
833 | /* |
834 | * Rules for the checksum of the HPMC handler: | |
835 | * 1. The IVA does not point to PDC/PDH space (ie: the OS has installed | |
836 | * its own IVA). | |
837 | * 2. The word at IVA + 32 is nonzero. | |
838 | * 3. If Length (IVA + 60) is not zero, then Length (IVA + 60) and | |
839 | * Address (IVA + 56) are word-aligned. | |
840 | * 4. The checksum of the 8 words starting at IVA + 32 plus the sum of | |
841 | * the Length/4 words starting at Address is zero. | |
842 | */ | |
843 | ||
1138b671 JDA |
844 | /* Setup IVA and compute checksum for HPMC handler */ |
845 | ivap[6] = (u32)__pa(os_hpmc); | |
ae16489e | 846 | length = os_hpmc_size; |
1da177e4 LT |
847 | ivap[7] = length; |
848 | ||
849 | hpmcp = (u32 *)os_hpmc; | |
850 | ||
851 | for (i=0; i<length/4; i++) | |
852 | check += *hpmcp++; | |
853 | ||
854 | for (i=0; i<8; i++) | |
855 | check += ivap[i]; | |
856 | ||
857 | ivap[5] = -check; | |
1da177e4 LT |
858 | } |
859 | ||
1da177e4 | 860 | |
4182d0cd HD |
861 | /* early_trap_init() is called before we set up kernel mappings and |
862 | * write-protect the kernel */ | |
863 | void __init early_trap_init(void) | |
1da177e4 | 864 | { |
4182d0cd | 865 | extern const void fault_vector_20; |
1da177e4 | 866 | |
4182d0cd HD |
867 | #ifndef CONFIG_64BIT |
868 | extern const void fault_vector_11; | |
869 | initialize_ivt(&fault_vector_11); | |
1da177e4 LT |
870 | #endif |
871 | ||
4182d0cd HD |
872 | initialize_ivt(&fault_vector_20); |
873 | } | |
874 | ||
875 | void __init trap_init(void) | |
876 | { | |
1da177e4 | 877 | } |