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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 LT |
2 | /* |
3 | * linux/arch/parisc/mm/init.c | |
4 | * | |
5 | * Copyright (C) 1995 Linus Torvalds | |
6 | * Copyright 1999 SuSE GmbH | |
7 | * changed by Philipp Rumpf | |
8 | * Copyright 1999 Philipp Rumpf (prumpf@tux.org) | |
9 | * Copyright 2004 Randolph Chung (tausq@debian.org) | |
a8f44e38 | 10 | * Copyright 2006-2007 Helge Deller (deller@gmx.de) |
1da177e4 LT |
11 | * |
12 | */ | |
13 | ||
1da177e4 LT |
14 | |
15 | #include <linux/module.h> | |
16 | #include <linux/mm.h> | |
17 | #include <linux/bootmem.h> | |
4fe9e1d9 | 18 | #include <linux/memblock.h> |
5a0e3ad6 | 19 | #include <linux/gfp.h> |
1da177e4 LT |
20 | #include <linux/delay.h> |
21 | #include <linux/init.h> | |
22 | #include <linux/pci.h> /* for hppa_dma_ops and pcxl_dma_ops */ | |
23 | #include <linux/initrd.h> | |
24 | #include <linux/swap.h> | |
25 | #include <linux/unistd.h> | |
26 | #include <linux/nodemask.h> /* for node_online_map */ | |
ea1754a0 | 27 | #include <linux/pagemap.h> /* for release_pages */ |
d0cf62fb | 28 | #include <linux/compat.h> |
1da177e4 LT |
29 | |
30 | #include <asm/pgalloc.h> | |
ce8420bb | 31 | #include <asm/pgtable.h> |
1da177e4 LT |
32 | #include <asm/tlb.h> |
33 | #include <asm/pdc_chassis.h> | |
34 | #include <asm/mmzone.h> | |
a581c2a4 | 35 | #include <asm/sections.h> |
d0cf62fb | 36 | #include <asm/msgbuf.h> |
1da177e4 | 37 | |
1da177e4 | 38 | extern int data_start; |
161bd3bf | 39 | extern void parisc_kernel_start(void); /* Kernel entry point in head.S */ |
1da177e4 | 40 | |
f24ffde4 | 41 | #if CONFIG_PGTABLE_LEVELS == 3 |
c39f52a9 TG |
42 | /* NOTE: This layout exactly conforms to the hybrid L2/L3 page table layout |
43 | * with the first pmd adjacent to the pgd and below it. gcc doesn't actually | |
44 | * guarantee that global objects will be laid out in memory in the same order | |
45 | * as the order of declaration, so put these in different sections and use | |
46 | * the linker script to order them. */ | |
47 | pmd_t pmd0[PTRS_PER_PMD] __attribute__ ((__section__ (".data..vm0.pmd"), aligned(PAGE_SIZE))); | |
48 | #endif | |
49 | ||
50 | pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__ ((__section__ (".data..vm0.pgd"), aligned(PAGE_SIZE))); | |
51 | pte_t pg0[PT_INITIAL * PTRS_PER_PTE] __attribute__ ((__section__ (".data..vm0.pte"), aligned(PAGE_SIZE))); | |
52 | ||
1da177e4 | 53 | #ifdef CONFIG_DISCONTIGMEM |
8039de10 | 54 | struct node_map_data node_data[MAX_NUMNODES] __read_mostly; |
91ea8207 | 55 | signed char pfnnid_map[PFNNID_MAP_MAX] __read_mostly; |
1da177e4 LT |
56 | #endif |
57 | ||
58 | static struct resource data_resource = { | |
59 | .name = "Kernel data", | |
35d98e93 | 60 | .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM, |
1da177e4 LT |
61 | }; |
62 | ||
63 | static struct resource code_resource = { | |
64 | .name = "Kernel code", | |
35d98e93 | 65 | .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM, |
1da177e4 LT |
66 | }; |
67 | ||
68 | static struct resource pdcdata_resource = { | |
69 | .name = "PDC data (Page Zero)", | |
70 | .start = 0, | |
71 | .end = 0x9ff, | |
72 | .flags = IORESOURCE_BUSY | IORESOURCE_MEM, | |
73 | }; | |
74 | ||
8039de10 | 75 | static struct resource sysram_resources[MAX_PHYSMEM_RANGES] __read_mostly; |
1da177e4 LT |
76 | |
77 | /* The following array is initialized from the firmware specific | |
78 | * information retrieved in kernel/inventory.c. | |
79 | */ | |
80 | ||
8039de10 HD |
81 | physmem_range_t pmem_ranges[MAX_PHYSMEM_RANGES] __read_mostly; |
82 | int npmem_ranges __read_mostly; | |
1da177e4 | 83 | |
4fe9e1d9 HD |
84 | /* |
85 | * get_memblock() allocates pages via memblock. | |
86 | * We can't use memblock_find_in_range(0, KERNEL_INITIAL_SIZE) here since it | |
87 | * doesn't allocate from bottom to top which is needed because we only created | |
88 | * the initial mapping up to KERNEL_INITIAL_SIZE in the assembly bootup code. | |
89 | */ | |
90 | static void * __init get_memblock(unsigned long size) | |
91 | { | |
92 | static phys_addr_t search_addr __initdata; | |
93 | phys_addr_t phys; | |
94 | ||
95 | if (!search_addr) | |
96 | search_addr = PAGE_ALIGN(__pa((unsigned long) &_end)); | |
97 | search_addr = ALIGN(search_addr, size); | |
98 | while (!memblock_is_region_memory(search_addr, size) || | |
99 | memblock_is_region_reserved(search_addr, size)) { | |
100 | search_addr += size; | |
101 | } | |
102 | phys = search_addr; | |
103 | ||
104 | if (phys) | |
105 | memblock_reserve(phys, size); | |
106 | else | |
107 | panic("get_memblock() failed.\n"); | |
108 | ||
e3b6a028 HD |
109 | memset(__va(phys), 0, size); |
110 | ||
4fe9e1d9 HD |
111 | return __va(phys); |
112 | } | |
113 | ||
a8f44e38 | 114 | #ifdef CONFIG_64BIT |
1da177e4 | 115 | #define MAX_MEM (~0UL) |
a8f44e38 | 116 | #else /* !CONFIG_64BIT */ |
1da177e4 | 117 | #define MAX_MEM (3584U*1024U*1024U) |
a8f44e38 | 118 | #endif /* !CONFIG_64BIT */ |
1da177e4 | 119 | |
8039de10 | 120 | static unsigned long mem_limit __read_mostly = MAX_MEM; |
1da177e4 LT |
121 | |
122 | static void __init mem_limit_func(void) | |
123 | { | |
124 | char *cp, *end; | |
125 | unsigned long limit; | |
1da177e4 LT |
126 | |
127 | /* We need this before __setup() functions are called */ | |
128 | ||
129 | limit = MAX_MEM; | |
668f9931 | 130 | for (cp = boot_command_line; *cp; ) { |
1da177e4 LT |
131 | if (memcmp(cp, "mem=", 4) == 0) { |
132 | cp += 4; | |
133 | limit = memparse(cp, &end); | |
134 | if (end != cp) | |
135 | break; | |
136 | cp = end; | |
137 | } else { | |
138 | while (*cp != ' ' && *cp) | |
139 | ++cp; | |
140 | while (*cp == ' ') | |
141 | ++cp; | |
142 | } | |
143 | } | |
144 | ||
145 | if (limit < mem_limit) | |
146 | mem_limit = limit; | |
147 | } | |
148 | ||
149 | #define MAX_GAP (0x40000000UL >> PAGE_SHIFT) | |
150 | ||
151 | static void __init setup_bootmem(void) | |
152 | { | |
1da177e4 | 153 | unsigned long mem_max; |
1da177e4 LT |
154 | #ifndef CONFIG_DISCONTIGMEM |
155 | physmem_range_t pmem_holes[MAX_PHYSMEM_RANGES - 1]; | |
156 | int npmem_holes; | |
157 | #endif | |
158 | int i, sysram_resource_count; | |
159 | ||
160 | disable_sr_hashing(); /* Turn off space register hashing */ | |
161 | ||
162 | /* | |
163 | * Sort the ranges. Since the number of ranges is typically | |
164 | * small, and performance is not an issue here, just do | |
165 | * a simple insertion sort. | |
166 | */ | |
167 | ||
168 | for (i = 1; i < npmem_ranges; i++) { | |
169 | int j; | |
170 | ||
171 | for (j = i; j > 0; j--) { | |
172 | unsigned long tmp; | |
173 | ||
174 | if (pmem_ranges[j-1].start_pfn < | |
175 | pmem_ranges[j].start_pfn) { | |
176 | ||
177 | break; | |
178 | } | |
179 | tmp = pmem_ranges[j-1].start_pfn; | |
180 | pmem_ranges[j-1].start_pfn = pmem_ranges[j].start_pfn; | |
181 | pmem_ranges[j].start_pfn = tmp; | |
182 | tmp = pmem_ranges[j-1].pages; | |
183 | pmem_ranges[j-1].pages = pmem_ranges[j].pages; | |
184 | pmem_ranges[j].pages = tmp; | |
185 | } | |
186 | } | |
187 | ||
188 | #ifndef CONFIG_DISCONTIGMEM | |
189 | /* | |
190 | * Throw out ranges that are too far apart (controlled by | |
191 | * MAX_GAP). | |
192 | */ | |
193 | ||
194 | for (i = 1; i < npmem_ranges; i++) { | |
195 | if (pmem_ranges[i].start_pfn - | |
196 | (pmem_ranges[i-1].start_pfn + | |
197 | pmem_ranges[i-1].pages) > MAX_GAP) { | |
198 | npmem_ranges = i; | |
199 | printk("Large gap in memory detected (%ld pages). " | |
200 | "Consider turning on CONFIG_DISCONTIGMEM\n", | |
201 | pmem_ranges[i].start_pfn - | |
202 | (pmem_ranges[i-1].start_pfn + | |
203 | pmem_ranges[i-1].pages)); | |
204 | break; | |
205 | } | |
206 | } | |
207 | #endif | |
208 | ||
4fe9e1d9 HD |
209 | /* Print the memory ranges */ |
210 | pr_info("Memory Ranges:\n"); | |
1da177e4 | 211 | |
4fe9e1d9 HD |
212 | for (i = 0; i < npmem_ranges; i++) { |
213 | struct resource *res = &sysram_resources[i]; | |
214 | unsigned long start; | |
215 | unsigned long size; | |
1da177e4 | 216 | |
4fe9e1d9 HD |
217 | size = (pmem_ranges[i].pages << PAGE_SHIFT); |
218 | start = (pmem_ranges[i].start_pfn << PAGE_SHIFT); | |
219 | pr_info("%2d) Start 0x%016lx End 0x%016lx Size %6ld MB\n", | |
220 | i, start, start + (size - 1), size >> 20); | |
1da177e4 | 221 | |
4fe9e1d9 | 222 | /* request memory resource */ |
1da177e4 | 223 | res->name = "System RAM"; |
4fe9e1d9 HD |
224 | res->start = start; |
225 | res->end = start + size - 1; | |
35d98e93 | 226 | res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY; |
1da177e4 LT |
227 | request_resource(&iomem_resource, res); |
228 | } | |
229 | ||
4fe9e1d9 HD |
230 | sysram_resource_count = npmem_ranges; |
231 | ||
1da177e4 LT |
232 | /* |
233 | * For 32 bit kernels we limit the amount of memory we can | |
234 | * support, in order to preserve enough kernel address space | |
235 | * for other purposes. For 64 bit kernels we don't normally | |
236 | * limit the memory, but this mechanism can be used to | |
237 | * artificially limit the amount of memory (and it is written | |
238 | * to work with multiple memory ranges). | |
239 | */ | |
240 | ||
241 | mem_limit_func(); /* check for "mem=" argument */ | |
242 | ||
243 | mem_max = 0; | |
1da177e4 LT |
244 | for (i = 0; i < npmem_ranges; i++) { |
245 | unsigned long rsize; | |
246 | ||
247 | rsize = pmem_ranges[i].pages << PAGE_SHIFT; | |
248 | if ((mem_max + rsize) > mem_limit) { | |
249 | printk(KERN_WARNING "Memory truncated to %ld MB\n", mem_limit >> 20); | |
250 | if (mem_max == mem_limit) | |
251 | npmem_ranges = i; | |
252 | else { | |
253 | pmem_ranges[i].pages = (mem_limit >> PAGE_SHIFT) | |
254 | - (mem_max >> PAGE_SHIFT); | |
255 | npmem_ranges = i + 1; | |
256 | mem_max = mem_limit; | |
257 | } | |
1da177e4 LT |
258 | break; |
259 | } | |
1da177e4 LT |
260 | mem_max += rsize; |
261 | } | |
262 | ||
263 | printk(KERN_INFO "Total Memory: %ld MB\n",mem_max >> 20); | |
264 | ||
265 | #ifndef CONFIG_DISCONTIGMEM | |
266 | /* Merge the ranges, keeping track of the holes */ | |
267 | ||
268 | { | |
269 | unsigned long end_pfn; | |
270 | unsigned long hole_pages; | |
271 | ||
272 | npmem_holes = 0; | |
273 | end_pfn = pmem_ranges[0].start_pfn + pmem_ranges[0].pages; | |
274 | for (i = 1; i < npmem_ranges; i++) { | |
275 | ||
276 | hole_pages = pmem_ranges[i].start_pfn - end_pfn; | |
277 | if (hole_pages) { | |
278 | pmem_holes[npmem_holes].start_pfn = end_pfn; | |
279 | pmem_holes[npmem_holes++].pages = hole_pages; | |
280 | end_pfn += hole_pages; | |
281 | } | |
282 | end_pfn += pmem_ranges[i].pages; | |
283 | } | |
284 | ||
285 | pmem_ranges[0].pages = end_pfn - pmem_ranges[0].start_pfn; | |
286 | npmem_ranges = 1; | |
287 | } | |
288 | #endif | |
289 | ||
1da177e4 LT |
290 | #ifdef CONFIG_DISCONTIGMEM |
291 | for (i = 0; i < MAX_PHYSMEM_RANGES; i++) { | |
292 | memset(NODE_DATA(i), 0, sizeof(pg_data_t)); | |
1da177e4 LT |
293 | } |
294 | memset(pfnnid_map, 0xff, sizeof(pfnnid_map)); | |
295 | ||
d9b41e0b DR |
296 | for (i = 0; i < npmem_ranges; i++) { |
297 | node_set_state(i, N_NORMAL_MEMORY); | |
1da177e4 | 298 | node_set_online(i); |
d9b41e0b | 299 | } |
1da177e4 LT |
300 | #endif |
301 | ||
302 | /* | |
303 | * Initialize and free the full range of memory in each range. | |
1da177e4 LT |
304 | */ |
305 | ||
1da177e4 LT |
306 | max_pfn = 0; |
307 | for (i = 0; i < npmem_ranges; i++) { | |
308 | unsigned long start_pfn; | |
309 | unsigned long npages; | |
4fe9e1d9 HD |
310 | unsigned long start; |
311 | unsigned long size; | |
1da177e4 LT |
312 | |
313 | start_pfn = pmem_ranges[i].start_pfn; | |
314 | npages = pmem_ranges[i].pages; | |
315 | ||
4fe9e1d9 HD |
316 | start = start_pfn << PAGE_SHIFT; |
317 | size = npages << PAGE_SHIFT; | |
318 | ||
319 | /* add system RAM memblock */ | |
320 | memblock_add(start, size); | |
321 | ||
1da177e4 LT |
322 | if ((start_pfn + npages) > max_pfn) |
323 | max_pfn = start_pfn + npages; | |
324 | } | |
325 | ||
5cdb8205 GG |
326 | /* IOMMU is always used to access "high mem" on those boxes |
327 | * that can support enough mem that a PCI device couldn't | |
328 | * directly DMA to any physical addresses. | |
329 | * ISA DMA support will need to revisit this. | |
330 | */ | |
331 | max_low_pfn = max_pfn; | |
332 | ||
1da177e4 LT |
333 | /* reserve PAGE0 pdc memory, kernel text/data/bss & bootmap */ |
334 | ||
335 | #define PDC_CONSOLE_IO_IODC_SIZE 32768 | |
336 | ||
4fe9e1d9 HD |
337 | memblock_reserve(0UL, (unsigned long)(PAGE0->mem_free + |
338 | PDC_CONSOLE_IO_IODC_SIZE)); | |
339 | memblock_reserve(__pa(KERNEL_BINARY_TEXT_START), | |
340 | (unsigned long)(_end - KERNEL_BINARY_TEXT_START)); | |
1da177e4 LT |
341 | |
342 | #ifndef CONFIG_DISCONTIGMEM | |
343 | ||
344 | /* reserve the holes */ | |
345 | ||
346 | for (i = 0; i < npmem_holes; i++) { | |
4fe9e1d9 HD |
347 | memblock_reserve((pmem_holes[i].start_pfn << PAGE_SHIFT), |
348 | (pmem_holes[i].pages << PAGE_SHIFT)); | |
1da177e4 LT |
349 | } |
350 | #endif | |
351 | ||
352 | #ifdef CONFIG_BLK_DEV_INITRD | |
353 | if (initrd_start) { | |
354 | printk(KERN_INFO "initrd: %08lx-%08lx\n", initrd_start, initrd_end); | |
355 | if (__pa(initrd_start) < mem_max) { | |
356 | unsigned long initrd_reserve; | |
357 | ||
358 | if (__pa(initrd_end) > mem_max) { | |
359 | initrd_reserve = mem_max - __pa(initrd_start); | |
360 | } else { | |
361 | initrd_reserve = initrd_end - initrd_start; | |
362 | } | |
363 | initrd_below_start_ok = 1; | |
364 | printk(KERN_INFO "initrd: reserving %08lx-%08lx (mem_max %08lx)\n", __pa(initrd_start), __pa(initrd_start) + initrd_reserve, mem_max); | |
365 | ||
4fe9e1d9 | 366 | memblock_reserve(__pa(initrd_start), initrd_reserve); |
1da177e4 LT |
367 | } |
368 | } | |
369 | #endif | |
370 | ||
371 | data_resource.start = virt_to_phys(&data_start); | |
c51d476a KM |
372 | data_resource.end = virt_to_phys(_end) - 1; |
373 | code_resource.start = virt_to_phys(_text); | |
1da177e4 LT |
374 | code_resource.end = virt_to_phys(&data_start)-1; |
375 | ||
376 | /* We don't know which region the kernel will be in, so try | |
377 | * all of them. | |
378 | */ | |
379 | for (i = 0; i < sysram_resource_count; i++) { | |
380 | struct resource *res = &sysram_resources[i]; | |
381 | request_resource(res, &code_resource); | |
382 | request_resource(res, &data_resource); | |
383 | } | |
384 | request_resource(&sysram_resources[0], &pdcdata_resource); | |
c9c2877d HD |
385 | |
386 | /* Initialize Page Deallocation Table (PDT) and check for bad memory. */ | |
387 | pdc_pdt_init(); | |
1da177e4 LT |
388 | } |
389 | ||
161bd3bf HD |
390 | static int __init parisc_text_address(unsigned long vaddr) |
391 | { | |
392 | static unsigned long head_ptr __initdata; | |
393 | ||
394 | if (!head_ptr) | |
395 | head_ptr = PAGE_MASK & (unsigned long) | |
396 | dereference_function_descriptor(&parisc_kernel_start); | |
397 | ||
398 | return core_kernel_text(vaddr) || vaddr == head_ptr; | |
399 | } | |
400 | ||
d7dd2ff1 JB |
401 | static void __init map_pages(unsigned long start_vaddr, |
402 | unsigned long start_paddr, unsigned long size, | |
403 | pgprot_t pgprot, int force) | |
404 | { | |
405 | pgd_t *pg_dir; | |
406 | pmd_t *pmd; | |
407 | pte_t *pg_table; | |
408 | unsigned long end_paddr; | |
409 | unsigned long start_pmd; | |
410 | unsigned long start_pte; | |
411 | unsigned long tmp1; | |
412 | unsigned long tmp2; | |
413 | unsigned long address; | |
414 | unsigned long vaddr; | |
415 | unsigned long ro_start; | |
416 | unsigned long ro_end; | |
41b85a11 | 417 | unsigned long kernel_end; |
d7dd2ff1 JB |
418 | |
419 | ro_start = __pa((unsigned long)_text); | |
420 | ro_end = __pa((unsigned long)&data_start); | |
41b85a11 | 421 | kernel_end = __pa((unsigned long)&_end); |
d7dd2ff1 JB |
422 | |
423 | end_paddr = start_paddr + size; | |
424 | ||
425 | pg_dir = pgd_offset_k(start_vaddr); | |
426 | ||
427 | #if PTRS_PER_PMD == 1 | |
428 | start_pmd = 0; | |
429 | #else | |
430 | start_pmd = ((start_vaddr >> PMD_SHIFT) & (PTRS_PER_PMD - 1)); | |
431 | #endif | |
432 | start_pte = ((start_vaddr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)); | |
433 | ||
434 | address = start_paddr; | |
435 | vaddr = start_vaddr; | |
436 | while (address < end_paddr) { | |
437 | #if PTRS_PER_PMD == 1 | |
438 | pmd = (pmd_t *)__pa(pg_dir); | |
439 | #else | |
440 | pmd = (pmd_t *)pgd_address(*pg_dir); | |
441 | ||
442 | /* | |
443 | * pmd is physical at this point | |
444 | */ | |
445 | ||
446 | if (!pmd) { | |
4fe9e1d9 | 447 | pmd = (pmd_t *) get_memblock(PAGE_SIZE << PMD_ORDER); |
d7dd2ff1 JB |
448 | pmd = (pmd_t *) __pa(pmd); |
449 | } | |
450 | ||
451 | pgd_populate(NULL, pg_dir, __va(pmd)); | |
452 | #endif | |
453 | pg_dir++; | |
454 | ||
455 | /* now change pmd to kernel virtual addresses */ | |
456 | ||
457 | pmd = (pmd_t *)__va(pmd) + start_pmd; | |
458 | for (tmp1 = start_pmd; tmp1 < PTRS_PER_PMD; tmp1++, pmd++) { | |
459 | ||
460 | /* | |
461 | * pg_table is physical at this point | |
462 | */ | |
463 | ||
464 | pg_table = (pte_t *)pmd_address(*pmd); | |
465 | if (!pg_table) { | |
4fe9e1d9 | 466 | pg_table = (pte_t *) get_memblock(PAGE_SIZE); |
d7dd2ff1 JB |
467 | pg_table = (pte_t *) __pa(pg_table); |
468 | } | |
469 | ||
470 | pmd_populate_kernel(NULL, pmd, __va(pg_table)); | |
471 | ||
472 | /* now change pg_table to kernel virtual addresses */ | |
473 | ||
474 | pg_table = (pte_t *) __va(pg_table) + start_pte; | |
475 | for (tmp2 = start_pte; tmp2 < PTRS_PER_PTE; tmp2++, pg_table++) { | |
476 | pte_t pte; | |
477 | ||
d7dd2ff1 JB |
478 | if (force) |
479 | pte = __mk_pte(address, pgprot); | |
41b85a11 | 480 | else if (parisc_text_address(vaddr)) { |
d7dd2ff1 | 481 | pte = __mk_pte(address, PAGE_KERNEL_EXEC); |
41b85a11 HD |
482 | if (address >= ro_start && address < kernel_end) |
483 | pte = pte_mkhuge(pte); | |
484 | } | |
d7dd2ff1 JB |
485 | else |
486 | #if defined(CONFIG_PARISC_PAGE_SIZE_4KB) | |
41b85a11 HD |
487 | if (address >= ro_start && address < ro_end) { |
488 | pte = __mk_pte(address, PAGE_KERNEL_EXEC); | |
489 | pte = pte_mkhuge(pte); | |
490 | } else | |
d7dd2ff1 | 491 | #endif |
41b85a11 | 492 | { |
d7dd2ff1 | 493 | pte = __mk_pte(address, pgprot); |
41b85a11 HD |
494 | if (address >= ro_start && address < kernel_end) |
495 | pte = pte_mkhuge(pte); | |
496 | } | |
d7dd2ff1 | 497 | |
fd5cc4e4 HD |
498 | if (address >= end_paddr) |
499 | break; | |
d7dd2ff1 JB |
500 | |
501 | set_pte(pg_table, pte); | |
502 | ||
503 | address += PAGE_SIZE; | |
504 | vaddr += PAGE_SIZE; | |
505 | } | |
506 | start_pte = 0; | |
507 | ||
508 | if (address >= end_paddr) | |
509 | break; | |
510 | } | |
511 | start_pmd = 0; | |
512 | } | |
513 | } | |
514 | ||
1da177e4 LT |
515 | void free_initmem(void) |
516 | { | |
4fb11781 KM |
517 | unsigned long init_begin = (unsigned long)__init_begin; |
518 | unsigned long init_end = (unsigned long)__init_end; | |
1da177e4 | 519 | |
d7dd2ff1 JB |
520 | /* The init text pages are marked R-X. We have to |
521 | * flush the icache and mark them RW- | |
522 | * | |
523 | * This is tricky, because map_pages is in the init section. | |
524 | * Do a dummy remap of the data section first (the data | |
525 | * section is already PAGE_KERNEL) to pull in the TLB entries | |
526 | * for map_kernel */ | |
527 | map_pages(init_begin, __pa(init_begin), init_end - init_begin, | |
528 | PAGE_KERNEL_RWX, 1); | |
529 | /* now remap at PAGE_KERNEL since the TLB is pre-primed to execute | |
530 | * map_pages */ | |
531 | map_pages(init_begin, __pa(init_begin), init_end - init_begin, | |
532 | PAGE_KERNEL, 1); | |
533 | ||
534 | /* force the kernel to see the new TLB entries */ | |
535 | __flush_tlb_range(0, init_begin, init_end); | |
41b85a11 | 536 | |
d7dd2ff1 JB |
537 | /* finally dump all the instructions which were cached, since the |
538 | * pages are no-longer executable */ | |
4fb11781 | 539 | flush_icache_range(init_begin, init_end); |
1da177e4 | 540 | |
41b85a11 | 541 | free_initmem_default(POISON_FREE_INITMEM); |
1da177e4 LT |
542 | |
543 | /* set up a new led state on systems shipped LED State panel */ | |
544 | pdc_chassis_send_status(PDC_CHASSIS_DIRECT_BCOMPLETE); | |
1da177e4 LT |
545 | } |
546 | ||
1bcdd854 | 547 | |
0f5bf6d0 | 548 | #ifdef CONFIG_STRICT_KERNEL_RWX |
1bcdd854 HD |
549 | void mark_rodata_ro(void) |
550 | { | |
1bcdd854 HD |
551 | /* rodata memory was already mapped with KERNEL_RO access rights by |
552 | pagetable_init() and map_pages(). No need to do additional stuff here */ | |
553 | printk (KERN_INFO "Write protecting the kernel read-only data: %luk\n", | |
a581c2a4 | 554 | (unsigned long)(__end_rodata - __start_rodata) >> 10); |
1bcdd854 HD |
555 | } |
556 | #endif | |
557 | ||
558 | ||
1da177e4 LT |
559 | /* |
560 | * Just an arbitrary offset to serve as a "hole" between mapping areas | |
561 | * (between top of physical memory and a potential pcxl dma mapping | |
562 | * area, and below the vmalloc mapping area). | |
563 | * | |
564 | * The current 32K value just means that there will be a 32K "hole" | |
565 | * between mapping areas. That means that any out-of-bounds memory | |
566 | * accesses will hopefully be caught. The vmalloc() routines leaves | |
567 | * a hole of 4kB between each vmalloced area for the same reason. | |
568 | */ | |
569 | ||
570 | /* Leave room for gateway page expansion */ | |
571 | #if KERNEL_MAP_START < GATEWAY_PAGE_SIZE | |
572 | #error KERNEL_MAP_START is in gateway reserved region | |
573 | #endif | |
574 | #define MAP_START (KERNEL_MAP_START) | |
575 | ||
576 | #define VM_MAP_OFFSET (32*1024) | |
577 | #define SET_MAP_OFFSET(x) ((void *)(((unsigned long)(x) + VM_MAP_OFFSET) \ | |
578 | & ~(VM_MAP_OFFSET-1))) | |
579 | ||
4255f0d2 HD |
580 | void *parisc_vmalloc_start __read_mostly; |
581 | EXPORT_SYMBOL(parisc_vmalloc_start); | |
1da177e4 LT |
582 | |
583 | #ifdef CONFIG_PA11 | |
8039de10 | 584 | unsigned long pcxl_dma_start __read_mostly; |
1da177e4 LT |
585 | #endif |
586 | ||
587 | void __init mem_init(void) | |
588 | { | |
d0cf62fb HD |
589 | /* Do sanity checks on IPC (compat) structures */ |
590 | BUILD_BUG_ON(sizeof(struct ipc64_perm) != 48); | |
591 | #ifndef CONFIG_64BIT | |
592 | BUILD_BUG_ON(sizeof(struct semid64_ds) != 80); | |
593 | BUILD_BUG_ON(sizeof(struct msqid64_ds) != 104); | |
594 | BUILD_BUG_ON(sizeof(struct shmid64_ds) != 104); | |
595 | #endif | |
596 | #ifdef CONFIG_COMPAT | |
597 | BUILD_BUG_ON(sizeof(struct compat_ipc64_perm) != sizeof(struct ipc64_perm)); | |
598 | BUILD_BUG_ON(sizeof(struct compat_semid64_ds) != 80); | |
599 | BUILD_BUG_ON(sizeof(struct compat_msqid64_ds) != 104); | |
600 | BUILD_BUG_ON(sizeof(struct compat_shmid64_ds) != 104); | |
601 | #endif | |
602 | ||
48d27cb2 HD |
603 | /* Do sanity checks on page table constants */ |
604 | BUILD_BUG_ON(PTE_ENTRY_SIZE != sizeof(pte_t)); | |
605 | BUILD_BUG_ON(PMD_ENTRY_SIZE != sizeof(pmd_t)); | |
606 | BUILD_BUG_ON(PGD_ENTRY_SIZE != sizeof(pgd_t)); | |
607 | BUILD_BUG_ON(PAGE_SHIFT + BITS_PER_PTE + BITS_PER_PMD + BITS_PER_PGD | |
608 | > BITS_PER_LONG); | |
609 | ||
1da177e4 | 610 | high_memory = __va((max_pfn << PAGE_SHIFT)); |
d5c017dd | 611 | set_max_mapnr(page_to_pfn(virt_to_page(high_memory - 1)) + 1); |
0c988534 | 612 | free_all_bootmem(); |
1da177e4 | 613 | |
1da177e4 LT |
614 | #ifdef CONFIG_PA11 |
615 | if (hppa_dma_ops == &pcxl_dma_ops) { | |
616 | pcxl_dma_start = (unsigned long)SET_MAP_OFFSET(MAP_START); | |
4255f0d2 HD |
617 | parisc_vmalloc_start = SET_MAP_OFFSET(pcxl_dma_start |
618 | + PCXL_DMA_MAP_SIZE); | |
1da177e4 LT |
619 | } else { |
620 | pcxl_dma_start = 0; | |
4255f0d2 | 621 | parisc_vmalloc_start = SET_MAP_OFFSET(MAP_START); |
1da177e4 LT |
622 | } |
623 | #else | |
4255f0d2 | 624 | parisc_vmalloc_start = SET_MAP_OFFSET(MAP_START); |
1da177e4 LT |
625 | #endif |
626 | ||
7d2c7747 | 627 | mem_init_print_info(NULL); |
94899a74 HD |
628 | |
629 | #if 0 | |
630 | /* | |
631 | * Do not expose the virtual kernel memory layout to userspace. | |
632 | * But keep code for debugging purposes. | |
633 | */ | |
ce8420bb | 634 | printk("virtual kernel memory layout:\n" |
63b2c373 HD |
635 | " vmalloc : 0x%px - 0x%px (%4ld MB)\n" |
636 | " memory : 0x%px - 0x%px (%4ld MB)\n" | |
637 | " .init : 0x%px - 0x%px (%4ld kB)\n" | |
638 | " .data : 0x%px - 0x%px (%4ld kB)\n" | |
639 | " .text : 0x%px - 0x%px (%4ld kB)\n", | |
ce8420bb HD |
640 | |
641 | (void*)VMALLOC_START, (void*)VMALLOC_END, | |
642 | (VMALLOC_END - VMALLOC_START) >> 20, | |
643 | ||
644 | __va(0), high_memory, | |
645 | ((unsigned long)high_memory - (unsigned long)__va(0)) >> 20, | |
646 | ||
53faf291 KM |
647 | __init_begin, __init_end, |
648 | ((unsigned long)__init_end - (unsigned long)__init_begin) >> 10, | |
ce8420bb | 649 | |
53faf291 KM |
650 | _etext, _edata, |
651 | ((unsigned long)_edata - (unsigned long)_etext) >> 10, | |
ce8420bb | 652 | |
53faf291 KM |
653 | _text, _etext, |
654 | ((unsigned long)_etext - (unsigned long)_text) >> 10); | |
ce8420bb | 655 | #endif |
1da177e4 LT |
656 | } |
657 | ||
8039de10 | 658 | unsigned long *empty_zero_page __read_mostly; |
22febf1f | 659 | EXPORT_SYMBOL(empty_zero_page); |
1da177e4 | 660 | |
1da177e4 LT |
661 | /* |
662 | * pagetable_init() sets up the page tables | |
663 | * | |
664 | * Note that gateway_init() places the Linux gateway page at page 0. | |
665 | * Since gateway pages cannot be dereferenced this has the desirable | |
666 | * side effect of trapping those pesky NULL-reference errors in the | |
667 | * kernel. | |
668 | */ | |
669 | static void __init pagetable_init(void) | |
670 | { | |
671 | int range; | |
672 | ||
673 | /* Map each physical memory range to its kernel vaddr */ | |
674 | ||
675 | for (range = 0; range < npmem_ranges; range++) { | |
676 | unsigned long start_paddr; | |
677 | unsigned long end_paddr; | |
678 | unsigned long size; | |
679 | ||
680 | start_paddr = pmem_ranges[range].start_pfn << PAGE_SHIFT; | |
1da177e4 | 681 | size = pmem_ranges[range].pages << PAGE_SHIFT; |
41b85a11 | 682 | end_paddr = start_paddr + size; |
1da177e4 LT |
683 | |
684 | map_pages((unsigned long)__va(start_paddr), start_paddr, | |
d7dd2ff1 | 685 | size, PAGE_KERNEL, 0); |
1da177e4 LT |
686 | } |
687 | ||
688 | #ifdef CONFIG_BLK_DEV_INITRD | |
689 | if (initrd_end && initrd_end > mem_limit) { | |
1bcdd854 | 690 | printk(KERN_INFO "initrd: mapping %08lx-%08lx\n", initrd_start, initrd_end); |
1da177e4 | 691 | map_pages(initrd_start, __pa(initrd_start), |
d7dd2ff1 | 692 | initrd_end - initrd_start, PAGE_KERNEL, 0); |
1da177e4 LT |
693 | } |
694 | #endif | |
695 | ||
4fe9e1d9 | 696 | empty_zero_page = get_memblock(PAGE_SIZE); |
1da177e4 LT |
697 | } |
698 | ||
699 | static void __init gateway_init(void) | |
700 | { | |
701 | unsigned long linux_gateway_page_addr; | |
702 | /* FIXME: This is 'const' in order to trick the compiler | |
703 | into not treating it as DP-relative data. */ | |
704 | extern void * const linux_gateway_page; | |
705 | ||
706 | linux_gateway_page_addr = LINUX_GATEWAY_ADDR & PAGE_MASK; | |
707 | ||
708 | /* | |
709 | * Setup Linux Gateway page. | |
710 | * | |
711 | * The Linux gateway page will reside in kernel space (on virtual | |
712 | * page 0), so it doesn't need to be aliased into user space. | |
713 | */ | |
714 | ||
715 | map_pages(linux_gateway_page_addr, __pa(&linux_gateway_page), | |
d7dd2ff1 | 716 | PAGE_SIZE, PAGE_GATEWAY, 1); |
1da177e4 LT |
717 | } |
718 | ||
1da177e4 LT |
719 | void __init paging_init(void) |
720 | { | |
721 | int i; | |
722 | ||
723 | setup_bootmem(); | |
724 | pagetable_init(); | |
725 | gateway_init(); | |
726 | flush_cache_all_local(); /* start with known state */ | |
ce33941f | 727 | flush_tlb_all_local(NULL); |
1da177e4 LT |
728 | |
729 | for (i = 0; i < npmem_ranges; i++) { | |
f06a9684 | 730 | unsigned long zones_size[MAX_NR_ZONES] = { 0, }; |
1da177e4 | 731 | |
00592837 | 732 | zones_size[ZONE_NORMAL] = pmem_ranges[i].pages; |
1da177e4 LT |
733 | |
734 | #ifdef CONFIG_DISCONTIGMEM | |
735 | /* Need to initialize the pfnnid_map before we can initialize | |
736 | the zone */ | |
737 | { | |
738 | int j; | |
739 | for (j = (pmem_ranges[i].start_pfn >> PFNNID_SHIFT); | |
740 | j <= ((pmem_ranges[i].start_pfn + pmem_ranges[i].pages) >> PFNNID_SHIFT); | |
741 | j++) { | |
742 | pfnnid_map[j] = i; | |
743 | } | |
744 | } | |
745 | #endif | |
746 | ||
9109fb7b | 747 | free_area_init_node(i, zones_size, |
1da177e4 LT |
748 | pmem_ranges[i].start_pfn, NULL); |
749 | } | |
750 | } | |
751 | ||
752 | #ifdef CONFIG_PA20 | |
753 | ||
754 | /* | |
7022672e | 755 | * Currently, all PA20 chips have 18 bit protection IDs, which is the |
1da177e4 LT |
756 | * limiting factor (space ids are 32 bits). |
757 | */ | |
758 | ||
759 | #define NR_SPACE_IDS 262144 | |
760 | ||
761 | #else | |
762 | ||
763 | /* | |
7022672e SA |
764 | * Currently we have a one-to-one relationship between space IDs and |
765 | * protection IDs. Older parisc chips (PCXS, PCXT, PCXL, PCXL2) only | |
766 | * support 15 bit protection IDs, so that is the limiting factor. | |
767 | * PCXT' has 18 bit protection IDs, but only 16 bit spaceids, so it's | |
1da177e4 LT |
768 | * probably not worth the effort for a special case here. |
769 | */ | |
770 | ||
771 | #define NR_SPACE_IDS 32768 | |
772 | ||
773 | #endif /* !CONFIG_PA20 */ | |
774 | ||
775 | #define RECYCLE_THRESHOLD (NR_SPACE_IDS / 2) | |
776 | #define SID_ARRAY_SIZE (NR_SPACE_IDS / (8 * sizeof(long))) | |
777 | ||
778 | static unsigned long space_id[SID_ARRAY_SIZE] = { 1 }; /* disallow space 0 */ | |
779 | static unsigned long dirty_space_id[SID_ARRAY_SIZE]; | |
780 | static unsigned long space_id_index; | |
781 | static unsigned long free_space_ids = NR_SPACE_IDS - 1; | |
782 | static unsigned long dirty_space_ids = 0; | |
783 | ||
784 | static DEFINE_SPINLOCK(sid_lock); | |
785 | ||
786 | unsigned long alloc_sid(void) | |
787 | { | |
788 | unsigned long index; | |
789 | ||
790 | spin_lock(&sid_lock); | |
791 | ||
792 | if (free_space_ids == 0) { | |
793 | if (dirty_space_ids != 0) { | |
794 | spin_unlock(&sid_lock); | |
795 | flush_tlb_all(); /* flush_tlb_all() calls recycle_sids() */ | |
796 | spin_lock(&sid_lock); | |
797 | } | |
2fd83038 | 798 | BUG_ON(free_space_ids == 0); |
1da177e4 LT |
799 | } |
800 | ||
801 | free_space_ids--; | |
802 | ||
803 | index = find_next_zero_bit(space_id, NR_SPACE_IDS, space_id_index); | |
804 | space_id[index >> SHIFT_PER_LONG] |= (1L << (index & (BITS_PER_LONG - 1))); | |
805 | space_id_index = index; | |
806 | ||
807 | spin_unlock(&sid_lock); | |
808 | ||
809 | return index << SPACEID_SHIFT; | |
810 | } | |
811 | ||
812 | void free_sid(unsigned long spaceid) | |
813 | { | |
814 | unsigned long index = spaceid >> SPACEID_SHIFT; | |
815 | unsigned long *dirty_space_offset; | |
816 | ||
817 | dirty_space_offset = dirty_space_id + (index >> SHIFT_PER_LONG); | |
818 | index &= (BITS_PER_LONG - 1); | |
819 | ||
820 | spin_lock(&sid_lock); | |
821 | ||
2fd83038 | 822 | BUG_ON(*dirty_space_offset & (1L << index)); /* attempt to free space id twice */ |
1da177e4 LT |
823 | |
824 | *dirty_space_offset |= (1L << index); | |
825 | dirty_space_ids++; | |
826 | ||
827 | spin_unlock(&sid_lock); | |
828 | } | |
829 | ||
830 | ||
831 | #ifdef CONFIG_SMP | |
832 | static void get_dirty_sids(unsigned long *ndirtyptr,unsigned long *dirty_array) | |
833 | { | |
834 | int i; | |
835 | ||
836 | /* NOTE: sid_lock must be held upon entry */ | |
837 | ||
838 | *ndirtyptr = dirty_space_ids; | |
839 | if (dirty_space_ids != 0) { | |
840 | for (i = 0; i < SID_ARRAY_SIZE; i++) { | |
841 | dirty_array[i] = dirty_space_id[i]; | |
842 | dirty_space_id[i] = 0; | |
843 | } | |
844 | dirty_space_ids = 0; | |
845 | } | |
846 | ||
847 | return; | |
848 | } | |
849 | ||
850 | static void recycle_sids(unsigned long ndirty,unsigned long *dirty_array) | |
851 | { | |
852 | int i; | |
853 | ||
854 | /* NOTE: sid_lock must be held upon entry */ | |
855 | ||
856 | if (ndirty != 0) { | |
857 | for (i = 0; i < SID_ARRAY_SIZE; i++) { | |
858 | space_id[i] ^= dirty_array[i]; | |
859 | } | |
860 | ||
861 | free_space_ids += ndirty; | |
862 | space_id_index = 0; | |
863 | } | |
864 | } | |
865 | ||
866 | #else /* CONFIG_SMP */ | |
867 | ||
868 | static void recycle_sids(void) | |
869 | { | |
870 | int i; | |
871 | ||
872 | /* NOTE: sid_lock must be held upon entry */ | |
873 | ||
874 | if (dirty_space_ids != 0) { | |
875 | for (i = 0; i < SID_ARRAY_SIZE; i++) { | |
876 | space_id[i] ^= dirty_space_id[i]; | |
877 | dirty_space_id[i] = 0; | |
878 | } | |
879 | ||
880 | free_space_ids += dirty_space_ids; | |
881 | dirty_space_ids = 0; | |
882 | space_id_index = 0; | |
883 | } | |
884 | } | |
885 | #endif | |
886 | ||
887 | /* | |
888 | * flush_tlb_all() calls recycle_sids(), since whenever the entire tlb is | |
889 | * purged, we can safely reuse the space ids that were released but | |
890 | * not flushed from the tlb. | |
891 | */ | |
892 | ||
893 | #ifdef CONFIG_SMP | |
894 | ||
895 | static unsigned long recycle_ndirty; | |
896 | static unsigned long recycle_dirty_array[SID_ARRAY_SIZE]; | |
2fd83038 | 897 | static unsigned int recycle_inuse; |
1da177e4 LT |
898 | |
899 | void flush_tlb_all(void) | |
900 | { | |
901 | int do_recycle; | |
902 | ||
416821d3 | 903 | __inc_irq_stat(irq_tlb_count); |
1da177e4 LT |
904 | do_recycle = 0; |
905 | spin_lock(&sid_lock); | |
906 | if (dirty_space_ids > RECYCLE_THRESHOLD) { | |
2fd83038 | 907 | BUG_ON(recycle_inuse); /* FIXME: Use a semaphore/wait queue here */ |
1da177e4 LT |
908 | get_dirty_sids(&recycle_ndirty,recycle_dirty_array); |
909 | recycle_inuse++; | |
910 | do_recycle++; | |
911 | } | |
912 | spin_unlock(&sid_lock); | |
15c8b6c1 | 913 | on_each_cpu(flush_tlb_all_local, NULL, 1); |
1da177e4 LT |
914 | if (do_recycle) { |
915 | spin_lock(&sid_lock); | |
916 | recycle_sids(recycle_ndirty,recycle_dirty_array); | |
917 | recycle_inuse = 0; | |
918 | spin_unlock(&sid_lock); | |
919 | } | |
920 | } | |
921 | #else | |
922 | void flush_tlb_all(void) | |
923 | { | |
416821d3 | 924 | __inc_irq_stat(irq_tlb_count); |
1da177e4 | 925 | spin_lock(&sid_lock); |
1b2425e3 | 926 | flush_tlb_all_local(NULL); |
1da177e4 LT |
927 | recycle_sids(); |
928 | spin_unlock(&sid_lock); | |
929 | } | |
930 | #endif | |
931 | ||
932 | #ifdef CONFIG_BLK_DEV_INITRD | |
933 | void free_initrd_mem(unsigned long start, unsigned long end) | |
934 | { | |
7d2c7747 | 935 | free_reserved_area((void *)start, (void *)end, -1, "initrd"); |
1da177e4 LT |
936 | } |
937 | #endif |