[mirror_ubuntu-eoan-kernel.git] / arch / powerpc / boot / dts / fsl / mpc8560ads.dts

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * MPC8560 ADS Device Tree Source
 *
 * Copyright 2006, 2008 Freescale Semiconductor Inc.
 */

/dts-v1/;

/include/ "e500v2_power_isa.dtsi"

/ {
	model = "MPC8560ADS";
	compatible = "MPC8560ADS", "MPC85xxADS";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		ethernet2 = &enet2;
		ethernet3 = &enet3;
		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8560@0 {
			device_type = "cpu";
			reg = <0x0>;
			d-cache-line-size = <32>;	// 32 bytes
			i-cache-line-size = <32>;	// 32 bytes
			d-cache-size = <0x8000>;		// L1, 32K
			i-cache-size = <0x8000>;		// L1, 32K
			timebase-frequency = <82500000>;
			bus-frequency = <330000000>;
			clock-frequency = <825000000>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x10000000>;
	};

	soc8560@e0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "simple-bus";
		ranges = <0x0 0xe0000000 0x100000>;
		bus-frequency = <330000000>;

		ecm-law@0 {
			compatible = "fsl,ecm-law";
			reg = <0x0 0x1000>;
			fsl,num-laws = <8>;
		};

		ecm@1000 {
			compatible = "fsl,mpc8560-ecm", "fsl,ecm";
			reg = <0x1000 0x1000>;
			interrupts = <17 2>;
			interrupt-parent = <&mpic>;
		};

		memory-controller@2000 {
			compatible = "fsl,mpc8540-memory-controller";
			reg = <0x2000 0x1000>;
			interrupt-parent = <&mpic>;
			interrupts = <18 2>;
		};

		L2: l2-cache-controller@20000 {
			compatible = "fsl,mpc8540-l2-cache-controller";
			reg = <0x20000 0x1000>;
			cache-line-size = <32>;	// 32 bytes
			cache-size = <0x40000>;	// L2, 256K
			interrupt-parent = <&mpic>;
			interrupts = <16 2>;
		};

		dma@21300 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
			reg = <0x21300 0x4>;
			ranges = <0x0 0x21100 0x200>;
			cell-index = <0>;
			dma-channel@0 {
				compatible = "fsl,mpc8560-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x0 0x80>;
				cell-index = <0>;
				interrupt-parent = <&mpic>;
				interrupts = <20 2>;
			};
			dma-channel@80 {
				compatible = "fsl,mpc8560-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x80 0x80>;
				cell-index = <1>;
				interrupt-parent = <&mpic>;
				interrupts = <21 2>;
			};
			dma-channel@100 {
				compatible = "fsl,mpc8560-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x100 0x80>;
				cell-index = <2>;
				interrupt-parent = <&mpic>;
				interrupts = <22 2>;
			};
			dma-channel@180 {
				compatible = "fsl,mpc8560-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x180 0x80>;
				cell-index = <3>;
				interrupt-parent = <&mpic>;
				interrupts = <23 2>;
			};
		};

		enet0: ethernet@24000 {
			#address-cells = <1>;
			#size-cells = <1>;
			cell-index = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x24000 0x1000>;
			ranges = <0x0 0x24000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <29 2 30 2 34 2>;
			interrupt-parent = <&mpic>;
			tbi-handle = <&tbi0>;
			phy-handle = <&phy0>;

			mdio@520 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,gianfar-mdio";
				reg = <0x520 0x20>;

				phy0: ethernet-phy@0 {
					interrupt-parent = <&mpic>;
					interrupts = <5 1>;
					reg = <0x0>;
				};
				phy1: ethernet-phy@1 {
					interrupt-parent = <&mpic>;
					interrupts = <5 1>;
					reg = <0x1>;
				};
				phy2: ethernet-phy@2 {
					interrupt-parent = <&mpic>;
					interrupts = <7 1>;
					reg = <0x2>;
				};
				phy3: ethernet-phy@3 {
					interrupt-parent = <&mpic>;
					interrupts = <7 1>;
					reg = <0x3>;
				};
				tbi0: tbi-phy@11 {
					reg = <0x11>;
					device_type = "tbi-phy";
				};
			};
		};

		enet1: ethernet@25000 {
			#address-cells = <1>;
			#size-cells = <1>;
			cell-index = <1>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x25000 0x1000>;
			ranges = <0x0 0x25000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <35 2 36 2 40 2>;
			interrupt-parent = <&mpic>;
			tbi-handle = <&tbi1>;
			phy-handle = <&phy1>;

			mdio@520 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,gianfar-tbi";
				reg = <0x520 0x20>;

				tbi1: tbi-phy@11 {
					reg = <0x11>;
					device_type = "tbi-phy";
				};
			};
		};

		mpic: pic@40000 {
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <0x40000 0x40000>;
			compatible = "chrp,open-pic";
			device_type = "open-pic";
		};

		cpm@919c0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
			reg = <0x919c0 0x30>;
			ranges;

			muram@80000 {
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0x0 0x80000 0x10000>;

				data@0 {
					compatible = "fsl,cpm-muram-data";
					reg = <0x0 0x4000 0x9000 0x2000>;
				};
			};

			brg@919f0 {
				compatible = "fsl,mpc8560-brg",
				             "fsl,cpm2-brg",
				             "fsl,cpm-brg";
				reg = <0x919f0 0x10 0x915f0 0x10>;
				clock-frequency = <165000000>;
			};

			cpmpic: pic@90c00 {
				interrupt-controller;
				#address-cells = <0>;
				#interrupt-cells = <2>;
				interrupts = <46 2>;
				interrupt-parent = <&mpic>;
				reg = <0x90c00 0x80>;
				compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
			};

			serial0: serial@91a00 {
				device_type = "serial";
				compatible = "fsl,mpc8560-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <0x91a00 0x20 0x88000 0x100>;
				fsl,cpm-brg = <1>;
				fsl,cpm-command = <0x800000>;
				current-speed = <115200>;
				interrupts = <40 8>;
				interrupt-parent = <&cpmpic>;
			};

			serial1: serial@91a20 {
				device_type = "serial";
				compatible = "fsl,mpc8560-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <0x91a20 0x20 0x88100 0x100>;
				fsl,cpm-brg = <2>;
				fsl,cpm-command = <0x4a00000>;
				current-speed = <115200>;
				interrupts = <41 8>;
				interrupt-parent = <&cpmpic>;
			};

			enet2: ethernet@91320 {
				device_type = "network";
				compatible = "fsl,mpc8560-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
				local-mac-address = [ 00 00 00 00 00 00 ];
				fsl,cpm-command = <0x16200300>;
				interrupts = <33 8>;
				interrupt-parent = <&cpmpic>;
				phy-handle = <&phy2>;
			};

			enet3: ethernet@91340 {
				device_type = "network";
				compatible = "fsl,mpc8560-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
				local-mac-address = [ 00 00 00 00 00 00 ];
				fsl,cpm-command = <0x1a400300>;
				interrupts = <34 8>;
				interrupt-parent = <&cpmpic>;
				phy-handle = <&phy3>;
			};
		};
	};

	pci0: pci@e0008000 {
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
		device_type = "pci";
		reg = <0xe0008000 0x1000>;
		clock-frequency = <66666666>;
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <

				/* IDSEL 0x2 */
				 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
				 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
				 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
				 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1

				/* IDSEL 0x3 */
				 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
				 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
				 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
				 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1

				/* IDSEL 0x4 */
				 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
				 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
				 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
				 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1

				/* IDSEL 0x5  */
				 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
				 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
				 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
				 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1

				/* IDSEL 12 */
				 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
				 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
				 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
				 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1

				/* IDSEL 13 */
				 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
				 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
				 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
				 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1

				/* IDSEL 14*/
				 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
				 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
				 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
				 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1

				/* IDSEL 15 */
				 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
				 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
				 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
				 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1

				/* IDSEL 18 */
				 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
				 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
				 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
				 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1

				/* IDSEL 19 */
				 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
				 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
				 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
				 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1

				/* IDSEL 20 */
				 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
				 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
				 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
				 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1

				/* IDSEL 21 */
				 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
				 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
				 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
				 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;

		interrupt-parent = <&mpic>;
		interrupts = <24 2>;
		bus-range = <0 0>;
		ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
			  0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
	};
};
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
902f392d VB	2	/*
	3	* MPC8560 ADS Device Tree Source
	4	*
32f960e9	5	* Copyright 2006, 2008 Freescale Semiconductor Inc.
902f392d VB	6	*/
902f392d VB	7
32f960e9	8	/dts-v1/;
902f392d	9
dc37374b	10	/include/ "e500v2_power_isa.dtsi"
2eb28006	11
902f392d VB	12	/ {
902f392d VB	13	model = "MPC8560ADS";
52094879	14	compatible = "MPC8560ADS", "MPC85xxADS";
902f392d VB	15	#address-cells = <1>;
902f392d VB	16	#size-cells = <1>;
902f392d	17
ea082fa9 KG	18	aliases {
	19	ethernet0 = &enet0;
	20	ethernet1 = &enet1;
	21	ethernet2 = &enet2;
	22	ethernet3 = &enet3;
	23	serial0 = &serial0;
	24	serial1 = &serial1;
	25	pci0 = &pci0;
	26	};
	27
902f392d	28	cpus {
902f392d VB	29	#address-cells = <1>;
902f392d VB	30	#size-cells = <0>;
902f392d VB	31
	32	PowerPC,8560@0 {
	33	device_type = "cpu";
32f960e9 KG	34	reg = <0x0>;
	35	d-cache-line-size = <32>; // 32 bytes
	36	i-cache-line-size = <32>; // 32 bytes
	37	d-cache-size = <0x8000>; // L1, 32K
	38	i-cache-size = <0x8000>; // L1, 32K
	39	timebase-frequency = <82500000>;
	40	bus-frequency = <330000000>;
	41	clock-frequency = <825000000>;
902f392d VB	42	};
	43	};
	44
	45	memory {
	46	device_type = "memory";
32f960e9	47	reg = <0x0 0x10000000>;
902f392d VB	48	};
	49
	50	soc8560@e0000000 {
	51	#address-cells = <1>;
	52	#size-cells = <1>;
902f392d	53	device_type = "soc";
cf0d19fb	54	compatible = "simple-bus";
32f960e9	55	ranges = <0x0 0xe0000000 0x100000>;
32f960e9	56	bus-frequency = <330000000>;
902f392d	57
e1a22897 KG	58	ecm-law@0 {
	59	compatible = "fsl,ecm-law";
	60	reg = <0x0 0x1000>;
	61	fsl,num-laws = <8>;
	62	};
	63
	64	ecm@1000 {
	65	compatible = "fsl,mpc8560-ecm", "fsl,ecm";
	66	reg = <0x1000 0x1000>;
	67	interrupts = <17 2>;
	68	interrupt-parent = <&mpic>;
	69	};
	70
50cf6707	71	memory-controller@2000 {
8a4ab218	72	compatible = "fsl,mpc8540-memory-controller";
32f960e9	73	reg = <0x2000 0x1000>;
50cf6707	74	interrupt-parent = <&mpic>;
32f960e9	75	interrupts = <18 2>;
50cf6707 DJ	76	};
50cf6707 DJ	77
c054065b	78	L2: l2-cache-controller@20000 {
8a4ab218	79	compatible = "fsl,mpc8540-l2-cache-controller";
32f960e9 KG	80	reg = <0x20000 0x1000>;
	81	cache-line-size = <32>; // 32 bytes
	82	cache-size = <0x40000>; // L2, 256K
50cf6707	83	interrupt-parent = <&mpic>;
32f960e9	84	interrupts = <16 2>;
50cf6707 DJ	85	};
50cf6707 DJ	86
dee80553 KG	87	dma@21300 {
	88	#address-cells = <1>;
	89	#size-cells = <1>;
	90	compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
	91	reg = <0x21300 0x4>;
	92	ranges = <0x0 0x21100 0x200>;
	93	cell-index = <0>;
	94	dma-channel@0 {
	95	compatible = "fsl,mpc8560-dma-channel",
	96	"fsl,eloplus-dma-channel";
	97	reg = <0x0 0x80>;
	98	cell-index = <0>;
	99	interrupt-parent = <&mpic>;
	100	interrupts = <20 2>;
	101	};
	102	dma-channel@80 {
	103	compatible = "fsl,mpc8560-dma-channel",
	104	"fsl,eloplus-dma-channel";
	105	reg = <0x80 0x80>;
	106	cell-index = <1>;
	107	interrupt-parent = <&mpic>;
	108	interrupts = <21 2>;
	109	};
	110	dma-channel@100 {
	111	compatible = "fsl,mpc8560-dma-channel",
	112	"fsl,eloplus-dma-channel";
	113	reg = <0x100 0x80>;
	114	cell-index = <2>;
	115	interrupt-parent = <&mpic>;
	116	interrupts = <22 2>;
	117	};
	118	dma-channel@180 {
	119	compatible = "fsl,mpc8560-dma-channel",
	120	"fsl,eloplus-dma-channel";
	121	reg = <0x180 0x80>;
	122	cell-index = <3>;
	123	interrupt-parent = <&mpic>;
	124	interrupts = <23 2>;
	125	};
	126	};
	127
e77b28eb	128	enet0: ethernet@24000 {
84ba4a58 AV	129	#address-cells = <1>;
84ba4a58 AV	130	#size-cells = <1>;
e77b28eb	131	cell-index = <0>;
902f392d VB	132	device_type = "network";
	133	model = "TSEC";
	134	compatible = "gianfar";
32f960e9	135	reg = <0x24000 0x1000>;
84ba4a58	136	ranges = <0x0 0x24000 0x1000>;
eae98266	137	local-mac-address = [ 00 00 00 00 00 00 ];
32f960e9	138	interrupts = <29 2 30 2 34 2>;
52094879	139	interrupt-parent = <&mpic>;
b31a1d8b	140	tbi-handle = <&tbi0>;
52094879	141	phy-handle = <&phy0>;
84ba4a58 AV	142
	143	mdio@520 {
	144	#address-cells = <1>;
	145	#size-cells = <0>;
	146	compatible = "fsl,gianfar-mdio";
	147	reg = <0x520 0x20>;
	148
	149	phy0: ethernet-phy@0 {
	150	interrupt-parent = <&mpic>;
	151	interrupts = <5 1>;
	152	reg = <0x0>;
84ba4a58 AV	153	};
	154	phy1: ethernet-phy@1 {
	155	interrupt-parent = <&mpic>;
	156	interrupts = <5 1>;
	157	reg = <0x1>;
84ba4a58 AV	158	};
	159	phy2: ethernet-phy@2 {
	160	interrupt-parent = <&mpic>;
	161	interrupts = <7 1>;
	162	reg = <0x2>;
84ba4a58 AV	163	};
	164	phy3: ethernet-phy@3 {
	165	interrupt-parent = <&mpic>;
	166	interrupts = <7 1>;
	167	reg = <0x3>;
84ba4a58 AV	168	};
	169	tbi0: tbi-phy@11 {
	170	reg = <0x11>;
	171	device_type = "tbi-phy";
	172	};
	173	};
902f392d VB	174	};
902f392d VB	175
e77b28eb	176	enet1: ethernet@25000 {
84ba4a58 AV	177	#address-cells = <1>;
84ba4a58 AV	178	#size-cells = <1>;
e77b28eb	179	cell-index = <1>;
902f392d VB	180	device_type = "network";
	181	model = "TSEC";
	182	compatible = "gianfar";
32f960e9	183	reg = <0x25000 0x1000>;
84ba4a58	184	ranges = <0x0 0x25000 0x1000>;
eae98266	185	local-mac-address = [ 00 00 00 00 00 00 ];
32f960e9	186	interrupts = <35 2 36 2 40 2>;
52094879	187	interrupt-parent = <&mpic>;
b31a1d8b	188	tbi-handle = <&tbi1>;
52094879	189	phy-handle = <&phy1>;
84ba4a58 AV	190
	191	mdio@520 {
	192	#address-cells = <1>;
	193	#size-cells = <0>;
	194	compatible = "fsl,gianfar-tbi";
	195	reg = <0x520 0x20>;
	196
	197	tbi1: tbi-phy@11 {
	198	reg = <0x11>;
	199	device_type = "tbi-phy";
	200	};
	201	};
902f392d VB	202	};
902f392d VB	203
52094879	204	mpic: pic@40000 {
902f392d VB	205	interrupt-controller;
	206	#address-cells = <0>;
	207	#interrupt-cells = <2>;
32f960e9	208	reg = <0x40000 0x40000>;
acd4b715	209	compatible = "chrp,open-pic";
902f392d VB	210	device_type = "open-pic";
	211	};
	212
8abc8f5f	213	cpm@919c0 {
902f392d VB	214	#address-cells = <1>;
902f392d VB	215	#size-cells = <1>;
8abc8f5f	216	compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
32f960e9	217	reg = <0x919c0 0x30>;
8abc8f5f SW	218	ranges;
	219
	220	muram@80000 {
	221	#address-cells = <1>;
	222	#size-cells = <1>;
32f960e9	223	ranges = <0x0 0x80000 0x10000>;
8abc8f5f SW	224
	225	data@0 {
	226	compatible = "fsl,cpm-muram-data";
32f960e9	227	reg = <0x0 0x4000 0x9000 0x2000>;
8abc8f5f SW	228	};
	229	};
	230
	231	brg@919f0 {
	232	compatible = "fsl,mpc8560-brg",
	233	"fsl,cpm2-brg",
	234	"fsl,cpm-brg";
32f960e9 KG	235	reg = <0x919f0 0x10 0x915f0 0x10>;
32f960e9 KG	236	clock-frequency = <165000000>;
8abc8f5f	237	};
902f392d	238
52094879	239	cpmpic: pic@90c00 {
902f392d VB	240	interrupt-controller;
	241	#address-cells = <0>;
	242	#interrupt-cells = <2>;
32f960e9	243	interrupts = <46 2>;
52094879	244	interrupt-parent = <&mpic>;
32f960e9	245	reg = <0x90c00 0x80>;
8abc8f5f	246	compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
902f392d VB	247	};
902f392d VB	248
ea082fa9	249	serial0: serial@91a00 {
902f392d	250	device_type = "serial";
8abc8f5f SW	251	compatible = "fsl,mpc8560-scc-uart",
8abc8f5f SW	252	"fsl,cpm2-scc-uart";
32f960e9	253	reg = <0x91a00 0x20 0x88000 0x100>;
8abc8f5f	254	fsl,cpm-brg = <1>;
32f960e9 KG	255	fsl,cpm-command = <0x800000>;
	256	current-speed = <115200>;
	257	interrupts = <40 8>;
52094879	258	interrupt-parent = <&cpmpic>;
902f392d VB	259	};
902f392d VB	260
ea082fa9	261	serial1: serial@91a20 {
902f392d	262	device_type = "serial";
8abc8f5f SW	263	compatible = "fsl,mpc8560-scc-uart",
8abc8f5f SW	264	"fsl,cpm2-scc-uart";
32f960e9	265	reg = <0x91a20 0x20 0x88100 0x100>;
8abc8f5f	266	fsl,cpm-brg = <2>;
32f960e9 KG	267	fsl,cpm-command = <0x4a00000>;
	268	current-speed = <115200>;
	269	interrupts = <41 8>;
52094879	270	interrupt-parent = <&cpmpic>;
902f392d VB	271	};
902f392d VB	272
e77b28eb	273	enet2: ethernet@91320 {
902f392d	274	device_type = "network";
8abc8f5f SW	275	compatible = "fsl,mpc8560-fcc-enet",
8abc8f5f SW	276	"fsl,cpm2-fcc-enet";
32f960e9	277	reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
eae98266	278	local-mac-address = [ 00 00 00 00 00 00 ];
32f960e9 KG	279	fsl,cpm-command = <0x16200300>;
32f960e9 KG	280	interrupts = <33 8>;
52094879 KG	281	interrupt-parent = <&cpmpic>;
52094879 KG	282	phy-handle = <&phy2>;
902f392d VB	283	};
902f392d VB	284
e77b28eb	285	enet3: ethernet@91340 {
902f392d	286	device_type = "network";
8abc8f5f SW	287	compatible = "fsl,mpc8560-fcc-enet",
8abc8f5f SW	288	"fsl,cpm2-fcc-enet";
32f960e9	289	reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
eae98266	290	local-mac-address = [ 00 00 00 00 00 00 ];
32f960e9 KG	291	fsl,cpm-command = <0x1a400300>;
32f960e9 KG	292	interrupts = <34 8>;
52094879 KG	293	interrupt-parent = <&cpmpic>;
52094879 KG	294	phy-handle = <&phy3>;
902f392d VB	295	};
	296	};
	297	};
1b3c5cda	298
ea082fa9	299	pci0: pci@e0008000 {
1b3c5cda KG	300	#interrupt-cells = <1>;
	301	#size-cells = <2>;
	302	#address-cells = <3>;
	303	compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
	304	device_type = "pci";
32f960e9 KG	305	reg = <0xe0008000 0x1000>;
	306	clock-frequency = <66666666>;
	307	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
1b3c5cda KG	308	interrupt-map = <
	309
	310	/* IDSEL 0x2 */
32f960e9 KG	311	0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
	312	0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
	313	0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
	314	0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
1b3c5cda KG	315
1b3c5cda KG	316	/* IDSEL 0x3 */
32f960e9 KG	317	0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
	318	0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
	319	0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
	320	0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
1b3c5cda KG	321
1b3c5cda KG	322	/* IDSEL 0x4 */
32f960e9 KG	323	0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
	324	0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
	325	0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
	326	0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
1b3c5cda KG	327
1b3c5cda KG	328	/* IDSEL 0x5 */
32f960e9 KG	329	0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
	330	0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
	331	0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
	332	0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
1b3c5cda KG	333
1b3c5cda KG	334	/* IDSEL 12 */
32f960e9 KG	335	0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
	336	0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
	337	0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
	338	0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
1b3c5cda KG	339
1b3c5cda KG	340	/* IDSEL 13 */
32f960e9 KG	341	0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
	342	0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
	343	0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
	344	0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
1b3c5cda KG	345
1b3c5cda KG	346	/* IDSEL 14*/
32f960e9 KG	347	0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
	348	0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
	349	0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
	350	0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
1b3c5cda KG	351
1b3c5cda KG	352	/* IDSEL 15 */
32f960e9 KG	353	0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
	354	0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
	355	0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
	356	0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
1b3c5cda KG	357
1b3c5cda KG	358	/* IDSEL 18 */
32f960e9 KG	359	0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
	360	0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
	361	0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
	362	0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
1b3c5cda KG	363
1b3c5cda KG	364	/* IDSEL 19 */
32f960e9 KG	365	0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
	366	0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
	367	0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
	368	0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
1b3c5cda KG	369
1b3c5cda KG	370	/* IDSEL 20 */
32f960e9 KG	371	0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
	372	0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
	373	0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
	374	0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
1b3c5cda KG	375
1b3c5cda KG	376	/* IDSEL 21 */
32f960e9 KG	377	0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
	378	0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
	379	0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
	380	0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
1b3c5cda KG	381
1b3c5cda KG	382	interrupt-parent = <&mpic>;
32f960e9	383	interrupts = <24 2>;
1b3c5cda	384	bus-range = <0 0>;
32f960e9 KG	385	ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
32f960e9 KG	386	0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
1b3c5cda	387	};
902f392d	388	};