[mirror_ubuntu-jammy-kernel.git] / arch / powerpc / boot / dts / fsl / mpc8641_hpcn_36b.dts

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * MPC8641 HPCN Device Tree Source
 *
 * Copyright 2008-2009 Freescale Semiconductor Inc.
 */

/include/ "mpc8641si-pre.dtsi"

/ {
	model = "MPC8641HPCN";
	compatible = "fsl,mpc8641hpcn";
	#address-cells = <2>;
	#size-cells = <2>;

	memory {
		device_type = "memory";
		reg = <0x0 0x00000000 0x0 0x40000000>;	// 1G at 0x0
	};

	lbc: localbus@fffe05000 {
		reg = <0x0f 0xffe05000 0x0 0x1000>;

		ranges = <0 0 0xf 0xef800000 0x00800000
			  2 0 0xf 0xffdf8000 0x00008000
			  3 0 0xf 0xffdf0000 0x00008000>;

		flash@0,0 {
			compatible = "cfi-flash";
			reg = <0 0 0x00800000>;
			bank-width = <2>;
			device-width = <2>;
			#address-cells = <1>;
			#size-cells = <1>;
			partition@0 {
				label = "kernel";
				reg = <0x00000000 0x00300000>;
			};
			partition@300000 {
				label = "firmware b";
				reg = <0x00300000 0x00100000>;
				read-only;
			};
			partition@400000 {
				label = "fs";
				reg = <0x00400000 0x00300000>;
			};
			partition@700000 {
				label = "firmware a";
				reg = <0x00700000 0x00100000>;
				read-only;
			};
		};
	};

	soc: soc8641@fffe00000 {
		ranges = <0x00000000 0x0f 0xffe00000 0x00100000>;

		enet0: ethernet@24000 {
			tbi-handle = <&tbi0>;
			phy-handle = <&phy0>;
			phy-connection-type = "rgmii-id";
		};

		mdio@24520 {
			phy0: ethernet-phy@0 {
				interrupts = <10 1 0 0>;
				reg = <0>;
			};
			phy1: ethernet-phy@1 {
				interrupts = <10 1 0 0>;
				reg = <1>;
			};
			phy2: ethernet-phy@2 {
				interrupts = <10 1 0 0>;
				reg = <2>;
			};
			phy3: ethernet-phy@3 {
				interrupts = <10 1 0 0>;
				reg = <3>;
			};
			tbi0: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};

		enet1: ethernet@25000 {
			tbi-handle = <&tbi1>;
			phy-handle = <&phy1>;
			phy-connection-type = "rgmii-id";
		};

		mdio@25520 {
			tbi1: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};

		enet2: ethernet@26000 {
			tbi-handle = <&tbi2>;
			phy-handle = <&phy2>;
			phy-connection-type = "rgmii-id";
		};

		mdio@26520 {
			tbi2: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};

		enet3: ethernet@27000 {
			tbi-handle = <&tbi3>;
			phy-handle = <&phy3>;
			phy-connection-type = "rgmii-id";
		};

		mdio@27520 {
			tbi3: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};
	};

	pci0: pcie@fffe08000 {
		reg = <0x0f 0xffe08000 0x0 0x1000>;
		ranges = <0x02000000 0x0 0xe0000000 0x0c 0x00000000 0x0 0x20000000
			  0x01000000 0x0 0x00000000 0x0f 0xffc00000 0x0 0x00010000>;
		interrupt-map-mask = <0xff00 0 0 7>;
		interrupt-map = <
			/* IDSEL 0x11 func 0 - PCI slot 1 */
			0x8800 0 0 1 &mpic 2 1 0 0
			0x8800 0 0 2 &mpic 3 1 0 0
			0x8800 0 0 3 &mpic 4 1 0 0
			0x8800 0 0 4 &mpic 1 1 0 0

			/* IDSEL 0x11 func 1 - PCI slot 1 */
			0x8900 0 0 1 &mpic 2 1 0 0
			0x8900 0 0 2 &mpic 3 1 0 0
			0x8900 0 0 3 &mpic 4 1 0 0
			0x8900 0 0 4 &mpic 1 1 0 0

			/* IDSEL 0x11 func 2 - PCI slot 1 */
			0x8a00 0 0 1 &mpic 2 1 0 0
			0x8a00 0 0 2 &mpic 3 1 0 0
			0x8a00 0 0 3 &mpic 4 1 0 0
			0x8a00 0 0 4 &mpic 1 1 0 0

			/* IDSEL 0x11 func 3 - PCI slot 1 */
			0x8b00 0 0 1 &mpic 2 1 0 0
			0x8b00 0 0 2 &mpic 3 1 0 0
			0x8b00 0 0 3 &mpic 4 1 0 0
			0x8b00 0 0 4 &mpic 1 1 0 0

			/* IDSEL 0x11 func 4 - PCI slot 1 */
			0x8c00 0 0 1 &mpic 2 1 0 0
			0x8c00 0 0 2 &mpic 3 1 0 0
			0x8c00 0 0 3 &mpic 4 1 0 0
			0x8c00 0 0 4 &mpic 1 1 0 0

			/* IDSEL 0x11 func 5 - PCI slot 1 */
			0x8d00 0 0 1 &mpic 2 1 0 0
			0x8d00 0 0 2 &mpic 3 1 0 0
			0x8d00 0 0 3 &mpic 4 1 0 0
			0x8d00 0 0 4 &mpic 1 1 0 0

			/* IDSEL 0x11 func 6 - PCI slot 1 */
			0x8e00 0 0 1 &mpic 2 1 0 0
			0x8e00 0 0 2 &mpic 3 1 0 0
			0x8e00 0 0 3 &mpic 4 1 0 0
			0x8e00 0 0 4 &mpic 1 1 0 0

			/* IDSEL 0x11 func 7 - PCI slot 1 */
			0x8f00 0 0 1 &mpic 2 1 0 0
			0x8f00 0 0 2 &mpic 3 1 0 0
			0x8f00 0 0 3 &mpic 4 1 0 0
			0x8f00 0 0 4 &mpic 1 1 0 0

			/* IDSEL 0x12 func 0 - PCI slot 2 */
			0x9000 0 0 1 &mpic 3 1 0 0
			0x9000 0 0 2 &mpic 4 1 0 0
			0x9000 0 0 3 &mpic 1 1 0 0
			0x9000 0 0 4 &mpic 2 1 0 0

			/* IDSEL 0x12 func 1 - PCI slot 2 */
			0x9100 0 0 1 &mpic 3 1 0 0
			0x9100 0 0 2 &mpic 4 1 0 0
			0x9100 0 0 3 &mpic 1 1 0 0
			0x9100 0 0 4 &mpic 2 1 0 0

			/* IDSEL 0x12 func 2 - PCI slot 2 */
			0x9200 0 0 1 &mpic 3 1 0 0
			0x9200 0 0 2 &mpic 4 1 0 0
			0x9200 0 0 3 &mpic 1 1 0 0
			0x9200 0 0 4 &mpic 2 1 0 0

			/* IDSEL 0x12 func 3 - PCI slot 2 */
			0x9300 0 0 1 &mpic 3 1 0 0
			0x9300 0 0 2 &mpic 4 1 0 0
			0x9300 0 0 3 &mpic 1 1 0 0
			0x9300 0 0 4 &mpic 2 1 0 0

			/* IDSEL 0x12 func 4 - PCI slot 2 */
			0x9400 0 0 1 &mpic 3 1 0 0
			0x9400 0 0 2 &mpic 4 1 0 0
			0x9400 0 0 3 &mpic 1 1 0 0
			0x9400 0 0 4 &mpic 2 1 0 0

			/* IDSEL 0x12 func 5 - PCI slot 2 */
			0x9500 0 0 1 &mpic 3 1 0 0
			0x9500 0 0 2 &mpic 4 1 0 0
			0x9500 0 0 3 &mpic 1 1 0 0
			0x9500 0 0 4 &mpic 2 1 0 0

			/* IDSEL 0x12 func 6 - PCI slot 2 */
			0x9600 0 0 1 &mpic 3 1 0 0
			0x9600 0 0 2 &mpic 4 1 0 0
			0x9600 0 0 3 &mpic 1 1 0 0
			0x9600 0 0 4 &mpic 2 1 0 0

			/* IDSEL 0x12 func 7 - PCI slot 2 */
			0x9700 0 0 1 &mpic 3 1 0 0
			0x9700 0 0 2 &mpic 4 1 0 0
			0x9700 0 0 3 &mpic 1 1 0 0
			0x9700 0 0 4 &mpic 2 1 0 0

			// IDSEL 0x1c  USB
			0xe000 0 0 1 &i8259 12 2
			0xe100 0 0 2 &i8259 9 2
			0xe200 0 0 3 &i8259 10 2
			0xe300 0 0 4 &i8259 11 2

			// IDSEL 0x1d  Audio
			0xe800 0 0 1 &i8259 6 2

			// IDSEL 0x1e Legacy
			0xf000 0 0 1 &i8259 7 2
			0xf100 0 0 1 &i8259 7 2

			// IDSEL 0x1f IDE/SATA
			0xf800 0 0 1 &i8259 14 2
			0xf900 0 0 1 &i8259 5 2
			>;

		pcie@0 {
			ranges = <0x02000000 0x0 0xe0000000
				  0x02000000 0x0 0xe0000000
				  0x0 0x20000000

				  0x01000000 0x0 0x00000000
				  0x01000000 0x0 0x00000000
				  0x0 0x00010000>;
			uli1575@0 {
				reg = <0 0 0 0 0>;
				#size-cells = <2>;
				#address-cells = <3>;
				ranges = <0x02000000 0x0 0xe0000000
					  0x02000000 0x0 0xe0000000
					  0x0 0x20000000
					  0x01000000 0x0 0x00000000
					  0x01000000 0x0 0x00000000
					  0x0 0x00010000>;
				isa@1e {
					device_type = "isa";
					#size-cells = <1>;
					#address-cells = <2>;
					reg = <0xf000 0 0 0 0>;
					ranges = <1 0 0x01000000 0 0
						  0x00001000>;
					interrupt-parent = <&i8259>;

					i8259: interrupt-controller@20 {
						reg = <1 0x20 2
						       1 0xa0 2
						       1 0x4d0 2>;
						interrupt-controller;
						device_type = "interrupt-controller";
						#address-cells = <0>;
						#interrupt-cells = <2>;
						compatible = "chrp,iic";
						interrupts = <9 2 0 0>;
					};

					i8042@60 {
						#size-cells = <0>;
						#address-cells = <1>;
						reg = <1 0x60 1 1 0x64 1>;
						interrupts = <1 3 12 3>;
						interrupt-parent = <&i8259>;

						keyboard@0 {
							reg = <0>;
							compatible = "pnpPNP,303";
						};

						mouse@1 {
							reg = <1>;
							compatible = "pnpPNP,f03";
						};
					};

					rtc@70 {
						compatible =
							"pnpPNP,b00";
						reg = <1 0x70 2>;
					};

					gpio@400 {
						reg = <1 0x400 0x80>;
					};
				};
			};
		};

	};

	pci1: pcie@fffe09000 {
		reg = <0x0f 0xffe09000 0x0 0x1000>;
		ranges = <0x02000000 0x0 0xe0000000 0x0c 0x20000000 0x0 0x20000000
			  0x01000000 0x0 0x00000000 0x0f 0xffc10000 0x0 0x00010000>;

		pcie@0 {
			ranges = <0x02000000 0x0 0xe0000000
				  0x02000000 0x0 0xe0000000
				  0x0 0x20000000

				  0x01000000 0x0 0x00000000
				  0x01000000 0x0 0x00000000
				  0x0 0x00010000>;
		};
	};
};

/include/ "mpc8641si-post.dtsi"
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
abd7d483 BB	2	/*
	3	* MPC8641 HPCN Device Tree Source
	4	*
	5	* Copyright 2008-2009 Freescale Semiconductor Inc.
abd7d483 BB	6	*/
abd7d483 BB	7
334479d1	8	/include/ "mpc8641si-pre.dtsi"
abd7d483 BB	9
	10	/ {
	11	model = "MPC8641HPCN";
	12	compatible = "fsl,mpc8641hpcn";
	13	#address-cells = <2>;
	14	#size-cells = <2>;
	15
abd7d483 BB	16	memory {
	17	device_type = "memory";
	18	reg = <0x0 0x00000000 0x0 0x40000000>; // 1G at 0x0
	19	};
	20
334479d1	21	lbc: localbus@fffe05000 {
abd7d483	22	reg = <0x0f 0xffe05000 0x0 0x1000>;
abd7d483 BB	23
	24	ranges = <0 0 0xf 0xef800000 0x00800000
	25	2 0 0xf 0xffdf8000 0x00008000
	26	3 0 0xf 0xffdf0000 0x00008000>;
	27
	28	flash@0,0 {
	29	compatible = "cfi-flash";
	30	reg = <0 0 0x00800000>;
	31	bank-width = <2>;
	32	device-width = <2>;
	33	#address-cells = <1>;
	34	#size-cells = <1>;
	35	partition@0 {
	36	label = "kernel";
	37	reg = <0x00000000 0x00300000>;
	38	};
	39	partition@300000 {
	40	label = "firmware b";
	41	reg = <0x00300000 0x00100000>;
	42	read-only;
	43	};
	44	partition@400000 {
	45	label = "fs";
	46	reg = <0x00400000 0x00300000>;
	47	};
	48	partition@700000 {
	49	label = "firmware a";
	50	reg = <0x00700000 0x00100000>;
	51	read-only;
	52	};
	53	};
	54	};
	55
334479d1	56	soc: soc8641@fffe00000 {
abd7d483	57	ranges = <0x00000000 0x0f 0xffe00000 0x00100000>;
abd7d483	58
334479d1 AIB	59	enet0: ethernet@24000 {
	60	tbi-handle = <&tbi0>;
	61	phy-handle = <&phy0>;
	62	phy-connection-type = "rgmii-id";
abd7d483 BB	63	};
abd7d483 BB	64
334479d1 AIB	65	mdio@24520 {
	66	phy0: ethernet-phy@0 {
	67	interrupts = <10 1 0 0>;
	68	reg = <0>;
abd7d483	69	};
334479d1 AIB	70	phy1: ethernet-phy@1 {
	71	interrupts = <10 1 0 0>;
	72	reg = <1>;
abd7d483	73	};
334479d1 AIB	74	phy2: ethernet-phy@2 {
	75	interrupts = <10 1 0 0>;
	76	reg = <2>;
abd7d483	77	};
334479d1 AIB	78	phy3: ethernet-phy@3 {
	79	interrupts = <10 1 0 0>;
	80	reg = <3>;
abd7d483	81	};
334479d1 AIB	82	tbi0: tbi-phy@11 {
	83	reg = <0x11>;
	84	device_type = "tbi-phy";
abd7d483 BB	85	};
	86	};
	87
	88	enet1: ethernet@25000 {
abd7d483 BB	89	tbi-handle = <&tbi1>;
	90	phy-handle = <&phy1>;
	91	phy-connection-type = "rgmii-id";
334479d1	92	};
abd7d483	93
334479d1 AIB	94	mdio@25520 {
	95	tbi1: tbi-phy@11 {
	96	reg = <0x11>;
	97	device_type = "tbi-phy";
abd7d483 BB	98	};
	99	};
	100
	101	enet2: ethernet@26000 {
abd7d483 BB	102	tbi-handle = <&tbi2>;
	103	phy-handle = <&phy2>;
	104	phy-connection-type = "rgmii-id";
334479d1	105	};
abd7d483	106
334479d1 AIB	107	mdio@26520 {
	108	tbi2: tbi-phy@11 {
	109	reg = <0x11>;
	110	device_type = "tbi-phy";
abd7d483 BB	111	};
	112	};
	113
	114	enet3: ethernet@27000 {
abd7d483 BB	115	tbi-handle = <&tbi3>;
	116	phy-handle = <&phy3>;
	117	phy-connection-type = "rgmii-id";
abd7d483 BB	118	};
abd7d483 BB	119
334479d1 AIB	120	mdio@27520 {
	121	tbi3: tbi-phy@11 {
	122	reg = <0x11>;
	123	device_type = "tbi-phy";
	124	};
abd7d483 BB	125	};
	126	};
	127
	128	pci0: pcie@fffe08000 {
abd7d483	129	reg = <0x0f 0xffe08000 0x0 0x1000>;
558ab308	130	ranges = <0x02000000 0x0 0xe0000000 0x0c 0x00000000 0x0 0x20000000
abd7d483	131	0x01000000 0x0 0x00000000 0x0f 0xffc00000 0x0 0x00010000>;
abd7d483 BB	132	interrupt-map-mask = <0xff00 0 0 7>;
	133	interrupt-map = <
	134	/* IDSEL 0x11 func 0 - PCI slot 1 */
ccdde478 SW	135	0x8800 0 0 1 &mpic 2 1 0 0
	136	0x8800 0 0 2 &mpic 3 1 0 0
	137	0x8800 0 0 3 &mpic 4 1 0 0
	138	0x8800 0 0 4 &mpic 1 1 0 0
abd7d483 BB	139
abd7d483 BB	140	/* IDSEL 0x11 func 1 - PCI slot 1 */
ccdde478 SW	141	0x8900 0 0 1 &mpic 2 1 0 0
	142	0x8900 0 0 2 &mpic 3 1 0 0
	143	0x8900 0 0 3 &mpic 4 1 0 0
	144	0x8900 0 0 4 &mpic 1 1 0 0
abd7d483 BB	145
abd7d483 BB	146	/* IDSEL 0x11 func 2 - PCI slot 1 */
ccdde478 SW	147	0x8a00 0 0 1 &mpic 2 1 0 0
	148	0x8a00 0 0 2 &mpic 3 1 0 0
	149	0x8a00 0 0 3 &mpic 4 1 0 0
	150	0x8a00 0 0 4 &mpic 1 1 0 0
abd7d483 BB	151
abd7d483 BB	152	/* IDSEL 0x11 func 3 - PCI slot 1 */
ccdde478 SW	153	0x8b00 0 0 1 &mpic 2 1 0 0
	154	0x8b00 0 0 2 &mpic 3 1 0 0
	155	0x8b00 0 0 3 &mpic 4 1 0 0
	156	0x8b00 0 0 4 &mpic 1 1 0 0
abd7d483 BB	157
abd7d483 BB	158	/* IDSEL 0x11 func 4 - PCI slot 1 */
ccdde478 SW	159	0x8c00 0 0 1 &mpic 2 1 0 0
	160	0x8c00 0 0 2 &mpic 3 1 0 0
	161	0x8c00 0 0 3 &mpic 4 1 0 0
	162	0x8c00 0 0 4 &mpic 1 1 0 0
abd7d483 BB	163
abd7d483 BB	164	/* IDSEL 0x11 func 5 - PCI slot 1 */
ccdde478 SW	165	0x8d00 0 0 1 &mpic 2 1 0 0
	166	0x8d00 0 0 2 &mpic 3 1 0 0
	167	0x8d00 0 0 3 &mpic 4 1 0 0
	168	0x8d00 0 0 4 &mpic 1 1 0 0
abd7d483 BB	169
abd7d483 BB	170	/* IDSEL 0x11 func 6 - PCI slot 1 */
ccdde478 SW	171	0x8e00 0 0 1 &mpic 2 1 0 0
	172	0x8e00 0 0 2 &mpic 3 1 0 0
	173	0x8e00 0 0 3 &mpic 4 1 0 0
	174	0x8e00 0 0 4 &mpic 1 1 0 0
abd7d483 BB	175
abd7d483 BB	176	/* IDSEL 0x11 func 7 - PCI slot 1 */
ccdde478 SW	177	0x8f00 0 0 1 &mpic 2 1 0 0
	178	0x8f00 0 0 2 &mpic 3 1 0 0
	179	0x8f00 0 0 3 &mpic 4 1 0 0
	180	0x8f00 0 0 4 &mpic 1 1 0 0
abd7d483 BB	181
abd7d483 BB	182	/* IDSEL 0x12 func 0 - PCI slot 2 */
ccdde478 SW	183	0x9000 0 0 1 &mpic 3 1 0 0
	184	0x9000 0 0 2 &mpic 4 1 0 0
	185	0x9000 0 0 3 &mpic 1 1 0 0
	186	0x9000 0 0 4 &mpic 2 1 0 0
abd7d483 BB	187
abd7d483 BB	188	/* IDSEL 0x12 func 1 - PCI slot 2 */
ccdde478 SW	189	0x9100 0 0 1 &mpic 3 1 0 0
	190	0x9100 0 0 2 &mpic 4 1 0 0
	191	0x9100 0 0 3 &mpic 1 1 0 0
	192	0x9100 0 0 4 &mpic 2 1 0 0
abd7d483 BB	193
abd7d483 BB	194	/* IDSEL 0x12 func 2 - PCI slot 2 */
ccdde478 SW	195	0x9200 0 0 1 &mpic 3 1 0 0
	196	0x9200 0 0 2 &mpic 4 1 0 0
	197	0x9200 0 0 3 &mpic 1 1 0 0
	198	0x9200 0 0 4 &mpic 2 1 0 0
abd7d483 BB	199
abd7d483 BB	200	/* IDSEL 0x12 func 3 - PCI slot 2 */
ccdde478 SW	201	0x9300 0 0 1 &mpic 3 1 0 0
	202	0x9300 0 0 2 &mpic 4 1 0 0
	203	0x9300 0 0 3 &mpic 1 1 0 0
	204	0x9300 0 0 4 &mpic 2 1 0 0
abd7d483 BB	205
abd7d483 BB	206	/* IDSEL 0x12 func 4 - PCI slot 2 */
ccdde478 SW	207	0x9400 0 0 1 &mpic 3 1 0 0
	208	0x9400 0 0 2 &mpic 4 1 0 0
	209	0x9400 0 0 3 &mpic 1 1 0 0
	210	0x9400 0 0 4 &mpic 2 1 0 0
abd7d483 BB	211
abd7d483 BB	212	/* IDSEL 0x12 func 5 - PCI slot 2 */
ccdde478 SW	213	0x9500 0 0 1 &mpic 3 1 0 0
	214	0x9500 0 0 2 &mpic 4 1 0 0
	215	0x9500 0 0 3 &mpic 1 1 0 0
	216	0x9500 0 0 4 &mpic 2 1 0 0
abd7d483 BB	217
abd7d483 BB	218	/* IDSEL 0x12 func 6 - PCI slot 2 */
ccdde478 SW	219	0x9600 0 0 1 &mpic 3 1 0 0
	220	0x9600 0 0 2 &mpic 4 1 0 0
	221	0x9600 0 0 3 &mpic 1 1 0 0
	222	0x9600 0 0 4 &mpic 2 1 0 0
abd7d483 BB	223
abd7d483 BB	224	/* IDSEL 0x12 func 7 - PCI slot 2 */
ccdde478 SW	225	0x9700 0 0 1 &mpic 3 1 0 0
	226	0x9700 0 0 2 &mpic 4 1 0 0
	227	0x9700 0 0 3 &mpic 1 1 0 0
	228	0x9700 0 0 4 &mpic 2 1 0 0
abd7d483 BB	229
	230	// IDSEL 0x1c USB
	231	0xe000 0 0 1 &i8259 12 2
	232	0xe100 0 0 2 &i8259 9 2
	233	0xe200 0 0 3 &i8259 10 2
	234	0xe300 0 0 4 &i8259 11 2
	235
	236	// IDSEL 0x1d Audio
	237	0xe800 0 0 1 &i8259 6 2
	238
	239	// IDSEL 0x1e Legacy
	240	0xf000 0 0 1 &i8259 7 2
	241	0xf100 0 0 1 &i8259 7 2
	242
	243	// IDSEL 0x1f IDE/SATA
	244	0xf800 0 0 1 &i8259 14 2
	245	0xf900 0 0 1 &i8259 5 2
	246	>;
	247
	248	pcie@0 {
558ab308 KG	249	ranges = <0x02000000 0x0 0xe0000000
558ab308 KG	250	0x02000000 0x0 0xe0000000
abd7d483 BB	251	0x0 0x20000000
	252
	253	0x01000000 0x0 0x00000000
	254	0x01000000 0x0 0x00000000
	255	0x0 0x00010000>;
	256	uli1575@0 {
	257	reg = <0 0 0 0 0>;
	258	#size-cells = <2>;
	259	#address-cells = <3>;
558ab308 KG	260	ranges = <0x02000000 0x0 0xe0000000
558ab308 KG	261	0x02000000 0x0 0xe0000000
abd7d483 BB	262	0x0 0x20000000
	263	0x01000000 0x0 0x00000000
	264	0x01000000 0x0 0x00000000
	265	0x0 0x00010000>;
	266	isa@1e {
	267	device_type = "isa";
abd7d483 BB	268	#size-cells = <1>;
	269	#address-cells = <2>;
	270	reg = <0xf000 0 0 0 0>;
	271	ranges = <1 0 0x01000000 0 0
	272	0x00001000>;
	273	interrupt-parent = <&i8259>;
	274
	275	i8259: interrupt-controller@20 {
	276	reg = <1 0x20 2
	277	1 0xa0 2
	278	1 0x4d0 2>;
	279	interrupt-controller;
	280	device_type = "interrupt-controller";
	281	#address-cells = <0>;
	282	#interrupt-cells = <2>;
	283	compatible = "chrp,iic";
595207b9	284	interrupts = <9 2 0 0>;
abd7d483 BB	285	};
	286
	287	i8042@60 {
	288	#size-cells = <0>;
	289	#address-cells = <1>;
	290	reg = <1 0x60 1 1 0x64 1>;
	291	interrupts = <1 3 12 3>;
595207b9	292	interrupt-parent = <&i8259>;
abd7d483 BB	293
	294	keyboard@0 {
	295	reg = <0>;
	296	compatible = "pnpPNP,303";
	297	};
	298
	299	mouse@1 {
	300	reg = <1>;
	301	compatible = "pnpPNP,f03";
	302	};
	303	};
	304
	305	rtc@70 {
	306	compatible =
	307	"pnpPNP,b00";
	308	reg = <1 0x70 2>;
	309	};
	310
	311	gpio@400 {
	312	reg = <1 0x400 0x80>;
	313	};
	314	};
	315	};
	316	};
	317
	318	};
	319
	320	pci1: pcie@fffe09000 {
abd7d483	321	reg = <0x0f 0xffe09000 0x0 0x1000>;
558ab308	322	ranges = <0x02000000 0x0 0xe0000000 0x0c 0x20000000 0x0 0x20000000
abd7d483	323	0x01000000 0x0 0x00000000 0x0f 0xffc10000 0x0 0x00010000>;
a66639d4	324
abd7d483	325	pcie@0 {
558ab308 KG	326	ranges = <0x02000000 0x0 0xe0000000
558ab308 KG	327	0x02000000 0x0 0xe0000000
abd7d483 BB	328	0x0 0x20000000
	329
	330	0x01000000 0x0 0x00000000
	331	0x01000000 0x0 0x00000000
	332	0x0 0x00010000>;
	333	};
	334	};
	335	};
334479d1 AIB	336
334479d1 AIB	337	/include/ "mpc8641si-post.dtsi"