]>
Commit | Line | Data |
---|---|---|
7a234d03 LY |
1 | /* |
2 | * MPC8360E EMDS Device Tree Source | |
3 | * | |
4 | * Copyright 2006 Freescale Semiconductor Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; either version 2 of the License, or (at your | |
9 | * option) any later version. | |
10 | */ | |
11 | ||
12 | ||
13 | /* | |
14 | /memreserve/ 00000000 1000000; | |
15 | */ | |
16 | ||
17 | / { | |
d71a1dc6 KG |
18 | model = "MPC8360MDS"; |
19 | compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS"; | |
7a234d03 LY |
20 | #address-cells = <1>; |
21 | #size-cells = <1>; | |
7a234d03 LY |
22 | |
23 | cpus { | |
7a234d03 LY |
24 | #address-cells = <1>; |
25 | #size-cells = <0>; | |
7a234d03 LY |
26 | |
27 | PowerPC,8360@0 { | |
28 | device_type = "cpu"; | |
29 | reg = <0>; | |
30 | d-cache-line-size = <20>; // 32 bytes | |
31 | i-cache-line-size = <20>; // 32 bytes | |
32 | d-cache-size = <8000>; // L1, 32K | |
33 | i-cache-size = <8000>; // L1, 32K | |
34 | timebase-frequency = <3EF1480>; | |
35 | bus-frequency = <FBC5200>; | |
36 | clock-frequency = <1F78A400>; | |
7a234d03 LY |
37 | }; |
38 | }; | |
39 | ||
40 | memory { | |
41 | device_type = "memory"; | |
7a234d03 LY |
42 | reg = <00000000 10000000>; |
43 | }; | |
44 | ||
45 | bcsr@f8000000 { | |
46 | device_type = "board-control"; | |
47 | reg = <f8000000 8000>; | |
48 | }; | |
49 | ||
50 | soc8360@e0000000 { | |
51 | #address-cells = <1>; | |
52 | #size-cells = <1>; | |
7a234d03 LY |
53 | device_type = "soc"; |
54 | ranges = <0 e0000000 00100000>; | |
55 | reg = <e0000000 00000200>; | |
56 | bus-frequency = <FBC5200>; | |
57 | ||
58 | wdt@200 { | |
59 | device_type = "watchdog"; | |
60 | compatible = "mpc83xx_wdt"; | |
61 | reg = <200 100>; | |
62 | }; | |
63 | ||
64 | i2c@3000 { | |
65 | device_type = "i2c"; | |
66 | compatible = "fsl-i2c"; | |
67 | reg = <3000 100>; | |
68 | interrupts = <e 8>; | |
d71a1dc6 | 69 | interrupt-parent = < &ipic >; |
7a234d03 LY |
70 | dfsrr; |
71 | }; | |
72 | ||
73 | i2c@3100 { | |
74 | device_type = "i2c"; | |
75 | compatible = "fsl-i2c"; | |
76 | reg = <3100 100>; | |
77 | interrupts = <f 8>; | |
d71a1dc6 | 78 | interrupt-parent = < &ipic >; |
7a234d03 LY |
79 | dfsrr; |
80 | }; | |
81 | ||
82 | serial@4500 { | |
83 | device_type = "serial"; | |
84 | compatible = "ns16550"; | |
85 | reg = <4500 100>; | |
86 | clock-frequency = <FBC5200>; | |
87 | interrupts = <9 8>; | |
d71a1dc6 | 88 | interrupt-parent = < &ipic >; |
7a234d03 LY |
89 | }; |
90 | ||
91 | serial@4600 { | |
92 | device_type = "serial"; | |
93 | compatible = "ns16550"; | |
94 | reg = <4600 100>; | |
95 | clock-frequency = <FBC5200>; | |
96 | interrupts = <a 8>; | |
d71a1dc6 | 97 | interrupt-parent = < &ipic >; |
7a234d03 LY |
98 | }; |
99 | ||
100 | crypto@30000 { | |
101 | device_type = "crypto"; | |
102 | model = "SEC2"; | |
103 | compatible = "talitos"; | |
104 | reg = <30000 10000>; | |
105 | interrupts = <b 8>; | |
d71a1dc6 | 106 | interrupt-parent = < &ipic >; |
7a234d03 LY |
107 | num-channels = <4>; |
108 | channel-fifo-len = <18>; | |
109 | exec-units-mask = <0000007e>; | |
110 | /* desc mask is for rev1.x, we need runtime fixup for >=2.x */ | |
111 | descriptor-types-mask = <01010ebf>; | |
112 | }; | |
113 | ||
d71a1dc6 | 114 | ipic: pic@700 { |
7a234d03 LY |
115 | interrupt-controller; |
116 | #address-cells = <0>; | |
117 | #interrupt-cells = <2>; | |
118 | reg = <700 100>; | |
7a234d03 LY |
119 | device_type = "ipic"; |
120 | }; | |
121 | ||
122 | par_io@1400 { | |
123 | reg = <1400 100>; | |
124 | device_type = "par_io"; | |
125 | num-ports = <7>; | |
126 | ||
d71a1dc6 | 127 | pio1: ucc_pin@01 { |
7a234d03 LY |
128 | pio-map = < |
129 | /* port pin dir open_drain assignment has_irq */ | |
130 | 0 3 1 0 1 0 /* TxD0 */ | |
131 | 0 4 1 0 1 0 /* TxD1 */ | |
132 | 0 5 1 0 1 0 /* TxD2 */ | |
133 | 0 6 1 0 1 0 /* TxD3 */ | |
134 | 1 6 1 0 3 0 /* TxD4 */ | |
135 | 1 7 1 0 1 0 /* TxD5 */ | |
136 | 1 9 1 0 2 0 /* TxD6 */ | |
137 | 1 a 1 0 2 0 /* TxD7 */ | |
138 | 0 9 2 0 1 0 /* RxD0 */ | |
139 | 0 a 2 0 1 0 /* RxD1 */ | |
140 | 0 b 2 0 1 0 /* RxD2 */ | |
141 | 0 c 2 0 1 0 /* RxD3 */ | |
142 | 0 d 2 0 1 0 /* RxD4 */ | |
143 | 1 1 2 0 2 0 /* RxD5 */ | |
144 | 1 0 2 0 2 0 /* RxD6 */ | |
145 | 1 4 2 0 2 0 /* RxD7 */ | |
146 | 0 7 1 0 1 0 /* TX_EN */ | |
147 | 0 8 1 0 1 0 /* TX_ER */ | |
148 | 0 f 2 0 1 0 /* RX_DV */ | |
149 | 0 10 2 0 1 0 /* RX_ER */ | |
150 | 0 0 2 0 1 0 /* RX_CLK */ | |
151 | 2 9 1 0 3 0 /* GTX_CLK - CLK10 */ | |
152 | 2 8 2 0 1 0>; /* GTX125 - CLK9 */ | |
153 | }; | |
d71a1dc6 | 154 | pio2: ucc_pin@02 { |
7a234d03 LY |
155 | pio-map = < |
156 | /* port pin dir open_drain assignment has_irq */ | |
157 | 0 11 1 0 1 0 /* TxD0 */ | |
158 | 0 12 1 0 1 0 /* TxD1 */ | |
159 | 0 13 1 0 1 0 /* TxD2 */ | |
160 | 0 14 1 0 1 0 /* TxD3 */ | |
161 | 1 2 1 0 1 0 /* TxD4 */ | |
162 | 1 3 1 0 2 0 /* TxD5 */ | |
163 | 1 5 1 0 3 0 /* TxD6 */ | |
164 | 1 8 1 0 3 0 /* TxD7 */ | |
165 | 0 17 2 0 1 0 /* RxD0 */ | |
166 | 0 18 2 0 1 0 /* RxD1 */ | |
167 | 0 19 2 0 1 0 /* RxD2 */ | |
168 | 0 1a 2 0 1 0 /* RxD3 */ | |
169 | 0 1b 2 0 1 0 /* RxD4 */ | |
170 | 1 c 2 0 2 0 /* RxD5 */ | |
171 | 1 d 2 0 3 0 /* RxD6 */ | |
172 | 1 b 2 0 2 0 /* RxD7 */ | |
173 | 0 15 1 0 1 0 /* TX_EN */ | |
174 | 0 16 1 0 1 0 /* TX_ER */ | |
175 | 0 1d 2 0 1 0 /* RX_DV */ | |
176 | 0 1e 2 0 1 0 /* RX_ER */ | |
177 | 0 1f 2 0 1 0 /* RX_CLK */ | |
178 | 2 2 1 0 2 0 /* GTX_CLK - CLK10 */ | |
179 | 2 3 2 0 1 0 /* GTX125 - CLK4 */ | |
180 | 0 1 3 0 2 0 /* MDIO */ | |
181 | 0 2 1 0 1 0>; /* MDC */ | |
182 | }; | |
183 | ||
184 | }; | |
185 | }; | |
186 | ||
187 | qe@e0100000 { | |
188 | #address-cells = <1>; | |
189 | #size-cells = <1>; | |
190 | device_type = "qe"; | |
191 | model = "QE"; | |
192 | ranges = <0 e0100000 00100000>; | |
193 | reg = <e0100000 480>; | |
194 | brg-frequency = <0>; | |
195 | bus-frequency = <179A7B00>; | |
196 | ||
197 | muram@10000 { | |
198 | device_type = "muram"; | |
199 | ranges = <0 00010000 0000c000>; | |
200 | ||
201 | data-only@0{ | |
202 | reg = <0 c000>; | |
203 | }; | |
204 | }; | |
205 | ||
206 | spi@4c0 { | |
207 | device_type = "spi"; | |
208 | compatible = "fsl_spi"; | |
209 | reg = <4c0 40>; | |
210 | interrupts = <2>; | |
d71a1dc6 | 211 | interrupt-parent = < &qeic >; |
7a234d03 LY |
212 | mode = "cpu"; |
213 | }; | |
214 | ||
215 | spi@500 { | |
216 | device_type = "spi"; | |
217 | compatible = "fsl_spi"; | |
218 | reg = <500 40>; | |
219 | interrupts = <1>; | |
d71a1dc6 | 220 | interrupt-parent = < &qeic >; |
7a234d03 LY |
221 | mode = "cpu"; |
222 | }; | |
223 | ||
224 | usb@6c0 { | |
225 | device_type = "usb"; | |
226 | compatible = "qe_udc"; | |
227 | reg = <6c0 40 8B00 100>; | |
228 | interrupts = <b>; | |
d71a1dc6 | 229 | interrupt-parent = < &qeic >; |
7a234d03 LY |
230 | mode = "slave"; |
231 | }; | |
232 | ||
233 | ucc@2000 { | |
234 | device_type = "network"; | |
235 | compatible = "ucc_geth"; | |
236 | model = "UCC"; | |
237 | device-id = <1>; | |
238 | reg = <2000 200>; | |
239 | interrupts = <20>; | |
d71a1dc6 | 240 | interrupt-parent = < &qeic >; |
eae98266 TT |
241 | /* |
242 | * mac-address is deprecated and will be removed | |
243 | * in 2.6.25. Only recent versions of | |
244 | * U-Boot support local-mac-address, however. | |
245 | */ | |
246 | mac-address = [ 00 00 00 00 00 00 ]; | |
247 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
7a234d03 LY |
248 | rx-clock = <0>; |
249 | tx-clock = <19>; | |
d71a1dc6 | 250 | phy-handle = < &phy0 >; |
0fd8c47c | 251 | phy-connection-type = "rgmii-id"; |
d71a1dc6 | 252 | pio-handle = < &pio1 >; |
7a234d03 LY |
253 | }; |
254 | ||
255 | ucc@3000 { | |
256 | device_type = "network"; | |
257 | compatible = "ucc_geth"; | |
258 | model = "UCC"; | |
259 | device-id = <2>; | |
260 | reg = <3000 200>; | |
261 | interrupts = <21>; | |
d71a1dc6 | 262 | interrupt-parent = < &qeic >; |
eae98266 TT |
263 | /* |
264 | * mac-address is deprecated and will be removed | |
265 | * in 2.6.25. Only recent versions of | |
266 | * U-Boot support local-mac-address, however. | |
267 | */ | |
268 | mac-address = [ 00 00 00 00 00 00 ]; | |
269 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
7a234d03 LY |
270 | rx-clock = <0>; |
271 | tx-clock = <14>; | |
d71a1dc6 | 272 | phy-handle = < &phy1 >; |
0fd8c47c | 273 | phy-connection-type = "rgmii-id"; |
d71a1dc6 | 274 | pio-handle = < &pio2 >; |
7a234d03 LY |
275 | }; |
276 | ||
277 | mdio@2120 { | |
278 | #address-cells = <1>; | |
279 | #size-cells = <0>; | |
280 | reg = <2120 18>; | |
281 | device_type = "mdio"; | |
282 | compatible = "ucc_geth_phy"; | |
283 | ||
d71a1dc6 KG |
284 | phy0: ethernet-phy@00 { |
285 | interrupt-parent = < &ipic >; | |
286 | interrupts = <11 8>; | |
7a234d03 LY |
287 | reg = <0>; |
288 | device_type = "ethernet-phy"; | |
7a234d03 | 289 | }; |
d71a1dc6 KG |
290 | phy1: ethernet-phy@01 { |
291 | interrupt-parent = < &ipic >; | |
292 | interrupts = <12 8>; | |
7a234d03 LY |
293 | reg = <1>; |
294 | device_type = "ethernet-phy"; | |
7a234d03 LY |
295 | }; |
296 | }; | |
297 | ||
d71a1dc6 | 298 | qeic: qeic@80 { |
7a234d03 LY |
299 | interrupt-controller; |
300 | device_type = "qeic"; | |
301 | #address-cells = <0>; | |
302 | #interrupt-cells = <1>; | |
303 | reg = <80 80>; | |
7a234d03 LY |
304 | big-endian; |
305 | interrupts = <20 8 21 8>; //high:32 low:33 | |
d71a1dc6 | 306 | interrupt-parent = < &ipic >; |
7a234d03 | 307 | }; |
1b3c5cda | 308 | }; |
7a234d03 | 309 | |
1b3c5cda KG |
310 | pci@e0008500 { |
311 | interrupt-map-mask = <f800 0 0 7>; | |
312 | interrupt-map = < | |
313 | ||
314 | /* IDSEL 0x11 AD17 */ | |
315 | 8800 0 0 1 &ipic 14 8 | |
316 | 8800 0 0 2 &ipic 15 8 | |
317 | 8800 0 0 3 &ipic 16 8 | |
318 | 8800 0 0 4 &ipic 17 8 | |
319 | ||
320 | /* IDSEL 0x12 AD18 */ | |
321 | 9000 0 0 1 &ipic 16 8 | |
322 | 9000 0 0 2 &ipic 17 8 | |
323 | 9000 0 0 3 &ipic 14 8 | |
324 | 9000 0 0 4 &ipic 15 8 | |
325 | ||
326 | /* IDSEL 0x13 AD19 */ | |
327 | 9800 0 0 1 &ipic 17 8 | |
328 | 9800 0 0 2 &ipic 14 8 | |
329 | 9800 0 0 3 &ipic 15 8 | |
330 | 9800 0 0 4 &ipic 16 8 | |
331 | ||
332 | /* IDSEL 0x15 AD21*/ | |
333 | a800 0 0 1 &ipic 14 8 | |
334 | a800 0 0 2 &ipic 15 8 | |
335 | a800 0 0 3 &ipic 16 8 | |
336 | a800 0 0 4 &ipic 17 8 | |
337 | ||
338 | /* IDSEL 0x16 AD22*/ | |
339 | b000 0 0 1 &ipic 17 8 | |
340 | b000 0 0 2 &ipic 14 8 | |
341 | b000 0 0 3 &ipic 15 8 | |
342 | b000 0 0 4 &ipic 16 8 | |
343 | ||
344 | /* IDSEL 0x17 AD23*/ | |
345 | b800 0 0 1 &ipic 16 8 | |
346 | b800 0 0 2 &ipic 17 8 | |
347 | b800 0 0 3 &ipic 14 8 | |
348 | b800 0 0 4 &ipic 15 8 | |
349 | ||
350 | /* IDSEL 0x18 AD24*/ | |
351 | c000 0 0 1 &ipic 15 8 | |
352 | c000 0 0 2 &ipic 16 8 | |
353 | c000 0 0 3 &ipic 17 8 | |
354 | c000 0 0 4 &ipic 14 8>; | |
355 | interrupt-parent = < &ipic >; | |
356 | interrupts = <42 8>; | |
357 | bus-range = <0 0>; | |
358 | ranges = <02000000 0 a0000000 a0000000 0 10000000 | |
359 | 42000000 0 80000000 80000000 0 10000000 | |
360 | 01000000 0 00000000 e2000000 0 00100000>; | |
361 | clock-frequency = <3f940aa>; | |
362 | #interrupt-cells = <1>; | |
363 | #size-cells = <2>; | |
364 | #address-cells = <3>; | |
365 | reg = <e0008500 100>; | |
366 | compatible = "fsl,mpc8349-pci"; | |
367 | device_type = "pci"; | |
7a234d03 LY |
368 | }; |
369 | }; |