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23dd1cbf KP |
1 | /* |
2 | * MPC8378E RDB Device Tree Source | |
3 | * | |
4 | * Copyright 2007, 2008 Freescale Semiconductor Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; either version 2 of the License, or (at your | |
9 | * option) any later version. | |
10 | */ | |
11 | ||
12 | /dts-v1/; | |
13 | ||
14 | / { | |
3b29dade | 15 | compatible = "fsl,mpc8378rdb"; |
23dd1cbf KP |
16 | #address-cells = <1>; |
17 | #size-cells = <1>; | |
18 | ||
19 | aliases { | |
20 | ethernet0 = &enet0; | |
21 | ethernet1 = &enet1; | |
22 | serial0 = &serial0; | |
23 | serial1 = &serial1; | |
24 | pci0 = &pci0; | |
25 | }; | |
26 | ||
27 | cpus { | |
28 | #address-cells = <1>; | |
29 | #size-cells = <0>; | |
30 | ||
31 | PowerPC,8378@0 { | |
32 | device_type = "cpu"; | |
cda13dd1 | 33 | reg = <0x0>; |
23dd1cbf KP |
34 | d-cache-line-size = <32>; |
35 | i-cache-line-size = <32>; | |
36 | d-cache-size = <32768>; | |
37 | i-cache-size = <32768>; | |
38 | timebase-frequency = <0>; | |
39 | bus-frequency = <0>; | |
40 | clock-frequency = <0>; | |
41 | }; | |
42 | }; | |
43 | ||
44 | memory { | |
45 | device_type = "memory"; | |
46 | reg = <0x00000000 0x10000000>; // 256MB at 0 | |
47 | }; | |
48 | ||
49 | localbus@e0005000 { | |
50 | #address-cells = <2>; | |
51 | #size-cells = <1>; | |
52 | compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus"; | |
53 | reg = <0xe0005000 0x1000>; | |
cda13dd1 | 54 | interrupts = <77 0x8>; |
23dd1cbf KP |
55 | interrupt-parent = <&ipic>; |
56 | ||
57 | // CS0 and CS1 are swapped when | |
58 | // booting from nand, but the | |
59 | // addresses are the same. | |
cda13dd1 PG |
60 | ranges = <0x0 0x0 0xfe000000 0x00800000 |
61 | 0x1 0x0 0xe0600000 0x00008000 | |
62 | 0x2 0x0 0xf0000000 0x00020000 | |
63 | 0x3 0x0 0xfa000000 0x00008000>; | |
23dd1cbf KP |
64 | |
65 | flash@0,0 { | |
66 | #address-cells = <1>; | |
67 | #size-cells = <1>; | |
68 | compatible = "cfi-flash"; | |
cda13dd1 | 69 | reg = <0x0 0x0 0x800000>; |
23dd1cbf KP |
70 | bank-width = <2>; |
71 | device-width = <1>; | |
72 | }; | |
73 | ||
74 | nand@1,0 { | |
75 | #address-cells = <1>; | |
76 | #size-cells = <1>; | |
77 | compatible = "fsl,mpc8378-fcm-nand", | |
78 | "fsl,elbc-fcm-nand"; | |
cda13dd1 | 79 | reg = <0x1 0x0 0x8000>; |
23dd1cbf KP |
80 | |
81 | u-boot@0 { | |
82 | reg = <0x0 0x100000>; | |
83 | read-only; | |
84 | }; | |
85 | ||
86 | kernel@100000 { | |
87 | reg = <0x100000 0x300000>; | |
88 | }; | |
89 | fs@400000 { | |
90 | reg = <0x400000 0x1c00000>; | |
91 | }; | |
92 | }; | |
93 | }; | |
94 | ||
95 | immr@e0000000 { | |
96 | #address-cells = <1>; | |
97 | #size-cells = <1>; | |
98 | device_type = "soc"; | |
99 | compatible = "simple-bus"; | |
cda13dd1 | 100 | ranges = <0x0 0xe0000000 0x00100000>; |
23dd1cbf KP |
101 | reg = <0xe0000000 0x00000200>; |
102 | bus-frequency = <0>; | |
103 | ||
104 | wdt@200 { | |
105 | device_type = "watchdog"; | |
106 | compatible = "mpc83xx_wdt"; | |
107 | reg = <0x200 0x100>; | |
108 | }; | |
109 | ||
110 | i2c@3000 { | |
111 | #address-cells = <1>; | |
112 | #size-cells = <0>; | |
113 | cell-index = <0>; | |
114 | compatible = "fsl-i2c"; | |
115 | reg = <0x3000 0x100>; | |
cda13dd1 PG |
116 | interrupts = <14 0x8>; |
117 | interrupt-parent = <&ipic>; | |
23dd1cbf KP |
118 | dfsrr; |
119 | rtc@68 { | |
23dd1cbf KP |
120 | compatible = "dallas,ds1339"; |
121 | reg = <0x68>; | |
122 | }; | |
44274698 AV |
123 | |
124 | mcu_pio: mcu@a { | |
125 | #gpio-cells = <2>; | |
126 | compatible = "fsl,mc9s08qg8-mpc8378erdb", | |
127 | "fsl,mcu-mpc8349emitx"; | |
128 | reg = <0x0a>; | |
129 | gpio-controller; | |
130 | }; | |
23dd1cbf KP |
131 | }; |
132 | ||
133 | i2c@3100 { | |
134 | #address-cells = <1>; | |
135 | #size-cells = <0>; | |
136 | cell-index = <1>; | |
137 | compatible = "fsl-i2c"; | |
138 | reg = <0x3100 0x100>; | |
cda13dd1 PG |
139 | interrupts = <15 0x8>; |
140 | interrupt-parent = <&ipic>; | |
23dd1cbf KP |
141 | dfsrr; |
142 | }; | |
143 | ||
144 | spi@7000 { | |
145 | cell-index = <0>; | |
146 | compatible = "fsl,spi"; | |
147 | reg = <0x7000 0x1000>; | |
cda13dd1 PG |
148 | interrupts = <16 0x8>; |
149 | interrupt-parent = <&ipic>; | |
23dd1cbf KP |
150 | mode = "cpu"; |
151 | }; | |
152 | ||
dee80553 KG |
153 | dma@82a8 { |
154 | #address-cells = <1>; | |
155 | #size-cells = <1>; | |
156 | compatible = "fsl,mpc8378-dma", "fsl,elo-dma"; | |
157 | reg = <0x82a8 4>; | |
158 | ranges = <0 0x8100 0x1a8>; | |
159 | interrupt-parent = <&ipic>; | |
160 | interrupts = <71 8>; | |
161 | cell-index = <0>; | |
162 | dma-channel@0 { | |
163 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | |
164 | reg = <0 0x80>; | |
aeb42762 | 165 | cell-index = <0>; |
dee80553 KG |
166 | interrupt-parent = <&ipic>; |
167 | interrupts = <71 8>; | |
168 | }; | |
169 | dma-channel@80 { | |
170 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | |
171 | reg = <0x80 0x80>; | |
aeb42762 | 172 | cell-index = <1>; |
dee80553 KG |
173 | interrupt-parent = <&ipic>; |
174 | interrupts = <71 8>; | |
175 | }; | |
176 | dma-channel@100 { | |
177 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | |
178 | reg = <0x100 0x80>; | |
aeb42762 | 179 | cell-index = <2>; |
dee80553 KG |
180 | interrupt-parent = <&ipic>; |
181 | interrupts = <71 8>; | |
182 | }; | |
183 | dma-channel@180 { | |
184 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | |
185 | reg = <0x180 0x28>; | |
aeb42762 | 186 | cell-index = <3>; |
dee80553 KG |
187 | interrupt-parent = <&ipic>; |
188 | interrupts = <71 8>; | |
189 | }; | |
190 | }; | |
191 | ||
23dd1cbf KP |
192 | usb@23000 { |
193 | compatible = "fsl-usb2-dr"; | |
194 | reg = <0x23000 0x1000>; | |
195 | #address-cells = <1>; | |
196 | #size-cells = <0>; | |
cda13dd1 PG |
197 | interrupt-parent = <&ipic>; |
198 | interrupts = <38 0x8>; | |
8e8ff3a3 | 199 | phy_type = "ulpi"; |
23dd1cbf KP |
200 | }; |
201 | ||
202 | mdio@24520 { | |
203 | #address-cells = <1>; | |
204 | #size-cells = <0>; | |
205 | compatible = "fsl,gianfar-mdio"; | |
206 | reg = <0x24520 0x20>; | |
207 | phy2: ethernet-phy@2 { | |
cda13dd1 PG |
208 | interrupt-parent = <&ipic>; |
209 | interrupts = <17 0x8>; | |
210 | reg = <0x2>; | |
23dd1cbf KP |
211 | device_type = "ethernet-phy"; |
212 | }; | |
b31a1d8b AF |
213 | tbi0: tbi-phy@11 { |
214 | reg = <0x11>; | |
215 | device_type = "tbi-phy"; | |
216 | }; | |
217 | }; | |
218 | ||
219 | mdio@25520 { | |
220 | #address-cells = <1>; | |
221 | #size-cells = <0>; | |
222 | compatible = "fsl,gianfar-tbi"; | |
223 | reg = <0x25520 0x20>; | |
224 | ||
225 | tbi1: tbi-phy@11 { | |
226 | reg = <0x11>; | |
227 | device_type = "tbi-phy"; | |
228 | }; | |
23dd1cbf KP |
229 | }; |
230 | ||
b31a1d8b | 231 | |
23dd1cbf KP |
232 | enet0: ethernet@24000 { |
233 | cell-index = <0>; | |
234 | device_type = "network"; | |
235 | model = "eTSEC"; | |
236 | compatible = "gianfar"; | |
237 | reg = <0x24000 0x1000>; | |
238 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
cda13dd1 | 239 | interrupts = <32 0x8 33 0x8 34 0x8>; |
23dd1cbf | 240 | phy-connection-type = "mii"; |
cda13dd1 PG |
241 | interrupt-parent = <&ipic>; |
242 | phy-handle = <&phy2>; | |
23dd1cbf KP |
243 | }; |
244 | ||
245 | enet1: ethernet@25000 { | |
246 | cell-index = <1>; | |
247 | device_type = "network"; | |
248 | model = "eTSEC"; | |
249 | compatible = "gianfar"; | |
250 | reg = <0x25000 0x1000>; | |
251 | local-mac-address = [ 00 00 00 00 00 00 ]; | |
cda13dd1 | 252 | interrupts = <35 0x8 36 0x8 37 0x8>; |
23dd1cbf | 253 | phy-connection-type = "mii"; |
cda13dd1 | 254 | interrupt-parent = <&ipic>; |
f17c6323 | 255 | fixed-link = <1 1 1000 0 0>; |
23dd1cbf KP |
256 | }; |
257 | ||
258 | serial0: serial@4500 { | |
259 | cell-index = <0>; | |
260 | device_type = "serial"; | |
261 | compatible = "ns16550"; | |
262 | reg = <0x4500 0x100>; | |
263 | clock-frequency = <0>; | |
cda13dd1 PG |
264 | interrupts = <9 0x8>; |
265 | interrupt-parent = <&ipic>; | |
23dd1cbf KP |
266 | }; |
267 | ||
268 | serial1: serial@4600 { | |
269 | cell-index = <1>; | |
270 | device_type = "serial"; | |
271 | compatible = "ns16550"; | |
272 | reg = <0x4600 0x100>; | |
273 | clock-frequency = <0>; | |
cda13dd1 PG |
274 | interrupts = <10 0x8>; |
275 | interrupt-parent = <&ipic>; | |
23dd1cbf KP |
276 | }; |
277 | ||
278 | crypto@30000 { | |
3fd44736 KP |
279 | compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", |
280 | "fsl,sec2.1", "fsl,sec2.0"; | |
23dd1cbf | 281 | reg = <0x30000 0x10000>; |
cda13dd1 PG |
282 | interrupts = <11 0x8>; |
283 | interrupt-parent = <&ipic>; | |
3fd44736 KP |
284 | fsl,num-channels = <4>; |
285 | fsl,channel-fifo-len = <24>; | |
286 | fsl,exec-units-mask = <0x9fe>; | |
287 | fsl,descriptor-types-mask = <0x3ab0ebf>; | |
23dd1cbf KP |
288 | }; |
289 | ||
290 | /* IPIC | |
291 | * interrupts cell = <intr #, sense> | |
292 | * sense values match linux IORESOURCE_IRQ_* defines: | |
293 | * sense == 8: Level, low assertion | |
294 | * sense == 2: Edge, high-to-low change | |
295 | */ | |
296 | ipic: interrupt-controller@700 { | |
297 | compatible = "fsl,ipic"; | |
298 | interrupt-controller; | |
299 | #address-cells = <0>; | |
300 | #interrupt-cells = <2>; | |
301 | reg = <0x700 0x100>; | |
302 | }; | |
303 | }; | |
304 | ||
305 | pci0: pci@e0008500 { | |
306 | interrupt-map-mask = <0xf800 0 0 7>; | |
307 | interrupt-map = < | |
308 | /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ | |
309 | ||
310 | /* IDSEL AD14 IRQ6 inta */ | |
cda13dd1 | 311 | 0x7000 0x0 0x0 0x1 &ipic 22 0x8 |
23dd1cbf KP |
312 | |
313 | /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ | |
cda13dd1 PG |
314 | 0x7800 0x0 0x0 0x1 &ipic 21 0x8 |
315 | 0x7800 0x0 0x0 0x2 &ipic 22 0x8 | |
316 | 0x7800 0x0 0x0 0x4 &ipic 23 0x8 | |
23dd1cbf KP |
317 | |
318 | /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ | |
cda13dd1 PG |
319 | 0xE000 0x0 0x0 0x1 &ipic 23 0x8 |
320 | 0xE000 0x0 0x0 0x2 &ipic 21 0x8 | |
321 | 0xE000 0x0 0x0 0x3 &ipic 22 0x8>; | |
322 | interrupt-parent = <&ipic>; | |
323 | interrupts = <66 0x8>; | |
23dd1cbf | 324 | bus-range = <0 0>; |
cda13dd1 PG |
325 | ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 |
326 | 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | |
327 | 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; | |
23dd1cbf KP |
328 | clock-frequency = <66666666>; |
329 | #interrupt-cells = <1>; | |
330 | #size-cells = <2>; | |
331 | #address-cells = <3>; | |
5b70a097 JR |
332 | reg = <0xe0008500 0x100 /* internal registers */ |
333 | 0xe0008300 0x8>; /* config space access registers */ | |
23dd1cbf KP |
334 | compatible = "fsl,mpc8349-pci"; |
335 | device_type = "pci"; | |
336 | }; | |
337 | }; |