[mirror_ubuntu-eoan-kernel.git] / arch / powerpc / boot / dts / mpc8560ads.dts

/*
 * MPC8560 ADS Device Tree Source
 *
 * Copyright 2006, 2008 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/dts-v1/;

/ {
	model = "MPC8560ADS";
	compatible = "MPC8560ADS", "MPC85xxADS";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		ethernet2 = &enet2;
		ethernet3 = &enet3;
		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8560@0 {
			device_type = "cpu";
			reg = <0x0>;
			d-cache-line-size = <32>;	// 32 bytes
			i-cache-line-size = <32>;	// 32 bytes
			d-cache-size = <0x8000>;		// L1, 32K
			i-cache-size = <0x8000>;		// L1, 32K
			timebase-frequency = <82500000>;
			bus-frequency = <330000000>;
			clock-frequency = <825000000>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x10000000>;
	};

	soc8560@e0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		ranges = <0x0 0xe0000000 0x100000>;
		reg = <0xe0000000 0x200>;
		bus-frequency = <330000000>;

		memory-controller@2000 {
			compatible = "fsl,8540-memory-controller";
			reg = <0x2000 0x1000>;
			interrupt-parent = <&mpic>;
			interrupts = <18 2>;
		};

		l2-cache-controller@20000 {
			compatible = "fsl,8540-l2-cache-controller";
			reg = <0x20000 0x1000>;
			cache-line-size = <32>;	// 32 bytes
			cache-size = <0x40000>;	// L2, 256K
			interrupt-parent = <&mpic>;
			interrupts = <16 2>;
		};

		mdio@24520 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,gianfar-mdio";
			reg = <0x24520 0x20>;

			phy0: ethernet-phy@0 {
				interrupt-parent = <&mpic>;
				interrupts = <5 1>;
				reg = <0x0>;
				device_type = "ethernet-phy";
			};
			phy1: ethernet-phy@1 {
				interrupt-parent = <&mpic>;
				interrupts = <5 1>;
				reg = <0x1>;
				device_type = "ethernet-phy";
			};
			phy2: ethernet-phy@2 {
				interrupt-parent = <&mpic>;
				interrupts = <7 1>;
				reg = <0x2>;
				device_type = "ethernet-phy";
			};
			phy3: ethernet-phy@3 {
				interrupt-parent = <&mpic>;
				interrupts = <7 1>;
				reg = <0x3>;
				device_type = "ethernet-phy";
			};
		};

		enet0: ethernet@24000 {
			cell-index = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x24000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <29 2 30 2 34 2>;
			interrupt-parent = <&mpic>;
			phy-handle = <&phy0>;
		};

		enet1: ethernet@25000 {
			cell-index = <1>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x25000 0x1000>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <35 2 36 2 40 2>;
			interrupt-parent = <&mpic>;
			phy-handle = <&phy1>;
		};

		mpic: pic@40000 {
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <0x40000 0x40000>;
			compatible = "chrp,open-pic";
			device_type = "open-pic";
		};

		cpm@919c0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
			reg = <0x919c0 0x30>;
			ranges;

			muram@80000 {
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0x0 0x80000 0x10000>;

				data@0 {
					compatible = "fsl,cpm-muram-data";
					reg = <0x0 0x4000 0x9000 0x2000>;
				};
			};

			brg@919f0 {
				compatible = "fsl,mpc8560-brg",
				             "fsl,cpm2-brg",
				             "fsl,cpm-brg";
				reg = <0x919f0 0x10 0x915f0 0x10>;
				clock-frequency = <165000000>;
			};

			cpmpic: pic@90c00 {
				interrupt-controller;
				#address-cells = <0>;
				#interrupt-cells = <2>;
				interrupts = <46 2>;
				interrupt-parent = <&mpic>;
				reg = <0x90c00 0x80>;
				compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
			};

			serial0: serial@91a00 {
				device_type = "serial";
				compatible = "fsl,mpc8560-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <0x91a00 0x20 0x88000 0x100>;
				fsl,cpm-brg = <1>;
				fsl,cpm-command = <0x800000>;
				current-speed = <115200>;
				interrupts = <40 8>;
				interrupt-parent = <&cpmpic>;
			};

			serial1: serial@91a20 {
				device_type = "serial";
				compatible = "fsl,mpc8560-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <0x91a20 0x20 0x88100 0x100>;
				fsl,cpm-brg = <2>;
				fsl,cpm-command = <0x4a00000>;
				current-speed = <115200>;
				interrupts = <41 8>;
				interrupt-parent = <&cpmpic>;
			};

			enet2: ethernet@91320 {
				device_type = "network";
				compatible = "fsl,mpc8560-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
				local-mac-address = [ 00 00 00 00 00 00 ];
				fsl,cpm-command = <0x16200300>;
				interrupts = <33 8>;
				interrupt-parent = <&cpmpic>;
				phy-handle = <&phy2>;
			};

			enet3: ethernet@91340 {
				device_type = "network";
				compatible = "fsl,mpc8560-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
				local-mac-address = [ 00 00 00 00 00 00 ];
				fsl,cpm-command = <0x1a400300>;
				interrupts = <34 8>;
				interrupt-parent = <&cpmpic>;
				phy-handle = <&phy3>;
			};
		};
	};

	pci0: pci@e0008000 {
		cell-index = <0>;
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
		device_type = "pci";
		reg = <0xe0008000 0x1000>;
		clock-frequency = <66666666>;
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <

				/* IDSEL 0x2 */
				 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
				 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
				 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
				 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1

				/* IDSEL 0x3 */
				 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
				 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
				 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
				 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1

				/* IDSEL 0x4 */
				 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
				 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
				 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
				 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1

				/* IDSEL 0x5  */
				 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
				 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
				 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
				 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1

				/* IDSEL 12 */
				 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
				 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
				 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
				 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1

				/* IDSEL 13 */
				 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
				 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
				 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
				 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1

				/* IDSEL 14*/
				 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
				 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
				 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
				 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1

				/* IDSEL 15 */
				 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
				 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
				 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
				 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1

				/* IDSEL 18 */
				 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
				 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
				 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
				 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1

				/* IDSEL 19 */
				 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
				 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
				 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
				 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1

				/* IDSEL 20 */
				 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
				 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
				 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
				 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1

				/* IDSEL 21 */
				 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
				 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
				 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
				 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;

		interrupt-parent = <&mpic>;
		interrupts = <24 2>;
		bus-range = <0 0>;
		ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
			  0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
	};
};
Commit	Line	Data
902f392d VB	1	/*
	2	* MPC8560 ADS Device Tree Source
	3	*
32f960e9	4	* Copyright 2006, 2008 Freescale Semiconductor Inc.
902f392d VB	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; either version 2 of the License, or (at your
	9	* option) any later version.
	10	*/
	11
32f960e9	12	/dts-v1/;
902f392d VB	13
	14	/ {
	15	model = "MPC8560ADS";
52094879	16	compatible = "MPC8560ADS", "MPC85xxADS";
902f392d VB	17	#address-cells = <1>;
902f392d VB	18	#size-cells = <1>;
902f392d	19
ea082fa9 KG	20	aliases {
	21	ethernet0 = &enet0;
	22	ethernet1 = &enet1;
	23	ethernet2 = &enet2;
	24	ethernet3 = &enet3;
	25	serial0 = &serial0;
	26	serial1 = &serial1;
	27	pci0 = &pci0;
	28	};
	29
902f392d	30	cpus {
902f392d VB	31	#address-cells = <1>;
902f392d VB	32	#size-cells = <0>;
902f392d VB	33
	34	PowerPC,8560@0 {
	35	device_type = "cpu";
32f960e9 KG	36	reg = <0x0>;
	37	d-cache-line-size = <32>; // 32 bytes
	38	i-cache-line-size = <32>; // 32 bytes
	39	d-cache-size = <0x8000>; // L1, 32K
	40	i-cache-size = <0x8000>; // L1, 32K
	41	timebase-frequency = <82500000>;
	42	bus-frequency = <330000000>;
	43	clock-frequency = <825000000>;
902f392d VB	44	};
	45	};
	46
	47	memory {
	48	device_type = "memory";
32f960e9	49	reg = <0x0 0x10000000>;
902f392d VB	50	};
	51
	52	soc8560@e0000000 {
	53	#address-cells = <1>;
	54	#size-cells = <1>;
902f392d	55	device_type = "soc";
32f960e9 KG	56	ranges = <0x0 0xe0000000 0x100000>;
	57	reg = <0xe0000000 0x200>;
	58	bus-frequency = <330000000>;
902f392d	59
50cf6707 DJ	60	memory-controller@2000 {
50cf6707 DJ	61	compatible = "fsl,8540-memory-controller";
32f960e9	62	reg = <0x2000 0x1000>;
50cf6707	63	interrupt-parent = <&mpic>;
32f960e9	64	interrupts = <18 2>;
50cf6707 DJ	65	};
	66
	67	l2-cache-controller@20000 {
	68	compatible = "fsl,8540-l2-cache-controller";
32f960e9 KG	69	reg = <0x20000 0x1000>;
	70	cache-line-size = <32>; // 32 bytes
	71	cache-size = <0x40000>; // L2, 256K
50cf6707	72	interrupt-parent = <&mpic>;
32f960e9	73	interrupts = <16 2>;
50cf6707 DJ	74	};
50cf6707 DJ	75
902f392d	76	mdio@24520 {
902f392d VB	77	#address-cells = <1>;
902f392d VB	78	#size-cells = <0>;
e77b28eb	79	compatible = "fsl,gianfar-mdio";
32f960e9	80	reg = <0x24520 0x20>;
e77b28eb	81
52094879 KG	82	phy0: ethernet-phy@0 {
52094879 KG	83	interrupt-parent = <&mpic>;
b533f8ae	84	interrupts = <5 1>;
32f960e9	85	reg = <0x0>;
902f392d VB	86	device_type = "ethernet-phy";
902f392d VB	87	};
52094879 KG	88	phy1: ethernet-phy@1 {
52094879 KG	89	interrupt-parent = <&mpic>;
b533f8ae	90	interrupts = <5 1>;
32f960e9	91	reg = <0x1>;
902f392d VB	92	device_type = "ethernet-phy";
902f392d VB	93	};
52094879 KG	94	phy2: ethernet-phy@2 {
52094879 KG	95	interrupt-parent = <&mpic>;
b533f8ae	96	interrupts = <7 1>;
32f960e9	97	reg = <0x2>;
902f392d VB	98	device_type = "ethernet-phy";
902f392d VB	99	};
52094879 KG	100	phy3: ethernet-phy@3 {
52094879 KG	101	interrupt-parent = <&mpic>;
b533f8ae	102	interrupts = <7 1>;
32f960e9	103	reg = <0x3>;
902f392d VB	104	device_type = "ethernet-phy";
	105	};
	106	};
	107
e77b28eb KG	108	enet0: ethernet@24000 {
e77b28eb KG	109	cell-index = <0>;
902f392d VB	110	device_type = "network";
	111	model = "TSEC";
	112	compatible = "gianfar";
32f960e9	113	reg = <0x24000 0x1000>;
eae98266	114	local-mac-address = [ 00 00 00 00 00 00 ];
32f960e9	115	interrupts = <29 2 30 2 34 2>;
52094879 KG	116	interrupt-parent = <&mpic>;
52094879 KG	117	phy-handle = <&phy0>;
902f392d VB	118	};
902f392d VB	119
e77b28eb KG	120	enet1: ethernet@25000 {
e77b28eb KG	121	cell-index = <1>;
902f392d VB	122	device_type = "network";
	123	model = "TSEC";
	124	compatible = "gianfar";
32f960e9	125	reg = <0x25000 0x1000>;
eae98266	126	local-mac-address = [ 00 00 00 00 00 00 ];
32f960e9	127	interrupts = <35 2 36 2 40 2>;
52094879 KG	128	interrupt-parent = <&mpic>;
52094879 KG	129	phy-handle = <&phy1>;
902f392d VB	130	};
902f392d VB	131
52094879	132	mpic: pic@40000 {
902f392d VB	133	interrupt-controller;
	134	#address-cells = <0>;
	135	#interrupt-cells = <2>;
32f960e9	136	reg = <0x40000 0x40000>;
acd4b715	137	compatible = "chrp,open-pic";
902f392d VB	138	device_type = "open-pic";
	139	};
	140
8abc8f5f	141	cpm@919c0 {
902f392d VB	142	#address-cells = <1>;
902f392d VB	143	#size-cells = <1>;
8abc8f5f	144	compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
32f960e9	145	reg = <0x919c0 0x30>;
8abc8f5f SW	146	ranges;
	147
	148	muram@80000 {
	149	#address-cells = <1>;
	150	#size-cells = <1>;
32f960e9	151	ranges = <0x0 0x80000 0x10000>;
8abc8f5f SW	152
	153	data@0 {
	154	compatible = "fsl,cpm-muram-data";
32f960e9	155	reg = <0x0 0x4000 0x9000 0x2000>;
8abc8f5f SW	156	};
	157	};
	158
	159	brg@919f0 {
	160	compatible = "fsl,mpc8560-brg",
	161	"fsl,cpm2-brg",
	162	"fsl,cpm-brg";
32f960e9 KG	163	reg = <0x919f0 0x10 0x915f0 0x10>;
32f960e9 KG	164	clock-frequency = <165000000>;
8abc8f5f	165	};
902f392d	166
52094879	167	cpmpic: pic@90c00 {
902f392d VB	168	interrupt-controller;
	169	#address-cells = <0>;
	170	#interrupt-cells = <2>;
32f960e9	171	interrupts = <46 2>;
52094879	172	interrupt-parent = <&mpic>;
32f960e9	173	reg = <0x90c00 0x80>;
8abc8f5f	174	compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
902f392d VB	175	};
902f392d VB	176
ea082fa9	177	serial0: serial@91a00 {
902f392d	178	device_type = "serial";
8abc8f5f SW	179	compatible = "fsl,mpc8560-scc-uart",
8abc8f5f SW	180	"fsl,cpm2-scc-uart";
32f960e9	181	reg = <0x91a00 0x20 0x88000 0x100>;
8abc8f5f	182	fsl,cpm-brg = <1>;
32f960e9 KG	183	fsl,cpm-command = <0x800000>;
	184	current-speed = <115200>;
	185	interrupts = <40 8>;
52094879	186	interrupt-parent = <&cpmpic>;
902f392d VB	187	};
902f392d VB	188
ea082fa9	189	serial1: serial@91a20 {
902f392d	190	device_type = "serial";
8abc8f5f SW	191	compatible = "fsl,mpc8560-scc-uart",
8abc8f5f SW	192	"fsl,cpm2-scc-uart";
32f960e9	193	reg = <0x91a20 0x20 0x88100 0x100>;
8abc8f5f	194	fsl,cpm-brg = <2>;
32f960e9 KG	195	fsl,cpm-command = <0x4a00000>;
	196	current-speed = <115200>;
	197	interrupts = <41 8>;
52094879	198	interrupt-parent = <&cpmpic>;
902f392d VB	199	};
902f392d VB	200
e77b28eb	201	enet2: ethernet@91320 {
902f392d	202	device_type = "network";
8abc8f5f SW	203	compatible = "fsl,mpc8560-fcc-enet",
8abc8f5f SW	204	"fsl,cpm2-fcc-enet";
32f960e9	205	reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
eae98266	206	local-mac-address = [ 00 00 00 00 00 00 ];
32f960e9 KG	207	fsl,cpm-command = <0x16200300>;
32f960e9 KG	208	interrupts = <33 8>;
52094879 KG	209	interrupt-parent = <&cpmpic>;
52094879 KG	210	phy-handle = <&phy2>;
902f392d VB	211	};
902f392d VB	212
e77b28eb	213	enet3: ethernet@91340 {
902f392d	214	device_type = "network";
8abc8f5f SW	215	compatible = "fsl,mpc8560-fcc-enet",
8abc8f5f SW	216	"fsl,cpm2-fcc-enet";
32f960e9	217	reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
eae98266	218	local-mac-address = [ 00 00 00 00 00 00 ];
32f960e9 KG	219	fsl,cpm-command = <0x1a400300>;
32f960e9 KG	220	interrupts = <34 8>;
52094879 KG	221	interrupt-parent = <&cpmpic>;
52094879 KG	222	phy-handle = <&phy3>;
902f392d VB	223	};
	224	};
	225	};
1b3c5cda	226
ea082fa9 KG	227	pci0: pci@e0008000 {
ea082fa9 KG	228	cell-index = <0>;
1b3c5cda KG	229	#interrupt-cells = <1>;
	230	#size-cells = <2>;
	231	#address-cells = <3>;
	232	compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
	233	device_type = "pci";
32f960e9 KG	234	reg = <0xe0008000 0x1000>;
	235	clock-frequency = <66666666>;
	236	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
1b3c5cda KG	237	interrupt-map = <
	238
	239	/* IDSEL 0x2 */
32f960e9 KG	240	0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
	241	0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
	242	0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
	243	0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
1b3c5cda KG	244
1b3c5cda KG	245	/* IDSEL 0x3 */
32f960e9 KG	246	0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
	247	0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
	248	0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
	249	0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
1b3c5cda KG	250
1b3c5cda KG	251	/* IDSEL 0x4 */
32f960e9 KG	252	0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
	253	0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
	254	0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
	255	0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
1b3c5cda KG	256
1b3c5cda KG	257	/* IDSEL 0x5 */
32f960e9 KG	258	0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
	259	0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
	260	0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
	261	0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
1b3c5cda KG	262
1b3c5cda KG	263	/* IDSEL 12 */
32f960e9 KG	264	0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
	265	0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
	266	0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
	267	0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
1b3c5cda KG	268
1b3c5cda KG	269	/* IDSEL 13 */
32f960e9 KG	270	0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
	271	0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
	272	0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
	273	0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
1b3c5cda KG	274
1b3c5cda KG	275	/* IDSEL 14*/
32f960e9 KG	276	0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
	277	0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
	278	0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
	279	0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
1b3c5cda KG	280
1b3c5cda KG	281	/* IDSEL 15 */
32f960e9 KG	282	0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
	283	0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
	284	0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
	285	0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
1b3c5cda KG	286
1b3c5cda KG	287	/* IDSEL 18 */
32f960e9 KG	288	0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
	289	0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
	290	0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
	291	0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
1b3c5cda KG	292
1b3c5cda KG	293	/* IDSEL 19 */
32f960e9 KG	294	0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
	295	0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
	296	0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
	297	0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
1b3c5cda KG	298
1b3c5cda KG	299	/* IDSEL 20 */
32f960e9 KG	300	0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
	301	0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
	302	0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
	303	0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
1b3c5cda KG	304
1b3c5cda KG	305	/* IDSEL 21 */
32f960e9 KG	306	0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
	307	0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
	308	0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
	309	0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
1b3c5cda KG	310
1b3c5cda KG	311	interrupt-parent = <&mpic>;
32f960e9	312	interrupts = <24 2>;
1b3c5cda	313	bus-range = <0 0>;
32f960e9 KG	314	ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
32f960e9 KG	315	0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
1b3c5cda	316	};
902f392d	317	};