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Commit | Line | Data |
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707ba16f JL |
1 | /* |
2 | * MPC8641 HPCN Device Tree Source | |
3 | * | |
4 | * Copyright 2006 Freescale Semiconductor Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; either version 2 of the License, or (at your | |
9 | * option) any later version. | |
10 | */ | |
11 | ||
6e050d4e | 12 | /dts-v1/; |
707ba16f JL |
13 | |
14 | / { | |
15 | model = "MPC8641HPCN"; | |
06f35b4b | 16 | compatible = "fsl,mpc8641hpcn"; |
707ba16f JL |
17 | #address-cells = <1>; |
18 | #size-cells = <1>; | |
19 | ||
1c1d1672 JL |
20 | aliases { |
21 | ethernet0 = &enet0; | |
22 | ethernet1 = &enet1; | |
23 | ethernet2 = &enet2; | |
24 | ethernet3 = &enet3; | |
25 | serial0 = &serial0; | |
26 | serial1 = &serial1; | |
27 | pci0 = &pci0; | |
28 | pci1 = &pci1; | |
47f80a32 BB |
29 | /* |
30 | * Only one of Rapid IO or PCI can be present due to HW limitations and | |
31 | * due to the fact that the 2 now share address space in the new memory | |
32 | * map. The most likely case is that we have PCI, so comment out the | |
33 | * rapidio node. Leave it here for reference. | |
34 | */ | |
35 | /* rapidio0 = &rapidio0; */ | |
1c1d1672 JL |
36 | }; |
37 | ||
707ba16f | 38 | cpus { |
707ba16f JL |
39 | #address-cells = <1>; |
40 | #size-cells = <0>; | |
41 | ||
42 | PowerPC,8641@0 { | |
43 | device_type = "cpu"; | |
44 | reg = <0>; | |
6e050d4e JL |
45 | d-cache-line-size = <32>; |
46 | i-cache-line-size = <32>; | |
47 | d-cache-size = <32768>; // L1 | |
48 | i-cache-size = <32768>; // L1 | |
49 | timebase-frequency = <0>; // From uboot | |
707ba16f JL |
50 | bus-frequency = <0>; // From uboot |
51 | clock-frequency = <0>; // From uboot | |
707ba16f JL |
52 | }; |
53 | PowerPC,8641@1 { | |
54 | device_type = "cpu"; | |
55 | reg = <1>; | |
6e050d4e JL |
56 | d-cache-line-size = <32>; |
57 | i-cache-line-size = <32>; | |
58 | d-cache-size = <32768>; | |
59 | i-cache-size = <32768>; | |
60 | timebase-frequency = <0>; // From uboot | |
707ba16f JL |
61 | bus-frequency = <0>; // From uboot |
62 | clock-frequency = <0>; // From uboot | |
707ba16f JL |
63 | }; |
64 | }; | |
65 | ||
66 | memory { | |
67 | device_type = "memory"; | |
6e050d4e | 68 | reg = <0x00000000 0x40000000>; // 1G at 0x0 |
707ba16f JL |
69 | }; |
70 | ||
47f80a32 | 71 | localbus@ffe05000 { |
0ac247d5 WF |
72 | #address-cells = <2>; |
73 | #size-cells = <1>; | |
74 | compatible = "fsl,mpc8641-localbus", "simple-bus"; | |
47f80a32 | 75 | reg = <0xffe05000 0x1000>; |
6e050d4e | 76 | interrupts = <19 2>; |
0ac247d5 WF |
77 | interrupt-parent = <&mpic>; |
78 | ||
47f80a32 BB |
79 | ranges = <0 0 0xef800000 0x00800000 |
80 | 2 0 0xffdf8000 0x00008000 | |
81 | 3 0 0xffdf0000 0x00008000>; | |
0ac247d5 WF |
82 | |
83 | flash@0,0 { | |
84 | compatible = "cfi-flash"; | |
6e050d4e | 85 | reg = <0 0 0x00800000>; |
0ac247d5 WF |
86 | bank-width = <2>; |
87 | device-width = <2>; | |
88 | #address-cells = <1>; | |
89 | #size-cells = <1>; | |
90 | partition@0 { | |
91 | label = "kernel"; | |
6e050d4e | 92 | reg = <0x00000000 0x00300000>; |
0ac247d5 WF |
93 | }; |
94 | partition@300000 { | |
95 | label = "firmware b"; | |
6e050d4e | 96 | reg = <0x00300000 0x00100000>; |
0ac247d5 WF |
97 | read-only; |
98 | }; | |
99 | partition@400000 { | |
100 | label = "fs"; | |
6e050d4e | 101 | reg = <0x00400000 0x00300000>; |
0ac247d5 WF |
102 | }; |
103 | partition@700000 { | |
104 | label = "firmware a"; | |
6e050d4e | 105 | reg = <0x00700000 0x00100000>; |
0ac247d5 WF |
106 | read-only; |
107 | }; | |
108 | }; | |
109 | }; | |
110 | ||
47f80a32 | 111 | soc8641@ffe00000 { |
707ba16f JL |
112 | #address-cells = <1>; |
113 | #size-cells = <1>; | |
707ba16f | 114 | device_type = "soc"; |
0ac247d5 | 115 | compatible = "simple-bus"; |
47f80a32 BB |
116 | ranges = <0x00000000 0xffe00000 0x00100000>; |
117 | reg = <0xffe00000 0x00001000>; // CCSRBAR | |
707ba16f JL |
118 | bus-frequency = <0>; |
119 | ||
120 | i2c@3000 { | |
ec9686c4 KG |
121 | #address-cells = <1>; |
122 | #size-cells = <0>; | |
123 | cell-index = <0>; | |
707ba16f | 124 | compatible = "fsl-i2c"; |
6e050d4e JL |
125 | reg = <0x3000 0x100>; |
126 | interrupts = <43 2>; | |
6d9065d8 | 127 | interrupt-parent = <&mpic>; |
707ba16f JL |
128 | dfsrr; |
129 | }; | |
130 | ||
131 | i2c@3100 { | |
ec9686c4 KG |
132 | #address-cells = <1>; |
133 | #size-cells = <0>; | |
134 | cell-index = <1>; | |
707ba16f | 135 | compatible = "fsl-i2c"; |
6e050d4e JL |
136 | reg = <0x3100 0x100>; |
137 | interrupts = <43 2>; | |
6d9065d8 | 138 | interrupt-parent = <&mpic>; |
707ba16f JL |
139 | dfsrr; |
140 | }; | |
141 | ||
dee80553 KG |
142 | dma@21300 { |
143 | #address-cells = <1>; | |
144 | #size-cells = <1>; | |
145 | compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; | |
146 | reg = <0x21300 0x4>; | |
147 | ranges = <0x0 0x21100 0x200>; | |
148 | cell-index = <0>; | |
149 | dma-channel@0 { | |
150 | compatible = "fsl,mpc8641-dma-channel", | |
151 | "fsl,eloplus-dma-channel"; | |
152 | reg = <0x0 0x80>; | |
153 | cell-index = <0>; | |
154 | interrupt-parent = <&mpic>; | |
155 | interrupts = <20 2>; | |
156 | }; | |
157 | dma-channel@80 { | |
158 | compatible = "fsl,mpc8641-dma-channel", | |
159 | "fsl,eloplus-dma-channel"; | |
160 | reg = <0x80 0x80>; | |
161 | cell-index = <1>; | |
162 | interrupt-parent = <&mpic>; | |
163 | interrupts = <21 2>; | |
164 | }; | |
165 | dma-channel@100 { | |
166 | compatible = "fsl,mpc8641-dma-channel", | |
167 | "fsl,eloplus-dma-channel"; | |
168 | reg = <0x100 0x80>; | |
169 | cell-index = <2>; | |
170 | interrupt-parent = <&mpic>; | |
171 | interrupts = <22 2>; | |
172 | }; | |
173 | dma-channel@180 { | |
174 | compatible = "fsl,mpc8641-dma-channel", | |
175 | "fsl,eloplus-dma-channel"; | |
176 | reg = <0x180 0x80>; | |
177 | cell-index = <3>; | |
178 | interrupt-parent = <&mpic>; | |
179 | interrupts = <23 2>; | |
180 | }; | |
181 | }; | |
182 | ||
1c1d1672 | 183 | enet0: ethernet@24000 { |
d8bc55fb AV |
184 | #address-cells = <1>; |
185 | #size-cells = <1>; | |
e77b28eb | 186 | cell-index = <0>; |
707ba16f JL |
187 | device_type = "network"; |
188 | model = "TSEC"; | |
189 | compatible = "gianfar"; | |
6e050d4e | 190 | reg = <0x24000 0x1000>; |
d8bc55fb | 191 | ranges = <0x0 0x24000 0x1000>; |
eae98266 | 192 | local-mac-address = [ 00 00 00 00 00 00 ]; |
6e050d4e | 193 | interrupts = <29 2 30 2 34 2>; |
6d9065d8 | 194 | interrupt-parent = <&mpic>; |
b31a1d8b | 195 | tbi-handle = <&tbi0>; |
6d9065d8 | 196 | phy-handle = <&phy0>; |
cc65185d | 197 | phy-connection-type = "rgmii-id"; |
d8bc55fb AV |
198 | |
199 | mdio@520 { | |
200 | #address-cells = <1>; | |
201 | #size-cells = <0>; | |
202 | compatible = "fsl,gianfar-mdio"; | |
203 | reg = <0x520 0x20>; | |
204 | ||
205 | phy0: ethernet-phy@0 { | |
206 | interrupt-parent = <&mpic>; | |
207 | interrupts = <10 1>; | |
208 | reg = <0>; | |
209 | device_type = "ethernet-phy"; | |
210 | }; | |
211 | phy1: ethernet-phy@1 { | |
212 | interrupt-parent = <&mpic>; | |
213 | interrupts = <10 1>; | |
214 | reg = <1>; | |
215 | device_type = "ethernet-phy"; | |
216 | }; | |
217 | phy2: ethernet-phy@2 { | |
218 | interrupt-parent = <&mpic>; | |
219 | interrupts = <10 1>; | |
220 | reg = <2>; | |
221 | device_type = "ethernet-phy"; | |
222 | }; | |
223 | phy3: ethernet-phy@3 { | |
224 | interrupt-parent = <&mpic>; | |
225 | interrupts = <10 1>; | |
226 | reg = <3>; | |
227 | device_type = "ethernet-phy"; | |
228 | }; | |
229 | tbi0: tbi-phy@11 { | |
230 | reg = <0x11>; | |
231 | device_type = "tbi-phy"; | |
232 | }; | |
233 | }; | |
707ba16f JL |
234 | }; |
235 | ||
1c1d1672 | 236 | enet1: ethernet@25000 { |
d8bc55fb AV |
237 | #address-cells = <1>; |
238 | #size-cells = <1>; | |
e77b28eb | 239 | cell-index = <1>; |
707ba16f JL |
240 | device_type = "network"; |
241 | model = "TSEC"; | |
242 | compatible = "gianfar"; | |
6e050d4e | 243 | reg = <0x25000 0x1000>; |
d8bc55fb | 244 | ranges = <0x0 0x25000 0x1000>; |
eae98266 | 245 | local-mac-address = [ 00 00 00 00 00 00 ]; |
6e050d4e | 246 | interrupts = <35 2 36 2 40 2>; |
6d9065d8 | 247 | interrupt-parent = <&mpic>; |
b31a1d8b | 248 | tbi-handle = <&tbi1>; |
6d9065d8 | 249 | phy-handle = <&phy1>; |
cc65185d | 250 | phy-connection-type = "rgmii-id"; |
d8bc55fb AV |
251 | |
252 | mdio@520 { | |
253 | #address-cells = <1>; | |
254 | #size-cells = <0>; | |
255 | compatible = "fsl,gianfar-tbi"; | |
256 | reg = <0x520 0x20>; | |
257 | ||
258 | tbi1: tbi-phy@11 { | |
259 | reg = <0x11>; | |
260 | device_type = "tbi-phy"; | |
261 | }; | |
262 | }; | |
707ba16f JL |
263 | }; |
264 | ||
1c1d1672 | 265 | enet2: ethernet@26000 { |
d8bc55fb AV |
266 | #address-cells = <1>; |
267 | #size-cells = <1>; | |
e77b28eb | 268 | cell-index = <2>; |
707ba16f JL |
269 | device_type = "network"; |
270 | model = "TSEC"; | |
271 | compatible = "gianfar"; | |
6e050d4e | 272 | reg = <0x26000 0x1000>; |
d8bc55fb | 273 | ranges = <0x0 0x26000 0x1000>; |
eae98266 | 274 | local-mac-address = [ 00 00 00 00 00 00 ]; |
6e050d4e | 275 | interrupts = <31 2 32 2 33 2>; |
6d9065d8 | 276 | interrupt-parent = <&mpic>; |
b31a1d8b | 277 | tbi-handle = <&tbi2>; |
6d9065d8 | 278 | phy-handle = <&phy2>; |
cc65185d | 279 | phy-connection-type = "rgmii-id"; |
d8bc55fb AV |
280 | |
281 | mdio@520 { | |
282 | #address-cells = <1>; | |
283 | #size-cells = <0>; | |
284 | compatible = "fsl,gianfar-tbi"; | |
285 | reg = <0x520 0x20>; | |
286 | ||
287 | tbi2: tbi-phy@11 { | |
288 | reg = <0x11>; | |
289 | device_type = "tbi-phy"; | |
290 | }; | |
291 | }; | |
707ba16f JL |
292 | }; |
293 | ||
1c1d1672 | 294 | enet3: ethernet@27000 { |
d8bc55fb AV |
295 | #address-cells = <1>; |
296 | #size-cells = <1>; | |
e77b28eb | 297 | cell-index = <3>; |
707ba16f JL |
298 | device_type = "network"; |
299 | model = "TSEC"; | |
300 | compatible = "gianfar"; | |
6e050d4e | 301 | reg = <0x27000 0x1000>; |
d8bc55fb | 302 | ranges = <0x0 0x27000 0x1000>; |
eae98266 | 303 | local-mac-address = [ 00 00 00 00 00 00 ]; |
6e050d4e | 304 | interrupts = <37 2 38 2 39 2>; |
6d9065d8 | 305 | interrupt-parent = <&mpic>; |
b31a1d8b | 306 | tbi-handle = <&tbi3>; |
6d9065d8 | 307 | phy-handle = <&phy3>; |
cc65185d | 308 | phy-connection-type = "rgmii-id"; |
d8bc55fb AV |
309 | |
310 | mdio@520 { | |
311 | #address-cells = <1>; | |
312 | #size-cells = <0>; | |
313 | compatible = "fsl,gianfar-tbi"; | |
314 | reg = <0x520 0x20>; | |
315 | ||
316 | tbi3: tbi-phy@11 { | |
317 | reg = <0x11>; | |
318 | device_type = "tbi-phy"; | |
319 | }; | |
320 | }; | |
707ba16f | 321 | }; |
1c1d1672 JL |
322 | |
323 | serial0: serial@4500 { | |
ea082fa9 | 324 | cell-index = <0>; |
707ba16f JL |
325 | device_type = "serial"; |
326 | compatible = "ns16550"; | |
6e050d4e | 327 | reg = <0x4500 0x100>; |
707ba16f | 328 | clock-frequency = <0>; |
6e050d4e | 329 | interrupts = <42 2>; |
6d9065d8 | 330 | interrupt-parent = <&mpic>; |
707ba16f JL |
331 | }; |
332 | ||
1c1d1672 | 333 | serial1: serial@4600 { |
ea082fa9 | 334 | cell-index = <1>; |
707ba16f JL |
335 | device_type = "serial"; |
336 | compatible = "ns16550"; | |
6e050d4e | 337 | reg = <0x4600 0x100>; |
707ba16f | 338 | clock-frequency = <0>; |
6e050d4e | 339 | interrupts = <28 2>; |
6d9065d8 | 340 | interrupt-parent = <&mpic>; |
707ba16f JL |
341 | }; |
342 | ||
1b3c5cda | 343 | mpic: pic@40000 { |
1b3c5cda KG |
344 | interrupt-controller; |
345 | #address-cells = <0>; | |
346 | #interrupt-cells = <2>; | |
6e050d4e | 347 | reg = <0x40000 0x40000>; |
1b3c5cda KG |
348 | compatible = "chrp,open-pic"; |
349 | device_type = "open-pic"; | |
1b3c5cda | 350 | }; |
e1c1575f KG |
351 | |
352 | global-utilities@e0000 { | |
353 | compatible = "fsl,mpc8641-guts"; | |
6e050d4e | 354 | reg = <0xe0000 0x1000>; |
e1c1575f KG |
355 | fsl,has-rstcr; |
356 | }; | |
1b3c5cda | 357 | }; |
707ba16f | 358 | |
47f80a32 | 359 | pci0: pcie@ffe08000 { |
1b3c5cda KG |
360 | compatible = "fsl,mpc8641-pcie"; |
361 | device_type = "pci"; | |
362 | #interrupt-cells = <1>; | |
363 | #size-cells = <2>; | |
364 | #address-cells = <3>; | |
47f80a32 | 365 | reg = <0xffe08000 0x1000>; |
6e050d4e JL |
366 | bus-range = <0x0 0xff>; |
367 | ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000 | |
47f80a32 | 368 | 0x01000000 0x0 0x00000000 0xffc00000 0x0 0x00010000>; |
6e050d4e | 369 | clock-frequency = <33333333>; |
1b3c5cda | 370 | interrupt-parent = <&mpic>; |
6e050d4e JL |
371 | interrupts = <24 2>; |
372 | interrupt-map-mask = <0xff00 0 0 7>; | |
1b3c5cda | 373 | interrupt-map = < |
bebfa06c | 374 | /* IDSEL 0x11 func 0 - PCI slot 1 */ |
6e050d4e JL |
375 | 0x8800 0 0 1 &mpic 2 1 |
376 | 0x8800 0 0 2 &mpic 3 1 | |
377 | 0x8800 0 0 3 &mpic 4 1 | |
378 | 0x8800 0 0 4 &mpic 1 1 | |
bebfa06c KG |
379 | |
380 | /* IDSEL 0x11 func 1 - PCI slot 1 */ | |
6e050d4e JL |
381 | 0x8900 0 0 1 &mpic 2 1 |
382 | 0x8900 0 0 2 &mpic 3 1 | |
383 | 0x8900 0 0 3 &mpic 4 1 | |
384 | 0x8900 0 0 4 &mpic 1 1 | |
bebfa06c KG |
385 | |
386 | /* IDSEL 0x11 func 2 - PCI slot 1 */ | |
6e050d4e JL |
387 | 0x8a00 0 0 1 &mpic 2 1 |
388 | 0x8a00 0 0 2 &mpic 3 1 | |
389 | 0x8a00 0 0 3 &mpic 4 1 | |
390 | 0x8a00 0 0 4 &mpic 1 1 | |
bebfa06c KG |
391 | |
392 | /* IDSEL 0x11 func 3 - PCI slot 1 */ | |
6e050d4e JL |
393 | 0x8b00 0 0 1 &mpic 2 1 |
394 | 0x8b00 0 0 2 &mpic 3 1 | |
395 | 0x8b00 0 0 3 &mpic 4 1 | |
396 | 0x8b00 0 0 4 &mpic 1 1 | |
bebfa06c KG |
397 | |
398 | /* IDSEL 0x11 func 4 - PCI slot 1 */ | |
6e050d4e JL |
399 | 0x8c00 0 0 1 &mpic 2 1 |
400 | 0x8c00 0 0 2 &mpic 3 1 | |
401 | 0x8c00 0 0 3 &mpic 4 1 | |
402 | 0x8c00 0 0 4 &mpic 1 1 | |
bebfa06c KG |
403 | |
404 | /* IDSEL 0x11 func 5 - PCI slot 1 */ | |
6e050d4e JL |
405 | 0x8d00 0 0 1 &mpic 2 1 |
406 | 0x8d00 0 0 2 &mpic 3 1 | |
407 | 0x8d00 0 0 3 &mpic 4 1 | |
408 | 0x8d00 0 0 4 &mpic 1 1 | |
bebfa06c KG |
409 | |
410 | /* IDSEL 0x11 func 6 - PCI slot 1 */ | |
6e050d4e JL |
411 | 0x8e00 0 0 1 &mpic 2 1 |
412 | 0x8e00 0 0 2 &mpic 3 1 | |
413 | 0x8e00 0 0 3 &mpic 4 1 | |
414 | 0x8e00 0 0 4 &mpic 1 1 | |
bebfa06c KG |
415 | |
416 | /* IDSEL 0x11 func 7 - PCI slot 1 */ | |
6e050d4e JL |
417 | 0x8f00 0 0 1 &mpic 2 1 |
418 | 0x8f00 0 0 2 &mpic 3 1 | |
419 | 0x8f00 0 0 3 &mpic 4 1 | |
420 | 0x8f00 0 0 4 &mpic 1 1 | |
bebfa06c KG |
421 | |
422 | /* IDSEL 0x12 func 0 - PCI slot 2 */ | |
6e050d4e JL |
423 | 0x9000 0 0 1 &mpic 3 1 |
424 | 0x9000 0 0 2 &mpic 4 1 | |
425 | 0x9000 0 0 3 &mpic 1 1 | |
426 | 0x9000 0 0 4 &mpic 2 1 | |
bebfa06c KG |
427 | |
428 | /* IDSEL 0x12 func 1 - PCI slot 2 */ | |
6e050d4e JL |
429 | 0x9100 0 0 1 &mpic 3 1 |
430 | 0x9100 0 0 2 &mpic 4 1 | |
431 | 0x9100 0 0 3 &mpic 1 1 | |
432 | 0x9100 0 0 4 &mpic 2 1 | |
bebfa06c KG |
433 | |
434 | /* IDSEL 0x12 func 2 - PCI slot 2 */ | |
6e050d4e JL |
435 | 0x9200 0 0 1 &mpic 3 1 |
436 | 0x9200 0 0 2 &mpic 4 1 | |
437 | 0x9200 0 0 3 &mpic 1 1 | |
438 | 0x9200 0 0 4 &mpic 2 1 | |
bebfa06c KG |
439 | |
440 | /* IDSEL 0x12 func 3 - PCI slot 2 */ | |
6e050d4e JL |
441 | 0x9300 0 0 1 &mpic 3 1 |
442 | 0x9300 0 0 2 &mpic 4 1 | |
443 | 0x9300 0 0 3 &mpic 1 1 | |
444 | 0x9300 0 0 4 &mpic 2 1 | |
bebfa06c KG |
445 | |
446 | /* IDSEL 0x12 func 4 - PCI slot 2 */ | |
6e050d4e JL |
447 | 0x9400 0 0 1 &mpic 3 1 |
448 | 0x9400 0 0 2 &mpic 4 1 | |
449 | 0x9400 0 0 3 &mpic 1 1 | |
450 | 0x9400 0 0 4 &mpic 2 1 | |
bebfa06c KG |
451 | |
452 | /* IDSEL 0x12 func 5 - PCI slot 2 */ | |
6e050d4e JL |
453 | 0x9500 0 0 1 &mpic 3 1 |
454 | 0x9500 0 0 2 &mpic 4 1 | |
455 | 0x9500 0 0 3 &mpic 1 1 | |
456 | 0x9500 0 0 4 &mpic 2 1 | |
bebfa06c KG |
457 | |
458 | /* IDSEL 0x12 func 6 - PCI slot 2 */ | |
6e050d4e JL |
459 | 0x9600 0 0 1 &mpic 3 1 |
460 | 0x9600 0 0 2 &mpic 4 1 | |
461 | 0x9600 0 0 3 &mpic 1 1 | |
462 | 0x9600 0 0 4 &mpic 2 1 | |
bebfa06c KG |
463 | |
464 | /* IDSEL 0x12 func 7 - PCI slot 2 */ | |
6e050d4e JL |
465 | 0x9700 0 0 1 &mpic 3 1 |
466 | 0x9700 0 0 2 &mpic 4 1 | |
467 | 0x9700 0 0 3 &mpic 1 1 | |
468 | 0x9700 0 0 4 &mpic 2 1 | |
707ba16f | 469 | |
1b3c5cda | 470 | // IDSEL 0x1c USB |
6e050d4e JL |
471 | 0xe000 0 0 1 &i8259 12 2 |
472 | 0xe100 0 0 2 &i8259 9 2 | |
473 | 0xe200 0 0 3 &i8259 10 2 | |
ba1616d9 | 474 | 0xe300 0 0 4 &i8259 11 2 |
707ba16f | 475 | |
1b3c5cda | 476 | // IDSEL 0x1d Audio |
6e050d4e | 477 | 0xe800 0 0 1 &i8259 6 2 |
707ba16f | 478 | |
1b3c5cda | 479 | // IDSEL 0x1e Legacy |
6e050d4e JL |
480 | 0xf000 0 0 1 &i8259 7 2 |
481 | 0xf100 0 0 1 &i8259 7 2 | |
1b3c5cda KG |
482 | |
483 | // IDSEL 0x1f IDE/SATA | |
6e050d4e JL |
484 | 0xf800 0 0 1 &i8259 14 2 |
485 | 0xf900 0 0 1 &i8259 5 2 | |
1b3c5cda KG |
486 | >; |
487 | ||
488 | pcie@0 { | |
489 | reg = <0 0 0 0 0>; | |
490 | #size-cells = <2>; | |
491 | #address-cells = <3>; | |
492 | device_type = "pci"; | |
6e050d4e JL |
493 | ranges = <0x02000000 0x0 0x80000000 |
494 | 0x02000000 0x0 0x80000000 | |
495 | 0x0 0x20000000 | |
1b3c5cda | 496 | |
6e050d4e JL |
497 | 0x01000000 0x0 0x00000000 |
498 | 0x01000000 0x0 0x00000000 | |
47f80a32 | 499 | 0x0 0x00010000>; |
dfac6faf WF |
500 | uli1575@0 { |
501 | reg = <0 0 0 0 0>; | |
502 | #size-cells = <2>; | |
503 | #address-cells = <3>; | |
6e050d4e JL |
504 | ranges = <0x02000000 0x0 0x80000000 |
505 | 0x02000000 0x0 0x80000000 | |
506 | 0x0 0x20000000 | |
507 | 0x01000000 0x0 0x00000000 | |
508 | 0x01000000 0x0 0x00000000 | |
47f80a32 | 509 | 0x0 0x00010000>; |
1b3c5cda KG |
510 | isa@1e { |
511 | device_type = "isa"; | |
512 | #interrupt-cells = <2>; | |
513 | #size-cells = <1>; | |
514 | #address-cells = <2>; | |
6e050d4e JL |
515 | reg = <0xf000 0 0 0 0>; |
516 | ranges = <1 0 0x01000000 0 0 | |
517 | 0x00001000>; | |
1b3c5cda | 518 | interrupt-parent = <&i8259>; |
dfac6faf | 519 | |
1b3c5cda | 520 | i8259: interrupt-controller@20 { |
6e050d4e JL |
521 | reg = <1 0x20 2 |
522 | 1 0xa0 2 | |
523 | 1 0x4d0 2>; | |
1b3c5cda KG |
524 | interrupt-controller; |
525 | device_type = "interrupt-controller"; | |
526 | #address-cells = <0>; | |
dfac6faf | 527 | #interrupt-cells = <2>; |
1b3c5cda KG |
528 | compatible = "chrp,iic"; |
529 | interrupts = <9 2>; | |
530 | interrupt-parent = <&mpic>; | |
531 | }; | |
dfac6faf | 532 | |
1b3c5cda KG |
533 | i8042@60 { |
534 | #size-cells = <0>; | |
535 | #address-cells = <1>; | |
6e050d4e JL |
536 | reg = <1 0x60 1 1 0x64 1>; |
537 | interrupts = <1 3 12 3>; | |
1b3c5cda KG |
538 | interrupt-parent = |
539 | <&i8259>; | |
dfac6faf | 540 | |
1b3c5cda KG |
541 | keyboard@0 { |
542 | reg = <0>; | |
543 | compatible = "pnpPNP,303"; | |
dfac6faf WF |
544 | }; |
545 | ||
1b3c5cda KG |
546 | mouse@1 { |
547 | reg = <1>; | |
548 | compatible = "pnpPNP,f03"; | |
dfac6faf | 549 | }; |
1b3c5cda | 550 | }; |
dfac6faf | 551 | |
1b3c5cda KG |
552 | rtc@70 { |
553 | compatible = | |
554 | "pnpPNP,b00"; | |
6e050d4e | 555 | reg = <1 0x70 2>; |
1b3c5cda KG |
556 | }; |
557 | ||
558 | gpio@400 { | |
6e050d4e | 559 | reg = <1 0x400 0x80>; |
dfac6faf WF |
560 | }; |
561 | }; | |
707ba16f | 562 | }; |
707ba16f | 563 | }; |
e0e3c8d4 | 564 | |
1b3c5cda KG |
565 | }; |
566 | ||
47f80a32 | 567 | pci1: pcie@ffe09000 { |
1b3c5cda KG |
568 | compatible = "fsl,mpc8641-pcie"; |
569 | device_type = "pci"; | |
570 | #interrupt-cells = <1>; | |
571 | #size-cells = <2>; | |
572 | #address-cells = <3>; | |
47f80a32 | 573 | reg = <0xffe09000 0x1000>; |
6e050d4e JL |
574 | bus-range = <0 0xff>; |
575 | ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 | |
47f80a32 | 576 | 0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>; |
6e050d4e | 577 | clock-frequency = <33333333>; |
1b3c5cda | 578 | interrupt-parent = <&mpic>; |
6e050d4e JL |
579 | interrupts = <25 2>; |
580 | interrupt-map-mask = <0xf800 0 0 7>; | |
1b3c5cda KG |
581 | interrupt-map = < |
582 | /* IDSEL 0x0 */ | |
6e050d4e JL |
583 | 0x0000 0 0 1 &mpic 4 1 |
584 | 0x0000 0 0 2 &mpic 5 1 | |
585 | 0x0000 0 0 3 &mpic 6 1 | |
586 | 0x0000 0 0 4 &mpic 7 1 | |
1b3c5cda KG |
587 | >; |
588 | pcie@0 { | |
589 | reg = <0 0 0 0 0>; | |
e0e3c8d4 ZW |
590 | #size-cells = <2>; |
591 | #address-cells = <3>; | |
1b3c5cda | 592 | device_type = "pci"; |
6e050d4e JL |
593 | ranges = <0x02000000 0x0 0xa0000000 |
594 | 0x02000000 0x0 0xa0000000 | |
595 | 0x0 0x20000000 | |
e0e3c8d4 | 596 | |
6e050d4e JL |
597 | 0x01000000 0x0 0x00000000 |
598 | 0x01000000 0x0 0x00000000 | |
47f80a32 | 599 | 0x0 0x00010000>; |
707ba16f JL |
600 | }; |
601 | }; | |
47f80a32 BB |
602 | /* |
603 | rapidio0: rapidio@ffec0000 { | |
56fde1ff ZW |
604 | #address-cells = <2>; |
605 | #size-cells = <2>; | |
606 | compatible = "fsl,rapidio-delta"; | |
47f80a32 BB |
607 | reg = <0xffec0000 0x20000>; |
608 | ranges = <0 0 0x80000000 0 0x20000000>; | |
56fde1ff | 609 | interrupt-parent = <&mpic>; |
47f80a32 BB |
610 | // err_irq bell_outb_irq bell_inb_irq |
611 | // msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq | |
56fde1ff ZW |
612 | interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>; |
613 | }; | |
47f80a32 BB |
614 | */ |
615 | ||
707ba16f | 616 | }; |