[mirror_ubuntu-eoan-kernel.git] / arch / powerpc / boot / dts / pq2fads.dts

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
 *
 * Copyright 2007,2008 Freescale Semiconductor Inc.
 */

/dts-v1/;

/ {
	model = "pq2fads";
	compatible = "fsl,pq2fads";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		serial0 = &serial0;
		serial1 = &serial1;
		pci0 = &pci0;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			reg = <0x0>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <16384>;
			i-cache-size = <16384>;
			timebase-frequency = <0>;
			clock-frequency = <0>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x0>;
	};

	localbus@f0010100 {
		compatible = "fsl,mpc8280-localbus",
		             "fsl,pq2-localbus";
		#address-cells = <2>;
		#size-cells = <1>;
		reg = <0xf0010100 0x60>;

		ranges = <0x0 0x0 0xff800000 0x800000
		          0x1 0x0 0xf4500000 0x8000
		          0x8 0x0 0xf8200000 0x8000>;

		flash@0,0 {
			compatible = "jedec-flash";
			reg = <0x0 0x0 0x800000>;
			bank-width = <4>;
			device-width = <1>;
		};

		bcsr@1,0 {
			reg = <0x1 0x0 0x20>;
			compatible = "fsl,pq2fads-bcsr";
		};

		PCI_PIC: pic@8,0 {
			#interrupt-cells = <1>;
			interrupt-controller;
			reg = <0x8 0x0 0x8>;
			compatible = "fsl,pq2ads-pci-pic";
			interrupt-parent = <&PIC>;
			interrupts = <24 8>;
		};
	};

	pci0: pci@f0010800 {
		device_type = "pci";
		reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
		compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		clock-frequency = <66000000>;
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <
		                /* IDSEL 0x16 */
		                 0xb000 0x0 0x0 0x1 &PCI_PIC 0
		                 0xb000 0x0 0x0 0x2 &PCI_PIC 1
		                 0xb000 0x0 0x0 0x3 &PCI_PIC 2
		                 0xb000 0x0 0x0 0x4 &PCI_PIC 3

		                /* IDSEL 0x17 */
		                 0xb800 0x0 0x0 0x1 &PCI_PIC 4
		                 0xb800 0x0 0x0 0x2 &PCI_PIC 5
		                 0xb800 0x0 0x0 0x3 &PCI_PIC 6
		                 0xb800 0x0 0x0 0x4 &PCI_PIC 7

		                /* IDSEL 0x18 */
		                 0xc000 0x0 0x0 0x1 &PCI_PIC 8
		                 0xc000 0x0 0x0 0x2 &PCI_PIC 9
		                 0xc000 0x0 0x0 0x3 &PCI_PIC 10
		                 0xc000 0x0 0x0 0x4 &PCI_PIC 11>;

		interrupt-parent = <&PIC>;
		interrupts = <18 8>;
		ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
		          0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
		          0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
	};

	soc@f0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		compatible = "fsl,mpc8280", "fsl,pq2-soc";
		ranges = <0x0 0xf0000000 0x53000>;

		// Temporary -- will go away once kernel uses ranges for get_immrbase().
		reg = <0xf0000000 0x53000>;

		cpm@119c0 {
			#address-cells = <1>;
			#size-cells = <1>;
			#interrupt-cells = <2>;
			compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
			reg = <0x119c0 0x30>;
			ranges;

			muram@0 {
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0x0 0x0 0x10000>;

				data@0 {
					compatible = "fsl,cpm-muram-data";
					reg = <0x0 0x2000 0x9800 0x800>;
				};
			};

			brg@119f0 {
				compatible = "fsl,mpc8280-brg",
				             "fsl,cpm2-brg",
				             "fsl,cpm-brg";
				reg = <0x119f0 0x10 0x115f0 0x10>;
			};

			serial0: serial@11a00 {
				device_type = "serial";
				compatible = "fsl,mpc8280-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <0x11a00 0x20 0x8000 0x100>;
				interrupts = <40 8>;
				interrupt-parent = <&PIC>;
				fsl,cpm-brg = <1>;
				fsl,cpm-command = <0x800000>;
			};

			serial1: serial@11a20 {
				device_type = "serial";
				compatible = "fsl,mpc8280-scc-uart",
				             "fsl,cpm2-scc-uart";
				reg = <0x11a20 0x20 0x8100 0x100>;
				interrupts = <41 8>;
				interrupt-parent = <&PIC>;
				fsl,cpm-brg = <2>;
				fsl,cpm-command = <0x4a00000>;
			};

			enet0: ethernet@11320 {
				device_type = "network";
				compatible = "fsl,mpc8280-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
				interrupts = <33 8>;
				interrupt-parent = <&PIC>;
				phy-handle = <&PHY0>;
				linux,network-index = <0>;
				fsl,cpm-command = <0x16200300>;
			};

			enet1: ethernet@11340 {
				device_type = "network";
				compatible = "fsl,mpc8280-fcc-enet",
				             "fsl,cpm2-fcc-enet";
				reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>;
				interrupts = <34 8>;
				interrupt-parent = <&PIC>;
				phy-handle = <&PHY1>;
				linux,network-index = <1>;
				fsl,cpm-command = <0x1a400300>;
				local-mac-address = [00 e0 0c 00 79 01];
			};

			mdio@10d40 {
				compatible = "fsl,pq2fads-mdio-bitbang",
				             "fsl,mpc8280-mdio-bitbang",
				             "fsl,cpm2-mdio-bitbang";
				#address-cells = <1>;
				#size-cells = <0>;
				reg = <0x10d40 0x14>;
				fsl,mdio-pin = <9>;
				fsl,mdc-pin = <10>;

				PHY0: ethernet-phy@0 {
					interrupt-parent = <&PIC>;
					interrupts = <25 2>;
					reg = <0x0>;
				};

				PHY1: ethernet-phy@1 {
					interrupt-parent = <&PIC>;
					interrupts = <25 2>;
					reg = <0x3>;
				};
			};

			usb@11b60 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,mpc8280-usb",
				             "fsl,cpm2-usb";
				reg = <0x11b60 0x18 0x8b00 0x100>;
				interrupt-parent = <&PIC>;
				interrupts = <11 8>;
				fsl,cpm-command = <0x2e600000>;
			};
		};

		PIC: interrupt-controller@10c00 {
			#interrupt-cells = <2>;
			interrupt-controller;
			reg = <0x10c00 0x80>;
			compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
		};

	};

	chosen {
		stdout-path = "/soc/cpm/serial@11a00";
	};
};
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
3611f2ad SW	2	/*
	3	* Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
	4	*
998c6103	5	* Copyright 2007,2008 Freescale Semiconductor Inc.
3611f2ad SW	6	*/
3611f2ad SW	7
998c6103 KG	8	/dts-v1/;
998c6103 KG	9
3611f2ad SW	10	/ {
	11	model = "pq2fads";
	12	compatible = "fsl,pq2fads";
	13	#address-cells = <1>;
	14	#size-cells = <1>;
	15
65cc0fa3 SW	16	aliases {
	17	ethernet0 = &enet0;
	18	ethernet1 = &enet1;
	19	serial0 = &serial0;
	20	serial1 = &serial1;
	21	pci0 = &pci0;
	22	};
	23
3611f2ad SW	24	cpus {
	25	#address-cells = <1>;
	26	#size-cells = <0>;
	27
	28	cpu@0 {
	29	device_type = "cpu";
998c6103 KG	30	reg = <0x0>;
	31	d-cache-line-size = <32>;
	32	i-cache-line-size = <32>;
	33	d-cache-size = <16384>;
	34	i-cache-size = <16384>;
3611f2ad SW	35	timebase-frequency = <0>;
	36	clock-frequency = <0>;
	37	};
	38	};
	39
	40	memory {
	41	device_type = "memory";
998c6103	42	reg = <0x0 0x0>;
3611f2ad SW	43	};
	44
	45	localbus@f0010100 {
	46	compatible = "fsl,mpc8280-localbus",
	47	"fsl,pq2-localbus";
	48	#address-cells = <2>;
	49	#size-cells = <1>;
998c6103	50	reg = <0xf0010100 0x60>;
3611f2ad	51
65cc0fa3	52	ranges = <0x0 0x0 0xff800000 0x800000
998c6103 KG	53	0x1 0x0 0xf4500000 0x8000
998c6103 KG	54	0x8 0x0 0xf8200000 0x8000>;
3611f2ad SW	55
	56	flash@0,0 {
	57	compatible = "jedec-flash";
998c6103	58	reg = <0x0 0x0 0x800000>;
3611f2ad SW	59	bank-width = <4>;
	60	device-width = <1>;
	61	};
	62
	63	bcsr@1,0 {
998c6103	64	reg = <0x1 0x0 0x20>;
3611f2ad SW	65	compatible = "fsl,pq2fads-bcsr";
	66	};
	67
	68	PCI_PIC: pic@8,0 {
	69	#interrupt-cells = <1>;
	70	interrupt-controller;
998c6103	71	reg = <0x8 0x0 0x8>;
3611f2ad SW	72	compatible = "fsl,pq2ads-pci-pic";
3611f2ad SW	73	interrupt-parent = <&PIC>;
998c6103	74	interrupts = <24 8>;
3611f2ad SW	75	};
	76	};
	77
65cc0fa3	78	pci0: pci@f0010800 {
3611f2ad	79	device_type = "pci";
998c6103	80	reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
3611f2ad SW	81	compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
	82	#interrupt-cells = <1>;
	83	#size-cells = <2>;
	84	#address-cells = <3>;
998c6103 KG	85	clock-frequency = <66000000>;
998c6103 KG	86	interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
3611f2ad SW	87	interrupt-map = <
3611f2ad SW	88	/* IDSEL 0x16 */
998c6103 KG	89	0xb000 0x0 0x0 0x1 &PCI_PIC 0
	90	0xb000 0x0 0x0 0x2 &PCI_PIC 1
	91	0xb000 0x0 0x0 0x3 &PCI_PIC 2
	92	0xb000 0x0 0x0 0x4 &PCI_PIC 3
3611f2ad SW	93
3611f2ad SW	94	/* IDSEL 0x17 */
998c6103 KG	95	0xb800 0x0 0x0 0x1 &PCI_PIC 4
	96	0xb800 0x0 0x0 0x2 &PCI_PIC 5
	97	0xb800 0x0 0x0 0x3 &PCI_PIC 6
	98	0xb800 0x0 0x0 0x4 &PCI_PIC 7
3611f2ad SW	99
3611f2ad SW	100	/* IDSEL 0x18 */
998c6103 KG	101	0xc000 0x0 0x0 0x1 &PCI_PIC 8
	102	0xc000 0x0 0x0 0x2 &PCI_PIC 9
	103	0xc000 0x0 0x0 0x3 &PCI_PIC 10
	104	0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
3611f2ad SW	105
3611f2ad SW	106	interrupt-parent = <&PIC>;
998c6103 KG	107	interrupts = <18 8>;
	108	ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
	109	0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
	110	0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
3611f2ad SW	111	};
	112
	113	soc@f0000000 {
	114	#address-cells = <1>;
	115	#size-cells = <1>;
	116	device_type = "soc";
	117	compatible = "fsl,mpc8280", "fsl,pq2-soc";
998c6103	118	ranges = <0x0 0xf0000000 0x53000>;
3611f2ad SW	119
3611f2ad SW	120	// Temporary -- will go away once kernel uses ranges for get_immrbase().
998c6103	121	reg = <0xf0000000 0x53000>;
3611f2ad SW	122
	123	cpm@119c0 {
	124	#address-cells = <1>;
	125	#size-cells = <1>;
	126	#interrupt-cells = <2>;
	127	compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
998c6103	128	reg = <0x119c0 0x30>;
3611f2ad SW	129	ranges;
3611f2ad SW	130
15f8c604 SW	131	muram@0 {
	132	#address-cells = <1>;
	133	#size-cells = <1>;
998c6103	134	ranges = <0x0 0x0 0x10000>;
15f8c604 SW	135
	136	data@0 {
	137	compatible = "fsl,cpm-muram-data";
998c6103	138	reg = <0x0 0x2000 0x9800 0x800>;
15f8c604 SW	139	};
	140	};
	141
3611f2ad SW	142	brg@119f0 {
	143	compatible = "fsl,mpc8280-brg",
	144	"fsl,cpm2-brg",
	145	"fsl,cpm-brg";
998c6103	146	reg = <0x119f0 0x10 0x115f0 0x10>;
3611f2ad SW	147	};
3611f2ad SW	148
65cc0fa3	149	serial0: serial@11a00 {
3611f2ad SW	150	device_type = "serial";
	151	compatible = "fsl,mpc8280-scc-uart",
	152	"fsl,cpm2-scc-uart";
998c6103 KG	153	reg = <0x11a00 0x20 0x8000 0x100>;
998c6103 KG	154	interrupts = <40 8>;
3611f2ad SW	155	interrupt-parent = <&PIC>;
3611f2ad SW	156	fsl,cpm-brg = <1>;
998c6103	157	fsl,cpm-command = <0x800000>;
3611f2ad SW	158	};
3611f2ad SW	159
65cc0fa3	160	serial1: serial@11a20 {
3611f2ad SW	161	device_type = "serial";
	162	compatible = "fsl,mpc8280-scc-uart",
	163	"fsl,cpm2-scc-uart";
998c6103 KG	164	reg = <0x11a20 0x20 0x8100 0x100>;
998c6103 KG	165	interrupts = <41 8>;
3611f2ad SW	166	interrupt-parent = <&PIC>;
3611f2ad SW	167	fsl,cpm-brg = <2>;
998c6103	168	fsl,cpm-command = <0x4a00000>;
3611f2ad SW	169	};
3611f2ad SW	170
65cc0fa3	171	enet0: ethernet@11320 {
3611f2ad SW	172	device_type = "network";
	173	compatible = "fsl,mpc8280-fcc-enet",
	174	"fsl,cpm2-fcc-enet";
998c6103 KG	175	reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
998c6103 KG	176	interrupts = <33 8>;
3611f2ad SW	177	interrupt-parent = <&PIC>;
	178	phy-handle = <&PHY0>;
	179	linux,network-index = <0>;
998c6103	180	fsl,cpm-command = <0x16200300>;
3611f2ad SW	181	};
3611f2ad SW	182
65cc0fa3	183	enet1: ethernet@11340 {
3611f2ad SW	184	device_type = "network";
	185	compatible = "fsl,mpc8280-fcc-enet",
	186	"fsl,cpm2-fcc-enet";
998c6103 KG	187	reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>;
998c6103 KG	188	interrupts = <34 8>;
3611f2ad SW	189	interrupt-parent = <&PIC>;
	190	phy-handle = <&PHY1>;
	191	linux,network-index = <1>;
998c6103	192	fsl,cpm-command = <0x1a400300>;
3611f2ad SW	193	local-mac-address = [00 e0 0c 00 79 01];
	194	};
	195
	196	mdio@10d40 {
3611f2ad SW	197	compatible = "fsl,pq2fads-mdio-bitbang",
	198	"fsl,mpc8280-mdio-bitbang",
	199	"fsl,cpm2-mdio-bitbang";
	200	#address-cells = <1>;
	201	#size-cells = <0>;
998c6103	202	reg = <0x10d40 0x14>;
3611f2ad	203	fsl,mdio-pin = <9>;
998c6103	204	fsl,mdc-pin = <10>;
3611f2ad SW	205
	206	PHY0: ethernet-phy@0 {
	207	interrupt-parent = <&PIC>;
998c6103 KG	208	interrupts = <25 2>;
998c6103 KG	209	reg = <0x0>;
3611f2ad SW	210	};
	211
	212	PHY1: ethernet-phy@1 {
	213	interrupt-parent = <&PIC>;
998c6103 KG	214	interrupts = <25 2>;
998c6103 KG	215	reg = <0x3>;
3611f2ad SW	216	};
	217	};
	218
	219	usb@11b60 {
	220	#address-cells = <1>;
	221	#size-cells = <0>;
	222	compatible = "fsl,mpc8280-usb",
	223	"fsl,cpm2-usb";
998c6103	224	reg = <0x11b60 0x18 0x8b00 0x100>;
3611f2ad	225	interrupt-parent = <&PIC>;
998c6103 KG	226	interrupts = <11 8>;
998c6103 KG	227	fsl,cpm-command = <0x2e600000>;
3611f2ad SW	228	};
	229	};
	230
	231	PIC: interrupt-controller@10c00 {
	232	#interrupt-cells = <2>;
	233	interrupt-controller;
998c6103	234	reg = <0x10c00 0x80>;
3611f2ad SW	235	compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
	236	};
	237
	238	};
	239
	240	chosen {
78e5dfea	241	stdout-path = "/soc/cpm/serial@11a00";
3611f2ad SW	242	};
3611f2ad SW	243	};