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Commit | Line | Data |
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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
d1cf1c7d PG |
2 | /* |
3 | * SBC8548 Device Tree Source | |
4 | * | |
5 | * Copyright 2007 Wind River Systems Inc. | |
6 | * | |
7 | * Paul Gortmaker (see MAINTAINERS for contact information) | |
d1cf1c7d PG |
8 | */ |
9 | ||
10 | /{ | |
11 | model = "SBC8548"; | |
12 | compatible = "SBC8548"; | |
13 | #address-cells = <1>; | |
14 | #size-cells = <1>; | |
15 | ||
16 | aliases { | |
17 | ethernet0 = &enet0; | |
18 | ethernet1 = &enet1; | |
19 | serial0 = &serial0; | |
20 | serial1 = &serial1; | |
21 | pci0 = &pci0; | |
22 | pci1 = &pci1; | |
23 | }; | |
24 | ||
25 | cpus { | |
26 | #address-cells = <1>; | |
27 | #size-cells = <0>; | |
28 | ||
29 | PowerPC,8548@0 { | |
30 | device_type = "cpu"; | |
31 | reg = <0>; | |
32 | d-cache-line-size = <0x20>; // 32 bytes | |
33 | i-cache-line-size = <0x20>; // 32 bytes | |
34 | d-cache-size = <0x8000>; // L1, 32K | |
35 | i-cache-size = <0x8000>; // L1, 32K | |
36 | timebase-frequency = <0>; // From uboot | |
37 | bus-frequency = <0>; | |
38 | clock-frequency = <0>; | |
39 | next-level-cache = <&L2>; | |
40 | }; | |
41 | }; | |
42 | ||
43 | memory { | |
44 | device_type = "memory"; | |
45 | reg = <0x00000000 0x10000000>; | |
46 | }; | |
47 | ||
48 | }; |