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1a59d1b8 | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
0cdf50a7 SP |
2 | /* |
3 | * This interface is used for compatibility with old U-boots *ONLY*. | |
4 | * Please do not imitate or extend this. | |
5 | */ | |
6 | ||
7 | /* | |
8 | * Unfortunately, the ESTeem Hotfoot board uses a mangled version of | |
9 | * ppcboot.h for historical reasons, and in the interest of having a | |
10 | * mainline kernel boot on the production board+bootloader, this was the | |
11 | * least-offensive solution. Please direct all flames to: | |
12 | * | |
13 | * Solomon Peachy <solomon@linux-wlan.com> | |
14 | * | |
15 | * (This header is identical to ppcboot.h except for the | |
16 | * TARGET_HOTFOOT bits) | |
17 | */ | |
18 | ||
19 | /* | |
20 | * (C) Copyright 2000, 2001 | |
21 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
0cdf50a7 SP |
22 | */ |
23 | ||
24 | #ifndef __PPCBOOT_H__ | |
25 | #define __PPCBOOT_H__ | |
26 | ||
27 | /* | |
28 | * Board information passed to kernel from PPCBoot | |
29 | * | |
30 | * include/asm-ppc/ppcboot.h | |
31 | */ | |
32 | ||
33 | #include "types.h" | |
34 | ||
35 | typedef struct bd_info { | |
36 | unsigned long bi_memstart; /* start of DRAM memory */ | |
37 | unsigned long bi_memsize; /* size of DRAM memory in bytes */ | |
38 | unsigned long bi_flashstart; /* start of FLASH memory */ | |
39 | unsigned long bi_flashsize; /* size of FLASH memory */ | |
40 | unsigned long bi_flashoffset; /* reserved area for startup monitor */ | |
41 | unsigned long bi_sramstart; /* start of SRAM memory */ | |
42 | unsigned long bi_sramsize; /* size of SRAM memory */ | |
43 | #if defined(TARGET_8xx) || defined(TARGET_CPM2) || defined(TARGET_85xx) ||\ | |
44 | defined(TARGET_83xx) | |
45 | unsigned long bi_immr_base; /* base of IMMR register */ | |
46 | #endif | |
47 | #if defined(TARGET_PPC_MPC52xx) | |
48 | unsigned long bi_mbar_base; /* base of internal registers */ | |
49 | #endif | |
50 | unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */ | |
51 | unsigned long bi_ip_addr; /* IP Address */ | |
52 | unsigned char bi_enetaddr[6]; /* Ethernet address */ | |
53 | #if defined(TARGET_HOTFOOT) | |
54 | /* second onboard ethernet port */ | |
55 | unsigned char bi_enet1addr[6]; | |
56 | #define HAVE_ENET1ADDR | |
57 | #endif /* TARGET_HOOTFOOT */ | |
58 | unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ | |
59 | unsigned long bi_intfreq; /* Internal Freq, in MHz */ | |
60 | unsigned long bi_busfreq; /* Bus Freq, in MHz */ | |
61 | #if defined(TARGET_CPM2) | |
62 | unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ | |
63 | unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ | |
64 | unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ | |
65 | unsigned long bi_vco; /* VCO Out from PLL, in MHz */ | |
66 | #endif | |
67 | #if defined(TARGET_PPC_MPC52xx) | |
68 | unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */ | |
69 | unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ | |
70 | #endif | |
71 | unsigned long bi_baudrate; /* Console Baudrate */ | |
72 | #if defined(TARGET_4xx) | |
73 | unsigned char bi_s_version[4]; /* Version of this structure */ | |
74 | unsigned char bi_r_version[32]; /* Version of the ROM (IBM) */ | |
75 | unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */ | |
76 | unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */ | |
77 | unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ | |
78 | unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ | |
79 | #endif | |
80 | #if defined(TARGET_HOTFOOT) | |
81 | unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */ | |
82 | #endif | |
83 | #if defined(TARGET_HYMOD) | |
84 | hymod_conf_t bi_hymod_conf; /* hymod configuration information */ | |
85 | #endif | |
86 | #if defined(TARGET_EVB64260) || defined(TARGET_405EP) || defined(TARGET_44x) || \ | |
87 | defined(TARGET_85xx) || defined(TARGET_83xx) || defined(TARGET_HAS_ETH1) | |
88 | /* second onboard ethernet port */ | |
89 | unsigned char bi_enet1addr[6]; | |
90 | #define HAVE_ENET1ADDR | |
91 | #endif | |
92 | #if defined(TARGET_EVB64260) || defined(TARGET_440GX) || \ | |
93 | defined(TARGET_85xx) || defined(TARGET_HAS_ETH2) | |
94 | /* third onboard ethernet ports */ | |
95 | unsigned char bi_enet2addr[6]; | |
96 | #define HAVE_ENET2ADDR | |
97 | #endif | |
98 | #if defined(TARGET_440GX) || defined(TARGET_HAS_ETH3) | |
99 | /* fourth onboard ethernet ports */ | |
100 | unsigned char bi_enet3addr[6]; | |
101 | #define HAVE_ENET3ADDR | |
102 | #endif | |
103 | #if defined(TARGET_HOTFOOT) | |
104 | int bi_phynum[2]; /* Determines phy mapping */ | |
105 | int bi_phymode[2]; /* Determines phy mode */ | |
106 | #endif | |
107 | #if defined(TARGET_4xx) | |
108 | unsigned int bi_opbfreq; /* OB clock in Hz */ | |
109 | int bi_iic_fast[2]; /* Use fast i2c mode */ | |
110 | #endif | |
111 | #if defined(TARGET_440GX) | |
112 | int bi_phynum[4]; /* phy mapping */ | |
113 | int bi_phymode[4]; /* phy mode */ | |
114 | #endif | |
115 | } bd_t; | |
116 | ||
117 | #define bi_tbfreq bi_intfreq | |
118 | ||
119 | #endif /* __PPCBOOT_H__ */ |