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26b6a3d9 AK |
1 | #ifndef _ASM_POWERPC_BOOK3S_64_HASH_H |
2 | #define _ASM_POWERPC_BOOK3S_64_HASH_H | |
c605782b BH |
3 | #ifdef __KERNEL__ |
4 | ||
e34aa03c AK |
5 | /* |
6 | * Common bits between 4K and 64K pages in a linux-style PTE. | |
1ec3f937 | 7 | * Additional bits may be defined in pgtable-hash64-*.h |
e34aa03c | 8 | * |
e34aa03c | 9 | */ |
d2cf0050 | 10 | #define H_PTE_NONE_MASK _PAGE_HPTEFLAGS |
6aa59f51 AK |
11 | #define H_PAGE_F_GIX_SHIFT 56 |
12 | #define H_PAGE_BUSY _RPAGE_RSV1 /* software: PTE & hash are busy */ | |
13 | #define H_PAGE_F_SECOND _RPAGE_RSV2 /* HPTE is in 2ndary HPTEG */ | |
14 | #define H_PAGE_F_GIX (_RPAGE_RSV3 | _RPAGE_RSV4 | _RPAGE_RPN44) | |
15 | #define H_PAGE_HASHPTE _RPAGE_RPN43 /* PTE has associated HPTE */ | |
e34aa03c | 16 | |
371352ca AK |
17 | #ifdef CONFIG_PPC_64K_PAGES |
18 | #include <asm/book3s/64/hash-64k.h> | |
19 | #else | |
20 | #include <asm/book3s/64/hash-4k.h> | |
21 | #endif | |
22 | ||
23 | /* | |
24 | * Size of EA range mapped by our pagetables. | |
25 | */ | |
dd1842a2 AK |
26 | #define H_PGTABLE_EADDR_SIZE (H_PTE_INDEX_SIZE + H_PMD_INDEX_SIZE + \ |
27 | H_PUD_INDEX_SIZE + H_PGD_INDEX_SIZE + PAGE_SHIFT) | |
28 | #define H_PGTABLE_RANGE (ASM_CONST(1) << H_PGTABLE_EADDR_SIZE) | |
371352ca | 29 | |
8ad43336 | 30 | #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && defined(CONFIG_PPC_64K_PAGES) |
dd1842a2 | 31 | /* |
8ad43336 | 32 | * only with hash 64k we need to use the second half of pmd page table |
dd1842a2 AK |
33 | * to store pointer to deposited pgtable_t |
34 | */ | |
35 | #define H_PMD_CACHE_INDEX (H_PMD_INDEX_SIZE + 1) | |
371352ca | 36 | #else |
dd1842a2 | 37 | #define H_PMD_CACHE_INDEX H_PMD_INDEX_SIZE |
371352ca AK |
38 | #endif |
39 | /* | |
40 | * Define the address range of the kernel non-linear virtual area | |
41 | */ | |
d6a9996e AK |
42 | #define H_KERN_VIRT_START ASM_CONST(0xD000000000000000) |
43 | #define H_KERN_VIRT_SIZE ASM_CONST(0x0000100000000000) | |
371352ca AK |
44 | |
45 | /* | |
46 | * The vmalloc space starts at the beginning of that region, and | |
47 | * occupies half of it on hash CPUs and a quarter of it on Book3E | |
48 | * (we keep a quarter for the virtual memmap) | |
49 | */ | |
d6a9996e AK |
50 | #define H_VMALLOC_START H_KERN_VIRT_START |
51 | #define H_VMALLOC_SIZE (H_KERN_VIRT_SIZE >> 1) | |
52 | #define H_VMALLOC_END (H_VMALLOC_START + H_VMALLOC_SIZE) | |
371352ca AK |
53 | |
54 | /* | |
55 | * Region IDs | |
56 | */ | |
57 | #define REGION_SHIFT 60UL | |
58 | #define REGION_MASK (0xfUL << REGION_SHIFT) | |
59 | #define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT) | |
60 | ||
d6a9996e | 61 | #define VMALLOC_REGION_ID (REGION_ID(H_VMALLOC_START)) |
371352ca AK |
62 | #define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET)) |
63 | #define VMEMMAP_REGION_ID (0xfUL) /* Server only */ | |
64 | #define USER_REGION_ID (0UL) | |
65 | ||
66 | /* | |
67 | * Defines the address of the vmemap area, in its own region on | |
68 | * hash table CPUs. | |
69 | */ | |
d6a9996e | 70 | #define H_VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT) |
371352ca AK |
71 | |
72 | #ifdef CONFIG_PPC_MM_SLICES | |
73 | #define HAVE_ARCH_UNMAPPED_AREA | |
74 | #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN | |
75 | #endif /* CONFIG_PPC_MM_SLICES */ | |
8d1cf34e | 76 | |
c605782b BH |
77 | |
78 | /* PTEIDX nibble */ | |
79 | #define _PTEIDX_SECONDARY 0x8 | |
80 | #define _PTEIDX_GROUP_IX 0x7 | |
81 | ||
ac94ac79 AK |
82 | #define H_PMD_BAD_BITS (PTE_TABLE_SIZE-1) |
83 | #define H_PUD_BAD_BITS (PMD_TABLE_SIZE-1) | |
371352ca AK |
84 | |
85 | #ifndef __ASSEMBLY__ | |
ac94ac79 AK |
86 | #define hash__pmd_bad(pmd) (pmd_val(pmd) & H_PMD_BAD_BITS) |
87 | #define hash__pud_bad(pud) (pud_val(pud) & H_PUD_BAD_BITS) | |
88 | static inline int hash__pgd_bad(pgd_t pgd) | |
89 | { | |
90 | return (pgd_val(pgd) == 0); | |
91 | } | |
cd65d697 BS |
92 | #ifdef CONFIG_STRICT_KERNEL_RWX |
93 | extern void hash__mark_rodata_ro(void); | |
029d9252 | 94 | extern void hash__mark_initmem_nx(void); |
cd65d697 | 95 | #endif |
371352ca AK |
96 | |
97 | extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr, | |
98 | pte_t *ptep, unsigned long pte, int huge); | |
c6a3c495 | 99 | extern unsigned long htab_convert_pte_flags(unsigned long pteflags); |
371352ca | 100 | /* Atomic PTE updates */ |
ac94ac79 AK |
101 | static inline unsigned long hash__pte_update(struct mm_struct *mm, |
102 | unsigned long addr, | |
103 | pte_t *ptep, unsigned long clr, | |
104 | unsigned long set, | |
105 | int huge) | |
371352ca | 106 | { |
5dc1ef85 AK |
107 | __be64 old_be, tmp_be; |
108 | unsigned long old; | |
371352ca AK |
109 | |
110 | __asm__ __volatile__( | |
111 | "1: ldarx %0,0,%3 # pte_update\n\ | |
5dc1ef85 | 112 | and. %1,%0,%6\n\ |
371352ca AK |
113 | bne- 1b \n\ |
114 | andc %1,%0,%4 \n\ | |
115 | or %1,%1,%7\n\ | |
116 | stdcx. %1,0,%3 \n\ | |
117 | bne- 1b" | |
5dc1ef85 AK |
118 | : "=&r" (old_be), "=&r" (tmp_be), "=m" (*ptep) |
119 | : "r" (ptep), "r" (cpu_to_be64(clr)), "m" (*ptep), | |
945537df | 120 | "r" (cpu_to_be64(H_PAGE_BUSY)), "r" (cpu_to_be64(set)) |
371352ca AK |
121 | : "cc" ); |
122 | /* huge pages use the old page table lock */ | |
123 | if (!huge) | |
124 | assert_pte_locked(mm, addr); | |
125 | ||
5dc1ef85 | 126 | old = be64_to_cpu(old_be); |
945537df | 127 | if (old & H_PAGE_HASHPTE) |
371352ca AK |
128 | hpte_need_flush(mm, addr, ptep, old, huge); |
129 | ||
130 | return old; | |
131 | } | |
132 | ||
371352ca AK |
133 | /* Set the dirty and/or accessed bits atomically in a linux PTE, this |
134 | * function doesn't need to flush the hash entry | |
135 | */ | |
ac94ac79 | 136 | static inline void hash__ptep_set_access_flags(pte_t *ptep, pte_t entry) |
371352ca | 137 | { |
5dc1ef85 AK |
138 | __be64 old, tmp, val, mask; |
139 | ||
c7d54842 | 140 | mask = cpu_to_be64(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_READ | _PAGE_WRITE | |
5dc1ef85 | 141 | _PAGE_EXEC | _PAGE_SOFT_DIRTY); |
371352ca | 142 | |
5dc1ef85 | 143 | val = pte_raw(entry) & mask; |
371352ca AK |
144 | |
145 | __asm__ __volatile__( | |
146 | "1: ldarx %0,0,%4\n\ | |
5dc1ef85 | 147 | and. %1,%0,%6\n\ |
371352ca AK |
148 | bne- 1b \n\ |
149 | or %0,%3,%0\n\ | |
150 | stdcx. %0,0,%4\n\ | |
151 | bne- 1b" | |
152 | :"=&r" (old), "=&r" (tmp), "=m" (*ptep) | |
945537df | 153 | :"r" (val), "r" (ptep), "m" (*ptep), "r" (cpu_to_be64(H_PAGE_BUSY)) |
371352ca AK |
154 | :"cc"); |
155 | } | |
156 | ||
ac94ac79 | 157 | static inline int hash__pte_same(pte_t pte_a, pte_t pte_b) |
368ced78 | 158 | { |
ac94ac79 | 159 | return (((pte_raw(pte_a) ^ pte_raw(pte_b)) & ~cpu_to_be64(_PAGE_HPTEFLAGS)) == 0); |
368ced78 AK |
160 | } |
161 | ||
ac94ac79 | 162 | static inline int hash__pte_none(pte_t pte) |
ee3caed3 | 163 | { |
ac94ac79 | 164 | return (pte_val(pte) & ~H_PTE_NONE_MASK) == 0; |
ee3caed3 ME |
165 | } |
166 | ||
1ca72129 AK |
167 | /* This low level function performs the actual PTE insertion |
168 | * Setting the PTE depends on the MMU type and other factors. It's | |
169 | * an horrible mess that I'm not going to try to clean up now but | |
170 | * I'm keeping it in one place rather than spread around | |
171 | */ | |
ac94ac79 AK |
172 | static inline void hash__set_pte_at(struct mm_struct *mm, unsigned long addr, |
173 | pte_t *ptep, pte_t pte, int percpu) | |
1ca72129 AK |
174 | { |
175 | /* | |
176 | * Anything else just stores the PTE normally. That covers all 64-bit | |
177 | * cases, and 32-bit non-hash with 32-bit PTEs. | |
178 | */ | |
179 | *ptep = pte; | |
180 | } | |
181 | ||
371352ca AK |
182 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
183 | extern void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr, | |
184 | pmd_t *pmdp, unsigned long old_pmd); | |
185 | #else | |
186 | static inline void hpte_do_hugepage_flush(struct mm_struct *mm, | |
187 | unsigned long addr, pmd_t *pmdp, | |
188 | unsigned long old_pmd) | |
189 | { | |
190 | WARN(1, "%s called with THP disabled\n", __func__); | |
191 | } | |
192 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
193 | ||
31a14fae AK |
194 | |
195 | extern int hash__map_kernel_page(unsigned long ea, unsigned long pa, | |
196 | unsigned long flags); | |
197 | extern int __meminit hash__vmemmap_create_mapping(unsigned long start, | |
198 | unsigned long page_size, | |
199 | unsigned long phys); | |
200 | extern void hash__vmemmap_remove_mapping(unsigned long start, | |
201 | unsigned long page_size); | |
32b53c01 RA |
202 | |
203 | int hash__create_section_mapping(unsigned long start, unsigned long end); | |
204 | int hash__remove_section_mapping(unsigned long start, unsigned long end); | |
205 | ||
371352ca | 206 | #endif /* !__ASSEMBLY__ */ |
c605782b | 207 | #endif /* __KERNEL__ */ |
26b6a3d9 | 208 | #endif /* _ASM_POWERPC_BOOK3S_64_HASH_H */ |