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powerpc/eeh: pseries platform EEH initialization
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CommitLineData
172ca926 1/*
1da177e4 2 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation.
cb3bc9d0 3 * Copyright 2001-2012 IBM Corporation.
1da177e4
LT
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
172ca926 9 *
1da177e4
LT
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
172ca926 14 *
1da177e4
LT
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
8b8da358
BH
20#ifndef _POWERPC_EEH_H
21#define _POWERPC_EEH_H
88ced031 22#ifdef __KERNEL__
1da177e4 23
1da177e4
LT
24#include <linux/init.h>
25#include <linux/list.h>
26#include <linux/string.h>
27
28struct pci_dev;
827c1a6c 29struct pci_bus;
1da177e4 30struct device_node;
1da177e4
LT
31
32#ifdef CONFIG_EEH
33
aa1e6374
GS
34/*
35 * The struct is used to trace the registered EEH operation
36 * callback functions. Actually, those operation callback
37 * functions are heavily platform dependent. That means the
38 * platform should register its own EEH operation callback
39 * functions before any EEH further operations.
40 */
41struct eeh_ops {
42 char *name;
43 int (*init)(void);
44 int (*set_option)(struct device_node *dn, int option);
45 int (*get_pe_addr)(struct device_node *dn);
46 int (*get_state)(struct device_node *dn, int *state);
47 int (*reset)(struct device_node *dn, int option);
48 int (*wait_state)(struct device_node *dn, int max_wait);
49 int (*get_log)(struct device_node *dn, int severity, char *drv_log, unsigned long len);
50 int (*configure_bridge)(struct device_node *dn);
51};
52
53extern struct eeh_ops *eeh_ops;
1e28a7dd
DW
54extern int eeh_subsystem_enabled;
55
1da177e4 56/* Values for eeh_mode bits in device_node */
77bd7415
LV
57#define EEH_MODE_SUPPORTED (1<<0)
58#define EEH_MODE_NOCHECK (1<<1)
59#define EEH_MODE_ISOLATED (1<<2)
60#define EEH_MODE_RECOVERING (1<<3)
61#define EEH_MODE_IRQ_DISABLED (1<<4)
1da177e4 62
cb3bc9d0
GS
63/*
64 * Max number of EEH freezes allowed before we consider the device
65 * to be permanently disabled.
66 */
172ca926
LV
67#define EEH_MAX_ALLOWED_FREEZES 5
68
1da177e4 69void __init eeh_init(void);
aa1e6374
GS
70#ifdef CONFIG_PPC_PSERIES
71int __init eeh_pseries_init(void);
72#endif
73int __init eeh_ops_register(struct eeh_ops *ops);
74int __exit eeh_ops_unregister(const char *name);
1da177e4
LT
75unsigned long eeh_check_failure(const volatile void __iomem *token,
76 unsigned long val);
77int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev);
78void __init pci_addr_cache_build(void);
e2a296ee 79void eeh_add_device_tree_early(struct device_node *);
827c1a6c 80void eeh_add_device_tree_late(struct pci_bus *);
e2a296ee
LV
81void eeh_remove_bus_device(struct pci_dev *);
82
1da177e4
LT
83/**
84 * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
85 *
86 * If this macro yields TRUE, the caller relays to eeh_check_failure()
87 * which does further tests out of line.
88 */
1e28a7dd 89#define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_subsystem_enabled)
1da177e4
LT
90
91/*
92 * Reads from a device which has been isolated by EEH will return
93 * all 1s. This macro gives an all-1s value of the given size (in
94 * bytes: 1, 2, or 4) for comparing with the result of a read.
95 */
96#define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8))
97
98#else /* !CONFIG_EEH */
99static inline void eeh_init(void) { }
100
aa1e6374
GS
101#ifdef CONFIG_PPC_PSERIES
102static inline int eeh_pseries_init(void)
103{
104 return 0;
105}
106#endif /* CONFIG_PPC_PSERIES */
107
1da177e4
LT
108static inline unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
109{
110 return val;
111}
112
113static inline int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
114{
115 return 0;
116}
117
118static inline void pci_addr_cache_build(void) { }
119
022930eb
HM
120static inline void eeh_add_device_tree_early(struct device_node *dn) { }
121
827c1a6c
JR
122static inline void eeh_add_device_tree_late(struct pci_bus *bus) { }
123
022930eb 124static inline void eeh_remove_bus_device(struct pci_dev *dev) { }
1da177e4
LT
125#define EEH_POSSIBLE_ERROR(val, type) (0)
126#define EEH_IO_ERROR_VALUE(size) (-1UL)
127#endif /* CONFIG_EEH */
128
8b8da358 129#ifdef CONFIG_PPC64
172ca926 130/*
1da177e4
LT
131 * MMIO read/write operations with EEH support.
132 */
133static inline u8 eeh_readb(const volatile void __iomem *addr)
134{
135 u8 val = in_8(addr);
136 if (EEH_POSSIBLE_ERROR(val, u8))
137 return eeh_check_failure(addr, val);
138 return val;
139}
1da177e4
LT
140
141static inline u16 eeh_readw(const volatile void __iomem *addr)
142{
143 u16 val = in_le16(addr);
144 if (EEH_POSSIBLE_ERROR(val, u16))
145 return eeh_check_failure(addr, val);
146 return val;
147}
1da177e4
LT
148
149static inline u32 eeh_readl(const volatile void __iomem *addr)
150{
151 u32 val = in_le32(addr);
152 if (EEH_POSSIBLE_ERROR(val, u32))
153 return eeh_check_failure(addr, val);
154 return val;
155}
4cb3cee0
BH
156
157static inline u64 eeh_readq(const volatile void __iomem *addr)
1da177e4 158{
4cb3cee0
BH
159 u64 val = in_le64(addr);
160 if (EEH_POSSIBLE_ERROR(val, u64))
1da177e4
LT
161 return eeh_check_failure(addr, val);
162 return val;
163}
1da177e4 164
4cb3cee0 165static inline u16 eeh_readw_be(const volatile void __iomem *addr)
1da177e4 166{
4cb3cee0
BH
167 u16 val = in_be16(addr);
168 if (EEH_POSSIBLE_ERROR(val, u16))
1da177e4
LT
169 return eeh_check_failure(addr, val);
170 return val;
171}
4cb3cee0
BH
172
173static inline u32 eeh_readl_be(const volatile void __iomem *addr)
1da177e4 174{
4cb3cee0
BH
175 u32 val = in_be32(addr);
176 if (EEH_POSSIBLE_ERROR(val, u32))
177 return eeh_check_failure(addr, val);
178 return val;
1da177e4 179}
4cb3cee0
BH
180
181static inline u64 eeh_readq_be(const volatile void __iomem *addr)
1da177e4
LT
182{
183 u64 val = in_be64(addr);
184 if (EEH_POSSIBLE_ERROR(val, u64))
185 return eeh_check_failure(addr, val);
186 return val;
187}
1da177e4 188
68a64357
BH
189static inline void eeh_memcpy_fromio(void *dest, const
190 volatile void __iomem *src,
1da177e4
LT
191 unsigned long n)
192{
68a64357 193 _memcpy_fromio(dest, src, n);
1da177e4
LT
194
195 /* Look for ffff's here at dest[n]. Assume that at least 4 bytes
196 * were copied. Check all four bytes.
197 */
68a64357
BH
198 if (n >= 4 && EEH_POSSIBLE_ERROR(*((u32 *)(dest + n - 4)), u32))
199 eeh_check_failure(src, *((u32 *)(dest + n - 4)));
1da177e4
LT
200}
201
1da177e4 202/* in-string eeh macros */
4cb3cee0
BH
203static inline void eeh_readsb(const volatile void __iomem *addr, void * buf,
204 int ns)
1da177e4 205{
4cb3cee0 206 _insb(addr, buf, ns);
1da177e4 207 if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), u8))
4cb3cee0 208 eeh_check_failure(addr, *(u8*)buf);
1da177e4
LT
209}
210
4cb3cee0
BH
211static inline void eeh_readsw(const volatile void __iomem *addr, void * buf,
212 int ns)
1da177e4 213{
4cb3cee0 214 _insw(addr, buf, ns);
1da177e4 215 if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), u16))
4cb3cee0 216 eeh_check_failure(addr, *(u16*)buf);
1da177e4
LT
217}
218
4cb3cee0
BH
219static inline void eeh_readsl(const volatile void __iomem *addr, void * buf,
220 int nl)
1da177e4 221{
4cb3cee0 222 _insl(addr, buf, nl);
1da177e4 223 if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), u32))
4cb3cee0 224 eeh_check_failure(addr, *(u32*)buf);
1da177e4
LT
225}
226
8b8da358 227#endif /* CONFIG_PPC64 */
88ced031 228#endif /* __KERNEL__ */
8b8da358 229#endif /* _POWERPC_EEH_H */