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1da177e4 LT |
1 | /* |
2 | * ELF register definitions.. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License | |
6 | * as published by the Free Software Foundation; either version | |
7 | * 2 of the License, or (at your option) any later version. | |
8 | */ | |
c3617f72 DH |
9 | #ifndef _ASM_POWERPC_ELF_H |
10 | #define _ASM_POWERPC_ELF_H | |
1da177e4 | 11 | |
c3617f72 DH |
12 | #include <linux/sched.h> /* for task_struct */ |
13 | #include <asm/page.h> | |
14 | #include <asm/string.h> | |
15 | #include <uapi/asm/elf.h> | |
1da177e4 LT |
16 | |
17 | /* | |
18 | * This is used to ensure we don't load something for the wrong architecture. | |
19 | */ | |
20 | #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) | |
01e31dba | 21 | #define compat_elf_check_arch(x) ((x)->e_machine == EM_PPC) |
1da177e4 | 22 | |
81970387 | 23 | #define CORE_DUMP_USE_REGSET |
637a6ff6 | 24 | #define ELF_EXEC_PAGESIZE PAGE_SIZE |
1da177e4 LT |
25 | |
26 | /* This is the location that an ET_DYN program is loaded if exec'ed. Typical | |
27 | use of this is to invoke "./ld.so someprog" to test out a new version of | |
28 | the loader. We need to make sure that it is out of the way of the program | |
29 | that it will "exec", and that there is sufficient room for the brk. */ | |
30 | ||
59994fb0 | 31 | #define ELF_ET_DYN_BASE 0x20000000 |
1da177e4 | 32 | |
918d0355 RR |
33 | #define ELF_CORE_EFLAGS (is_elf2_task() ? 2 : 0) |
34 | ||
5f149cf0 RM |
35 | /* |
36 | * Our registers are always unsigned longs, whether we're a 32 bit | |
37 | * process or 64 bit, on either a 64 bit or 32 bit kernel. | |
38 | * | |
39 | * This macro relies on elf_regs[i] having the right type to truncate to, | |
40 | * either u32 or u64. It defines the body of the elf_core_copy_regs | |
41 | * function, either the native one with elf_gregset_t elf_regs or | |
42 | * the 32-bit one with elf_gregset_t32 elf_regs. | |
43 | */ | |
44 | #define PPC_ELF_CORE_COPY_REGS(elf_regs, regs) \ | |
45 | int i, nregs = min(sizeof(*regs) / sizeof(unsigned long), \ | |
46 | (size_t)ELF_NGREG); \ | |
47 | for (i = 0; i < nregs; i++) \ | |
48 | elf_regs[i] = ((unsigned long *) regs)[i]; \ | |
49 | memset(&elf_regs[i], 0, (ELF_NGREG - i) * sizeof(elf_regs[0])) | |
50 | ||
51 | /* Common routine for both 32-bit and 64-bit native processes */ | |
a99eb2ef | 52 | static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs, |
5f149cf0 | 53 | struct pt_regs *regs) |
1da177e4 | 54 | { |
5f149cf0 | 55 | PPC_ELF_CORE_COPY_REGS(elf_regs, regs); |
1da177e4 | 56 | } |
a99eb2ef | 57 | #define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs); |
1da177e4 | 58 | |
1f7d6668 MN |
59 | typedef elf_vrregset_t elf_fpxregset_t; |
60 | ||
a99eb2ef | 61 | /* ELF_HWCAP yields a mask that user programs can use to figure out what |
1da177e4 LT |
62 | instruction set this cpu supports. This could be done in userspace, |
63 | but it's not easy, and we've already done it here. */ | |
a99eb2ef | 64 | # define ELF_HWCAP (cur_cpu_spec->cpu_user_features) |
2171364d | 65 | # define ELF_HWCAP2 (cur_cpu_spec->cpu_user_features2) |
1da177e4 LT |
66 | |
67 | /* This yields a string that ld.so will use to load implementation | |
68 | specific libraries for optimization. This is more specific in | |
80f15dc7 | 69 | intent than poking at uname or /proc/cpuinfo. */ |
1da177e4 | 70 | |
80f15dc7 | 71 | #define ELF_PLATFORM (cur_cpu_spec->platform) |
9115d134 NL |
72 | |
73 | /* While ELF_PLATFORM indicates the ISA supported by the platform, it | |
74 | * may not accurately reflect the underlying behavior of the hardware | |
75 | * (as in the case of running in Power5+ compatibility mode on a | |
76 | * Power6 machine). ELF_BASE_PLATFORM allows ld.so to load libraries | |
77 | * that are tuned for the real hardware. | |
78 | */ | |
79 | #define ELF_BASE_PLATFORM (powerpc_base_platform) | |
1da177e4 | 80 | |
80f15dc7 PM |
81 | #ifdef __powerpc64__ |
82 | # define ELF_PLAT_INIT(_r, load_addr) do { \ | |
83 | _r->gpr[2] = load_addr; \ | |
84 | } while (0) | |
85 | #endif /* __powerpc64__ */ | |
1da177e4 | 86 | |
a99eb2ef | 87 | #ifdef __powerpc64__ |
0b592682 | 88 | # define SET_PERSONALITY(ex) \ |
1da177e4 | 89 | do { \ |
373c76d6 RR |
90 | if (((ex).e_flags & 0x3) == 2) \ |
91 | set_thread_flag(TIF_ELF2ABI); \ | |
1efc5638 JB |
92 | else \ |
93 | clear_thread_flag(TIF_ELF2ABI); \ | |
1da177e4 | 94 | if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ |
94f28da8 | 95 | set_thread_flag(TIF_32BIT); \ |
1da177e4 | 96 | else \ |
94f28da8 | 97 | clear_thread_flag(TIF_32BIT); \ |
ce10d979 | 98 | if (personality(current->personality) != PER_LINUX32) \ |
a91a03ee EM |
99 | set_personality(PER_LINUX | \ |
100 | (current->personality & (~PER_MASK))); \ | |
1da177e4 | 101 | } while (0) |
1da177e4 LT |
102 | /* |
103 | * An executable for which elf_read_implies_exec() returns TRUE will | |
a2f95a5a AB |
104 | * have the READ_IMPLIES_EXEC personality flag set automatically. This |
105 | * is only required to work around bugs in old 32bit toolchains. Since | |
106 | * the 64bit ABI has never had these issues dont enable the workaround | |
107 | * even if we have an executable stack. | |
1da177e4 | 108 | */ |
cab175f9 | 109 | # define elf_read_implies_exec(ex, exec_stk) (is_32bit_task() ? \ |
d89ebca2 | 110 | (exec_stk == EXSTACK_DEFAULT) : 0) |
a99eb2ef | 111 | #else |
d89ebca2 | 112 | # define elf_read_implies_exec(ex, exec_stk) (exec_stk == EXSTACK_DEFAULT) |
a99eb2ef | 113 | #endif /* __powerpc64__ */ |
1da177e4 | 114 | |
1da177e4 LT |
115 | extern int dcache_bsize; |
116 | extern int icache_bsize; | |
117 | extern int ucache_bsize; | |
118 | ||
a7f290da BH |
119 | /* vDSO has arch_setup_additional_pages */ |
120 | #define ARCH_HAS_SETUP_ADDITIONAL_PAGES | |
1da177e4 | 121 | struct linux_binprm; |
a7f290da | 122 | extern int arch_setup_additional_pages(struct linux_binprm *bprm, |
fc5243d9 | 123 | int uses_interp); |
497888cf | 124 | #define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b) |
1da177e4 | 125 | |
2dadb987 AB |
126 | /* 1GB for 64bit, 8MB for 32bit */ |
127 | #define STACK_RND_MASK (is_32bit_task() ? \ | |
128 | (0x7ff >> (PAGE_SHIFT - 12)) : \ | |
129 | (0x3ffff >> (PAGE_SHIFT - 12))) | |
130 | ||
e055595d | 131 | #ifdef CONFIG_SPU_BASE |
bf1ab978 DGM |
132 | /* Notes used in ET_CORE. Note name is "SPU/<fd>/<filename>". */ |
133 | #define NT_SPU 1 | |
134 | ||
bf1ab978 | 135 | #define ARCH_HAVE_EXTRA_ELF_NOTES |
e5501492 ME |
136 | |
137 | #endif /* CONFIG_SPU_BASE */ | |
bf1ab978 | 138 | |
98a5f361 BH |
139 | #ifdef CONFIG_PPC64 |
140 | ||
141 | #define get_cache_geometry(level) \ | |
142 | (ppc64_caches.level.assoc << 16 | ppc64_caches.level.line_size) | |
143 | ||
144 | #define ARCH_DLINFO_CACHE_GEOMETRY \ | |
145 | NEW_AUX_ENT(AT_L1I_CACHESIZE, ppc64_caches.l1i.size); \ | |
146 | NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY, get_cache_geometry(l1i)); \ | |
9c7a0086 ME |
147 | NEW_AUX_ENT(AT_L1D_CACHESIZE, ppc64_caches.l1d.size); \ |
148 | NEW_AUX_ENT(AT_L1D_CACHEGEOMETRY, get_cache_geometry(l1d)); \ | |
98a5f361 BH |
149 | NEW_AUX_ENT(AT_L2_CACHESIZE, ppc64_caches.l2.size); \ |
150 | NEW_AUX_ENT(AT_L2_CACHEGEOMETRY, get_cache_geometry(l2)); \ | |
151 | NEW_AUX_ENT(AT_L3_CACHESIZE, ppc64_caches.l3.size); \ | |
152 | NEW_AUX_ENT(AT_L3_CACHEGEOMETRY, get_cache_geometry(l3)) | |
153 | ||
154 | #else | |
155 | #define ARCH_DLINFO_CACHE_GEOMETRY | |
156 | #endif | |
157 | ||
2a196e24 BH |
158 | /* |
159 | * The requirements here are: | |
160 | * - keep the final alignment of sp (sp & 0xf) | |
161 | * - make sure the 32-bit value at the first 16 byte aligned position of | |
162 | * AUXV is greater than 16 for glibc compatibility. | |
163 | * AT_IGNOREPPC is used for that. | |
164 | * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC, | |
165 | * even if DLINFO_ARCH_ITEMS goes to zero or is undefined. | |
166 | * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes | |
167 | */ | |
168 | #define ARCH_DLINFO \ | |
169 | do { \ | |
170 | /* Handle glibc compatibility. */ \ | |
171 | NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \ | |
172 | NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \ | |
173 | /* Cache size items */ \ | |
174 | NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \ | |
175 | NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \ | |
176 | NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \ | |
177 | VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base); \ | |
98a5f361 | 178 | ARCH_DLINFO_CACHE_GEOMETRY; \ |
2a196e24 BH |
179 | } while (0) |
180 | ||
a99eb2ef | 181 | #endif /* _ASM_POWERPC_ELF_H */ |